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| author | Jason Chien <jason.chien@sifive.com> | 2024-07-23 01:50:04 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-02 15:11:51 +1000 |
| commit | 12f1e2ec0095b2b4bfe55f2a608bd87be58fb908 (patch) | |
| tree | f42a4bce3df519312fbbba34bc35af7b78c9ebe8 /python | |
| parent | 718780d20470c66a3a36d036b29148d5809dc855 (diff) | |
| download | qemu-12f1e2ec0095b2b4bfe55f2a608bd87be58fb908.zip qemu-12f1e2ec0095b2b4bfe55f2a608bd87be58fb908.tar.gz qemu-12f1e2ec0095b2b4bfe55f2a608bd87be58fb908.tar.bz2 | |
target/riscv: Add a property to set vl to ceil(AVL/2)
RVV spec allows implementations to set vl with values within
[ceil(AVL/2),VLMAX] when VLMAX < AVL < 2*VLMAX. This commit adds a
property "rvv_vl_half_avl" to enable setting vl = ceil(AVL/2). This
behavior helps identify compiler issues and bugs.
Signed-off-by: Jason Chien <jason.chien@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Message-ID: <20240722175004.23666-1-jason.chien@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions