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| author | Alistair Francis <alistair23@gmail.com> | 2024-08-23 10:32:31 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-02 15:11:51 +1000 |
| commit | 06fb3bda6aadeb190be09a1513f1f0d31d119d16 (patch) | |
| tree | a086e04cc893a9c6731c66b664458b3f8c7a36fc /python | |
| parent | d1f872e15f9b489f121ab8570270c771175254ec (diff) | |
| download | qemu-06fb3bda6aadeb190be09a1513f1f0d31d119d16.zip qemu-06fb3bda6aadeb190be09a1513f1f0d31d119d16.tar.gz qemu-06fb3bda6aadeb190be09a1513f1f0d31d119d16.tar.bz2 | |
target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
The OpenTitan Ibex CPU now supports the the Zba, Zbb, Zbc
and Zbs bit-manipulation sub-extensions ratified in
v.1.0.0 of the RISC-V Bit- Manipulation ISA Extension, so let's enable
them in QEMU as well.
1: https://github.com/lowRISC/opentitan/pull/9748
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240823003231.3522113-1-alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions