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| author | Mark Corbin <mark@dibsco.co.uk> | 2024-09-17 01:51:06 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-02 15:11:52 +1000 |
| commit | 83726b77983df7b3ed11023b9fd36b82e710c2aa (patch) | |
| tree | 19029ed9b758d1543bdadb31f3ddf150fc3e18b9 /python/scripts/vendor.py | |
| parent | 5341bf6afe86895be900e1709b62f9d4af9f97d8 (diff) | |
| download | qemu-83726b77983df7b3ed11023b9fd36b82e710c2aa.zip qemu-83726b77983df7b3ed11023b9fd36b82e710c2aa.tar.gz qemu-83726b77983df7b3ed11023b9fd36b82e710c2aa.tar.bz2 | |
bsd-user: Implement RISC-V TLS register setup
Included the prototype for the 'target_cpu_set_tls' function in the
'target_arch.h' header file. This function is responsible for setting
the Thread Local Storage (TLS) register for RISC-V architecture.
Signed-off-by: Mark Corbin <mark@dibsco.co.uk>
Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240916155119.14610-5-itachis@FreeBSD.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python/scripts/vendor.py')
0 files changed, 0 insertions, 0 deletions