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| author | Mark Corbin <mark@dibsco.co.uk> | 2024-09-17 01:51:08 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-02 15:11:52 +1000 |
| commit | 2bf79222ce97156f395d3c214897d7a4f8fecc85 (patch) | |
| tree | 3fb513681e887b204729e7023f8d3915ff04ed4b /python/scripts/vendor.py | |
| parent | 8951b87da45a8434d3c276d7c30028df85487270 (diff) | |
| download | qemu-2bf79222ce97156f395d3c214897d7a4f8fecc85.zip qemu-2bf79222ce97156f395d3c214897d7a4f8fecc85.tar.gz qemu-2bf79222ce97156f395d3c214897d7a4f8fecc85.tar.bz2 | |
bsd-user: Define RISC-V register structures and register copying
Added definitions for RISC-V register structures, including
general-purpose registers and floating-point registers, in
'target_arch_reg.h'. Implemented the 'target_copy_regs' function to
copy register values from the CPU state to the target register
structure, ensuring proper endianness handling using 'tswapreg'.
Signed-off-by: Mark Corbin <mark@dibsco.co.uk>
Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240916155119.14610-7-itachis@FreeBSD.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python/scripts/vendor.py')
0 files changed, 0 insertions, 0 deletions