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authorFrank Chang <frank.chang@sifive.com>2022-01-18 09:45:14 +0800
committerAlistair Francis <alistair.francis@wdc.com>2022-01-21 15:52:56 +1000
commit32e579b8c510f0c8d7023d87b0cfacf782cb4a62 (patch)
treeff7e162e9591c021e7583c05afea7c30e63ea611 /python/qemu
parentbfefe406b7666bfc624bf54820aa14bd43838dc5 (diff)
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target/riscv: rvv-1.0: Add Zve32f extension into RISC-V
Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220118014522.13613-12-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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