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| author | Song Gao <gaosong@loongson.cn> | 2025-03-21 09:13:58 +0800 |
|---|---|---|
| committer | Bibo Mao <maobibo@loongson.cn> | 2025-03-21 11:31:56 +0800 |
| commit | b8d5503a3ecf8bcf75e4960d04215f71dbfd5dd2 (patch) | |
| tree | 5f4fbe330a5987c660d2db79a134338d93dcb97a /python/qemu/utils/accel.py | |
| parent | 1267e1ddeb65db5405405adb711272133fe9c670 (diff) | |
| download | qemu-b8d5503a3ecf8bcf75e4960d04215f71dbfd5dd2.zip qemu-b8d5503a3ecf8bcf75e4960d04215f71dbfd5dd2.tar.gz qemu-b8d5503a3ecf8bcf75e4960d04215f71dbfd5dd2.tar.bz2 | |
target/loongarch: fix bad shift in check_ps()
In expression 1ULL << tlb_ps, left shifting by more than 63 bits has
undefined behavior. The shift amount, tlb_ps, is as much as 64. check
"tlb_ps >=64" to fix.
Resolves: Coverity CID 1593475
Fixes: d882c284a3 ("target/loongarch: check tlb_ps")
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Diffstat (limited to 'python/qemu/utils/accel.py')
0 files changed, 0 insertions, 0 deletions