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authorFrank Chang <frank.chang@sifive.com>2022-01-18 09:45:15 +0800
committerAlistair Francis <alistair.francis@wdc.com>2022-01-21 15:52:56 +1000
commitda61f1256f55a5e9fc03f7c88e3caa425d6bf8cf (patch)
treeb4f55006ea147ad401779470859648a688e9a5ba /python/qemu/machine
parent32e579b8c510f0c8d7023d87b0cfacf782cb4a62 (diff)
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target/riscv: rvv-1.0: Add Zve32f support for configuration insns
All Zve* extensions support the vector configuration instructions. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220118014522.13613-13-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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