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| author | Yang Jialong <z_bajeer@yeah.net> | 2025-07-28 13:51:14 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-07-30 10:59:26 +1000 |
| commit | b6f1244678bebaf7e2c775cfc66d452f95678ebf (patch) | |
| tree | 0a028777bcaed9d5a448aa4787cab1d75e739bb2 /hw/avr/arduino.c | |
| parent | f3c8b7767f2e1fac37c727ca17b69e4f1e3351f2 (diff) | |
| download | qemu-b6f1244678bebaf7e2c775cfc66d452f95678ebf.zip qemu-b6f1244678bebaf7e2c775cfc66d452f95678ebf.tar.gz qemu-b6f1244678bebaf7e2c775cfc66d452f95678ebf.tar.bz2 | |
intc/riscv_aplic: Fix target register read when source is inactive
The RISC-V Advanced interrupt Architecture:
4.5.16. Interrupt targets:
If interrupt source i is inactive in this domain, register target[i] is
read-only zero.
Signed-off-by: Yang Jialong <z_bajeer@yeah.net>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20250728055114.252024-1-z_bajeer@yeah.net>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/avr/arduino.c')
0 files changed, 0 insertions, 0 deletions