Merge tag 'single-binary-20251016' of https://github.com/philmd/qemu into staging

Various patches related to single binary work:

- Remove some VMSTATE_UINTTL() uses
- Replace target_ulong by vaddr / hwaddr / uint[32,64]_t
- Expand TCGv to TCGv_i32 for 32-bit targets
- Remove some unnecessary checks on TARGET_LONG_BITS
- Replace few HOST_BIG_ENDIAN preprocessor #ifdef by compile-time if() check
- Expand MO_TE to either MO_BE or MO_LE

Also:

- Remove legacy cpu_physical_memory_*() calls
- Fix HPPA FMPYADD opcode
- Unify Clément Mathieu--Drif email addresses

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* tag 'single-binary-20251016' of https://github.com/philmd/qemu: (79 commits)
  mailmap: Unify Clément Mathieu--Drif emails
  linux-user/microblaze: Fix little-endianness binary
  target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state()
  target/xtensa: Remove target_ulong use in xtensa_tr_translate_insn()
  target/xtensa: Replace legacy cpu_physical_memory_[un]map() calls
  target/tricore: Expand TCGv type for 32-bit target
  target/tricore: Un-inline various helpers
  target/tricore: Pass DisasContext as first argument
  target/tricore: Expand TCG helpers for 32-bit target
  target/tricore: Inline tcg_gen_ld32u_tl()
  target/tricore: Declare registers as TCGv_i32
  target/tricore: Replace target_ulong -> uint32_t in op_helper.c
  target/tricore: Remove unnecessary cast to target_ulong
  target/tricore: Remove target_ulong use in gen_addi_d()
  target/tricore: Remove target_ulong use in translate_insn() handler
  target/tricore: Replace target_ulong -> vaddr with tlb_fill() callees
  target/tricore: Remove target_ulong use in gen_goto_tb()
  target/sparc: Reduce inclusions of 'exec/cpu-common.h'
  target/sh4: Remove target_ulong use in gen_goto_tb()
  target/sh4: Use vaddr type for TLB virtual addresses
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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