diff options
| author | Bernhard Beschow <shentey@gmail.com> | 2025-02-23 12:46:58 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-25 17:02:34 +0000 |
| commit | fd1deb5301f89eb86c0eecadb670beb98aa74ac5 (patch) | |
| tree | 79694a9beeddbc659101d895f376a1ccd7e1f069 /docs | |
| parent | a81193c3e9a8220862120d8d4114191f3899f4b3 (diff) | |
| download | qemu-fd1deb5301f89eb86c0eecadb670beb98aa74ac5.zip qemu-fd1deb5301f89eb86c0eecadb670beb98aa74ac5.tar.gz qemu-fd1deb5301f89eb86c0eecadb670beb98aa74ac5.tar.bz2 | |
hw/arm/fsl-imx8mp: Add PCIe support
Linux checks for the PLLs in the PHY to be locked, so implement a model
emulating that.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20250223114708.1780-9-shentey@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/system/arm/imx8mp-evk.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/arm/imx8mp-evk.rst b/docs/system/arm/imx8mp-evk.rst index 879c822..18a8fdd 100644 --- a/docs/system/arm/imx8mp-evk.rst +++ b/docs/system/arm/imx8mp-evk.rst @@ -13,6 +13,7 @@ The ``imx8mp-evk`` machine implements the following devices: * Generic Interrupt Controller (GICv3) * 4 UARTs * 3 USDHC Storage Controllers + * 1 Designware PCI Express Controller * Secure Non-Volatile Storage (SNVS) including an RTC * Clock Tree |