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author | Peter Maydell <peter.maydell@linaro.org> | 2024-02-23 18:59:11 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2024-02-23 18:59:11 +0000 |
commit | 91e3bf2e925671eb37e3b71cf7fdeb6b7f30248c (patch) | |
tree | 1acdff9476c4fc16f41e2039b86118aae18a7ebf /docs | |
parent | 3d54cbf269d63ff1d500b35b2bcf4565ff8ad485 (diff) | |
parent | 4acc505d2236190efea94746e7f22e2c07bce5d6 (diff) | |
download | qemu-91e3bf2e925671eb37e3b71cf7fdeb6b7f30248c.zip qemu-91e3bf2e925671eb37e3b71cf7fdeb6b7f30248c.tar.gz qemu-91e3bf2e925671eb37e3b71cf7fdeb6b7f30248c.tar.bz2 |
Merge tag 'pull-ppc-for-9.0-20240224' of https://gitlab.com/npiggin/qemu into staging
* Avocado tests for ppc64 to boot FreeBSD, run guests with emulated
or nested hypervisor facilities, among other things.
* Update ppc64 CPU defaults to Power10.
* Add a new powernv10-rainier machine to better capture differences
between the different Power10 systems.
* Implement more device models for powernv.
* 4xx TLB flushing performance and correctness improvements.
* Correct gdb implementation to access some important SPRs.
* Misc cleanups and bug fixes.
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* tag 'pull-ppc-for-9.0-20240224' of https://gitlab.com/npiggin/qemu: (47 commits)
target/ppc: optimise ppcemb_tlb_t flushing
target/ppc: 440 optimise tlbwe TLB flushing
target/ppc: 4xx optimise tlbwe_lo TLB flushing
target/ppc: 4xx don't flush TLB for a newly written software TLB entry
target/ppc: Factor out 4xx ppcemb_tlb_t flushing
target/ppc: Fix 440 tlbwe TLB invalidation gaps
target/ppc: Add SMT support to time facilities
target/ppc: Implement core timebase state machine and TFMR
ppc/pnv: Implement the ChipTOD to Core transfer
ppc/pnv: Wire ChipTOD model to powernv9 and powernv10 machines
ppc/pnv: Add POWER9/10 chiptod model
target/ppc: Fix move-to timebase SPR access permissions
target/ppc: Improve timebase register defines naming
target/ppc: Rename TBL to TB on 64-bit
target/ppc: Update gdbstub to read SPR's CFAR, DEC, HDEC, TB-L/U
hw/ppc: N1 chiplet wiring
hw/ppc: Add N1 chiplet model
hw/ppc: Add pnv nest pervasive common chiplet model
ppc/pnv: Test pnv i2c master and connected devices
ppc/pnv: Add a pca9554 I2C device to powernv10-rainier
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs')
-rw-r--r-- | docs/about/deprecated.rst | 8 | ||||
-rw-r--r-- | docs/devel/testing.rst | 11 |
2 files changed, 19 insertions, 0 deletions
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index 5a2305c..36bd3e1 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -229,6 +229,14 @@ The Nios II architecture is orphan. The machine is no longer in existence and has been long unmaintained in QEMU. This also holds for the TC51828 16MiB flash that it uses. +``pseries-2.1`` up to ``pseries-2.11`` (since 9.0) +'''''''''''''''''''''''''''''''''''''''''''''''''' + +Older pseries machines before version 2.12 have undergone many changes +to correct issues, mostly regarding migration compatibility. These are +no longer maintained and removing them will make the code easier to +read and maintain. Use versions 2.12 and above as a replacement. + Backend options --------------- diff --git a/docs/devel/testing.rst b/docs/devel/testing.rst index aa96eac..fa28e3e 100644 --- a/docs/devel/testing.rst +++ b/docs/devel/testing.rst @@ -1346,6 +1346,17 @@ the environment. The definition of *large* is a bit arbitrary here, but it usually means an asset which occupies at least 1GB of size on disk when uncompressed. +SPEED +^^^^^ +Tests which have a long runtime will not be run unless ``SPEED=slow`` is +exported on the environment. + +The definition of *long* is a bit arbitrary here, and it depends on the +usefulness of the test too. A unique test is worth spending more time on, +small variations on existing tests perhaps less so. As a rough guide, +a test or set of similar tests which take more than 100 seconds to +complete. + AVOCADO_ALLOW_UNTRUSTED_CODE ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ There are tests which will boot a kernel image or firmware that can be |