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| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2025-03-07 11:59:13 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-03-09 14:36:53 +0100 |
| commit | b008465d655ff3ff314fe1ef81031293b582ebaf (patch) | |
| tree | dda63ab879f2492bdbc66ee9c12b586c75b90145 /docs/sphinx/compat.py | |
| parent | 563afea0aebd15eac74b89467204f4b76b2ee6fa (diff) | |
| download | qemu-b008465d655ff3ff314fe1ef81031293b582ebaf.zip qemu-b008465d655ff3ff314fe1ef81031293b582ebaf.tar.gz qemu-b008465d655ff3ff314fe1ef81031293b582ebaf.tar.bz2 | |
hw/intc/aspeed: Support setting different register size
Currently, the size of the regs array is 0x2000, which is too large. So far,
it only use GICINT128 - GICINT134, and the offsets from 0 to 0x1000 are unused.
To save code size, introduce a new class attribute "reg_size" to set the
different register sizes for the INTC models in AST2700 and add a regs
sub-region in the memory container.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250307035945.3698802-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'docs/sphinx/compat.py')
0 files changed, 0 insertions, 0 deletions