diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-01-15 00:07:23 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-06 15:46:18 +0100 |
| commit | befd818b58c8522f573b8831df820f121bfe642a (patch) | |
| tree | a89928f22a3082780da2517501f0d97ee274aad0 | |
| parent | 40b839cb840ce032c8f048325b486d3284f1b68f (diff) | |
| download | qemu-befd818b58c8522f573b8831df820f121bfe642a.zip qemu-befd818b58c8522f573b8831df820f121bfe642a.tar.gz qemu-befd818b58c8522f573b8831df820f121bfe642a.tar.bz2 | |
target/openrisc: Call cpu_openrisc_clock_init() in cpu_realize()
OpenRISC timer is architecturally tied to the CPU.
It doesn't belong to the machine init() code to
instanciate it: move its creation when a vCPU is
realized (after being created).
Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250114231304.77150-1-philmd@linaro.org>
| -rw-r--r-- | hw/openrisc/openrisc_sim.c | 2 | ||||
| -rw-r--r-- | hw/openrisc/virt.c | 2 | ||||
| -rw-r--r-- | target/openrisc/cpu.c | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index d9e0744..83d7c2a 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -306,8 +306,6 @@ static void openrisc_sim_init(MachineState *machine) exit(1); } - cpu_openrisc_clock_init(cpus[n]); - qemu_register_reset(main_cpu_reset, cpus[n]); } diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c index 9afe407..3055306 100644 --- a/hw/openrisc/virt.c +++ b/hw/openrisc/virt.c @@ -487,8 +487,6 @@ static void openrisc_virt_init(MachineState *machine) exit(1); } - cpu_openrisc_clock_init(cpus[n]); - qemu_register_reset(main_cpu_reset, cpus[n]); } diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 0669ba2..785b065 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -165,6 +165,10 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) qemu_init_vcpu(cs); cpu_reset(cs); +#ifndef CONFIG_USER_ONLY + cpu_openrisc_clock_init(OPENRISC_CPU(dev)); +#endif + occ->parent_realize(dev, errp); } |