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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2024-12-22 18:45:07 -0300 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2024-12-28 14:42:53 +0300 |
| commit | a8743193ff1ed221f42c0341182cada3d67793cc (patch) | |
| tree | 5f2b654158f05ace8fc3403e1cf2d6671b725636 | |
| parent | 93dcc9390e5ad0696ae7e9b7b3a5b08c2d1b6de6 (diff) | |
| download | qemu-a8743193ff1ed221f42c0341182cada3d67793cc.zip qemu-a8743193ff1ed221f42c0341182cada3d67793cc.tar.gz qemu-a8743193ff1ed221f42c0341182cada3d67793cc.tar.bz2 | |
hw/riscv/riscv-iommu-sys.c: fix duplicated 'table_size'
Trivial fix for the following ticket:
CID 1568580: Incorrect expression (EVALUATION_ORDER)
In "table_size = table_size = n_vectors * 16U",
"table_size" is written twice with the same value.
Cc: qemu-trivial@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>
Resolves: Coverity CID 1568580
Fixes: 01c1caa9d1 ("hw/riscv/virt.c, riscv-iommu-sys.c: add MSIx support")
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| -rw-r--r-- | hw/riscv/riscv-iommu-sys.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/riscv-iommu-sys.c b/hw/riscv/riscv-iommu-sys.c index 28153f3..65b24fb 100644 --- a/hw/riscv/riscv-iommu-sys.c +++ b/hw/riscv/riscv-iommu-sys.c @@ -121,7 +121,7 @@ static void riscv_iommu_sysdev_init_msi(RISCVIOMMUStateSys *s, uint32_t n_vectors) { RISCVIOMMUState *iommu = &s->iommu; - uint32_t table_size = table_size = n_vectors * PCI_MSIX_ENTRY_SIZE; + uint32_t table_size = n_vectors * PCI_MSIX_ENTRY_SIZE; uint32_t table_offset = RISCV_IOMMU_REG_MSI_CONFIG; uint32_t pba_size = QEMU_ALIGN_UP(n_vectors, 64) / 8; uint32_t pba_offset = RISCV_IOMMU_REG_MSI_CONFIG + 256; |