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author | Igor Mammedov <imammedo@redhat.com> | 2025-08-14 18:06:00 +0200 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-08-29 12:48:14 +0200 |
commit | 83bd8e65bc70cef03a207df315004f8b1301dc53 (patch) | |
tree | d1b181c352b1d87ebcbfed1b37985f338f48b880 | |
parent | 17e645c6f17999cd0306c4d18d6f6cb3db55756d (diff) | |
download | qemu-83bd8e65bc70cef03a207df315004f8b1301dc53.zip qemu-83bd8e65bc70cef03a207df315004f8b1301dc53.tar.gz qemu-83bd8e65bc70cef03a207df315004f8b1301dc53.tar.bz2 |
tcg: move interrupt caching and single step masking closer to user
in cpu_handle_interrupt() the only place where cached interrupt_request
might have effect is when CPU_INTERRUPT_SSTEP_MASK applied and
cached interrupt_request handed over to cpu_exec_interrupt() and
need_replay_interrupt().
Simplify code by moving interrupt_request caching and CPU_INTERRUPT_SSTEP_MASK
masking into the block where it actually matters and drop reloading cached value
from CPUState:interrupt_request as the rest of the code directly uses
CPUState:interrupt_request.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Link: https://lore.kernel.org/r/20250814160600.2327672-9-imammedo@redhat.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r-- | accel/tcg/cpu-exec.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 96c124a..8491e5b 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -782,13 +782,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, assert(!cpu_test_interrupt(cpu, ~0)); #else if (unlikely(cpu_test_interrupt(cpu, ~0))) { - int interrupt_request; bql_lock(); - interrupt_request = cpu->interrupt_request; - if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { - /* Mask out external interrupts for this step. */ - interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; - } if (cpu_test_interrupt(cpu, CPU_INTERRUPT_DEBUG)) { cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; cpu->exception_index = EXCP_DEBUG; @@ -806,6 +800,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, return true; } else { const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; + int interrupt_request = cpu->interrupt_request; if (cpu_test_interrupt(cpu, CPU_INTERRUPT_RESET)) { replay_interrupt(); @@ -814,6 +809,11 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, return true; } + if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { + /* Mask out external interrupts for this step. */ + interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; + } + /* * The target hook has 3 exit conditions: * False when the interrupt isn't processed, @@ -838,9 +838,6 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, cpu->exception_index = -1; *last_tb = NULL; } - /* The target hook may have updated the 'cpu->interrupt_request'; - * reload the 'interrupt_request' value */ - interrupt_request = cpu->interrupt_request; } if (cpu_test_interrupt(cpu, CPU_INTERRUPT_EXITTB)) { cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; |