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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2025-01-15 15:43:11 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-03-04 15:42:54 +1000 |
| commit | 38d0ce28dfc7a73c7527442bb3b7029b402cb056 (patch) | |
| tree | a883bcfd552b1ac49e80189371cc2de274d56368 | |
| parent | a680d9531e9b3726dddee94e5f49900c4b756ea6 (diff) | |
| download | qemu-38d0ce28dfc7a73c7527442bb3b7029b402cb056.zip qemu-38d0ce28dfc7a73c7527442bb3b7029b402cb056.tar.gz qemu-38d0ce28dfc7a73c7527442bb3b7029b402cb056.tar.bz2 | |
target/riscv: add ssu64xl
ssu64xl is defined in RVA22 as:
"sstatus.UXL must be capable of holding the value 2 (i.e., UXLEN=64 must
be supported)."
This is always true in TCG and it's mandatory for RVA23, so claim
support for it.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250115184316.2344583-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/cpu.c | 1 | ||||
| -rw-r--r-- | tests/data/acpi/riscv64/virt/RHCT | bin | 390 -> 398 bytes |
2 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 99436f1..4f5e13a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -213,6 +213,7 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(sstc, PRIV_VERSION_1_12_0, ext_sstc), ISA_EXT_DATA_ENTRY(sstvala, PRIV_VERSION_1_12_0, has_priv_1_12), ISA_EXT_DATA_ENTRY(sstvecd, PRIV_VERSION_1_12_0, has_priv_1_12), + ISA_EXT_DATA_ENTRY(ssu64xl, PRIV_VERSION_1_12_0, has_priv_1_12), ISA_EXT_DATA_ENTRY(supm, PRIV_VERSION_1_13_0, ext_supm), ISA_EXT_DATA_ENTRY(svade, PRIV_VERSION_1_11_0, ext_svade), ISA_EXT_DATA_ENTRY(svadu, PRIV_VERSION_1_12_0, ext_svadu), diff --git a/tests/data/acpi/riscv64/virt/RHCT b/tests/data/acpi/riscv64/virt/RHCT Binary files differindex 695022d..b14ec15 100644 --- a/tests/data/acpi/riscv64/virt/RHCT +++ b/tests/data/acpi/riscv64/virt/RHCT |