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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-09-24 23:45:35 +0200
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2025-03-06 15:46:18 +0100
commit2c9e8ddd769959e899206b4cdea466ba5845e0bc (patch)
tree91d7b1bf882963d206b0f3aefecf925b8841a4ac
parent401bd7d340a4558995e8f61bd2050174e043ef20 (diff)
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target/microblaze: Introduce mo_endian() helper
mo_endian() returns the target endianness, currently static. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241105130431.22564-16-philmd@linaro.org>
-rw-r--r--target/microblaze/translate.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 0d51b2c..b5389d6 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -708,12 +708,17 @@ static void record_unaligned_ess(DisasContext *dc, int rd,
}
#endif
+static inline MemOp mo_endian(DisasContext *dc)
+{
+ return MO_TE;
+}
+
static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
int mem_index, bool rev)
{
MemOp size = mop & MO_SIZE;
- mop |= MO_TE;
+ mop |= mo_endian(dc);
/*
* When doing reverse accesses we need to do two things.
@@ -848,7 +853,8 @@ static bool trans_lwx(DisasContext *dc, arg_typea *arg)
/* lwx does not throw unaligned access errors, so force alignment */
tcg_gen_andi_tl(addr, addr, ~3);
- tcg_gen_qemu_ld_i32(cpu_res_val, addr, dc->mem_index, MO_TE | MO_UL);
+ tcg_gen_qemu_ld_i32(cpu_res_val, addr, dc->mem_index,
+ mo_endian(dc) | MO_UL);
tcg_gen_mov_tl(cpu_res_addr, addr);
if (arg->rd) {
@@ -865,7 +871,7 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
{
MemOp size = mop & MO_SIZE;
- mop |= MO_TE;
+ mop |= mo_endian(dc);
/*
* When doing reverse accesses we need to do two things.
@@ -1019,7 +1025,7 @@ static bool trans_swx(DisasContext *dc, arg_typea *arg)
tcg_gen_atomic_cmpxchg_i32(tval, cpu_res_addr, cpu_res_val,
reg_for_write(dc, arg->rd),
- dc->mem_index, MO_TE | MO_UL);
+ dc->mem_index, mo_endian(dc) | MO_UL);
tcg_gen_brcond_i32(TCG_COND_NE, cpu_res_val, tval, swx_fail);