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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-23 16:18:00 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-04-25 12:59:09 +0200 |
| commit | 0bc15e47f000e83f81ac5b1aeccaee1bbfaa0d40 (patch) | |
| tree | e507ba5538e4c5ae7347fb160c07863fa667edd0 | |
| parent | 0a5692fecc76c6fee9a4fc86dbe8faf84ce30ce8 (diff) | |
| download | qemu-0bc15e47f000e83f81ac5b1aeccaee1bbfaa0d40.zip qemu-0bc15e47f000e83f81ac5b1aeccaee1bbfaa0d40.tar.gz qemu-0bc15e47f000e83f81ac5b1aeccaee1bbfaa0d40.tar.bz2 | |
target/i386: Register CPUClass:list_cpus
Register x86_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250324185837.46506-3-philmd@linaro.org>
| -rw-r--r-- | target/i386/cpu.c | 3 | ||||
| -rw-r--r-- | target/i386/cpu.h | 3 |
2 files changed, 2 insertions, 4 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1f970aa..955295f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6319,7 +6319,7 @@ static void x86_cpu_list_entry(gpointer data, gpointer user_data) } /* list available CPU models and flags */ -void x86_cpu_list(void) +static void x86_cpu_list(void) { int i, j; GSList *list; @@ -8905,6 +8905,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP; cc->class_by_name = x86_cpu_class_by_name; + cc->list_cpus = x86_cpu_list; cc->parse_features = x86_cpu_parse_featurestr; cc->dump_state = x86_cpu_dump_state; cc->set_pc = x86_cpu_set_pc; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 9866595..54bf963 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2365,7 +2365,6 @@ int x86_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void x86_cpu_gdb_init(CPUState *cs); -void x86_cpu_list(void); int cpu_x86_support_mca_broadcast(CPUX86State *env); #ifndef CONFIG_USER_ONLY @@ -2559,8 +2558,6 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu32") #endif -#define cpu_list x86_cpu_list - /* MMU modes definitions */ #define MMU_KSMAP64_IDX 0 #define MMU_KSMAP32_IDX 1 |