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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -verify-dom-info -verify-loop-info -S 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
@A = common global [100 x [100 x i32]] zeroinitializer
@B = common global [100 x i32] zeroinitializer
; Loops should not be interchanged in this case as it is not legal due to dependency.
;
; for(int j=0;j<99;j++)
; for(int i=0;i<99;i++)
; A[j][i+1] = A[j+1][i]+k;
;
define void @interchange_04(i32 %k){
; CHECK-LABEL: define void @interchange_04(
; CHECK-SAME: i32 [[K:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: br label %[[FOR_COND1_PREHEADER:.*]]
; CHECK: [[FOR_COND1_PREHEADER]]:
; CHECK-NEXT: [[INDVARS_IV23:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT24:%.*]], %[[FOR_INC12:.*]] ]
; CHECK-NEXT: [[INDVARS_IV_NEXT24]] = add nuw nsw i64 [[INDVARS_IV23]], 1
; CHECK-NEXT: br label %[[FOR_BODY3:.*]]
; CHECK: [[FOR_BODY3]]:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[FOR_COND1_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY3]] ]
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV_NEXT24]], i64 [[INDVARS_IV]]
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP0]], [[K]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV23]], i64 [[INDVARS_IV_NEXT]]
; CHECK-NEXT: store i32 [[ADD6]], ptr [[ARRAYIDX11]], align 4
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 99
; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_INC12]], label %[[FOR_BODY3]]
; CHECK: [[FOR_INC12]]:
; CHECK-NEXT: [[EXITCOND25:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT24]], 99
; CHECK-NEXT: br i1 [[EXITCOND25]], label %[[FOR_END14:.*]], label %[[FOR_COND1_PREHEADER]]
; CHECK: [[FOR_END14]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.cond1.preheader
for.cond1.preheader:
%indvars.iv23 = phi i64 [ 0, %entry ], [ %indvars.iv.next24, %for.inc12 ]
%indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
br label %for.body3
for.body3:
%indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body3 ]
%arrayidx5 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %indvars.iv.next24, i64 %indvars.iv
%0 = load i32, ptr %arrayidx5
%add6 = add nsw i32 %0, %k
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%arrayidx11 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %indvars.iv23, i64 %indvars.iv.next
store i32 %add6, ptr %arrayidx11
%exitcond = icmp eq i64 %indvars.iv.next, 99
br i1 %exitcond, label %for.inc12, label %for.body3
for.inc12:
%exitcond25 = icmp eq i64 %indvars.iv.next24, 99
br i1 %exitcond25, label %for.end14, label %for.cond1.preheader
for.end14:
ret void
}
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