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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=x86_64-linux-gnu -stop-after=finalize-isel -o - %s | FileCheck --check-prefix=MIR %s
; Ensure that the scoped AA is attached on loads/stores lowered from mem ops.
; Re-evaluate the slot numbers of scopes as that numbering could be changed run-by-run.
; MIR-DAG: ![[DOMAIN:[0-9]+]] = distinct !{!{{[0-9]+}}, !"bax"}
; MIR-DAG: ![[SCOPE0:[0-9]+]] = distinct !{!{{[0-9]+}}, ![[DOMAIN]], !"bax: %p"}
; MIR-DAG: ![[SCOPE1:[0-9]+]] = distinct !{!{{[0-9]+}}, ![[DOMAIN]], !"bax: %q"}
; MIR-DAG: ![[SET0:[0-9]+]] = !{![[SCOPE0]]}
; MIR-DAG: ![[SET1:[0-9]+]] = !{![[SCOPE1]]}
define i32 @test_memcpy(ptr nocapture %p, ptr nocapture readonly %q) {
; MIR-LABEL: name: test_memcpy
; MIR: bb.0 (%ir-block.0):
; MIR-NEXT: liveins: $rdi, $rsi
; MIR-NEXT: {{ $}}
; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
; MIR-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
; MIR-NEXT: $eax = COPY [[ADD32rm]]
; MIR-NEXT: RET 0, $eax
%p0 = bitcast ptr %p to ptr
%add.ptr = getelementptr inbounds i32, ptr %p, i64 4
%p1 = bitcast ptr %add.ptr to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !2, !noalias !4
%v0 = load i32, ptr %q, align 4, !alias.scope !4, !noalias !2
%q1 = getelementptr inbounds i32, ptr %q, i64 1
%v1 = load i32, ptr %q1, align 4, !alias.scope !4, !noalias !2
%add = add i32 %v0, %v1
ret i32 %add
}
define i32 @test_memcpy_inline(ptr nocapture %p, ptr nocapture readonly %q) {
; MIR-LABEL: name: test_memcpy_inline
; MIR: bb.0 (%ir-block.0):
; MIR-NEXT: liveins: $rdi, $rsi
; MIR-NEXT: {{ $}}
; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
; MIR-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
; MIR-NEXT: $eax = COPY [[ADD32rm]]
; MIR-NEXT: RET 0, $eax
%p0 = bitcast ptr %p to ptr
%add.ptr = getelementptr inbounds i32, ptr %p, i64 4
%p1 = bitcast ptr %add.ptr to ptr
tail call void @llvm.memcpy.inline.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !2, !noalias !4
%v0 = load i32, ptr %q, align 4, !alias.scope !4, !noalias !2
%q1 = getelementptr inbounds i32, ptr %q, i64 1
%v1 = load i32, ptr %q1, align 4, !alias.scope !4, !noalias !2
%add = add i32 %v0, %v1
ret i32 %add
}
define i32 @test_memmove(ptr nocapture %p, ptr nocapture readonly %q) {
; MIR-LABEL: name: test_memmove
; MIR: bb.0 (%ir-block.0):
; MIR-NEXT: liveins: $rdi, $rsi
; MIR-NEXT: {{ $}}
; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
; MIR-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
; MIR-NEXT: $eax = COPY [[ADD32rm]]
; MIR-NEXT: RET 0, $eax
%p0 = bitcast ptr %p to ptr
%add.ptr = getelementptr inbounds i32, ptr %p, i64 4
%p1 = bitcast ptr %add.ptr to ptr
tail call void @llvm.memmove.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !2, !noalias !4
%v0 = load i32, ptr %q, align 4, !alias.scope !4, !noalias !2
%q1 = getelementptr inbounds i32, ptr %q, i64 1
%v1 = load i32, ptr %q1, align 4, !alias.scope !4, !noalias !2
%add = add i32 %v0, %v1
ret i32 %add
}
define i32 @test_memset(ptr nocapture %p, ptr nocapture readonly %q) {
; MIR-LABEL: name: test_memset
; MIR: bb.0 (%ir-block.0):
; MIR-NEXT: liveins: $rdi, $rsi
; MIR-NEXT: {{ $}}
; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
; MIR-NEXT: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri -6148914691236517206
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, [[MOV64ri]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, [[MOV64ri]] :: (store (s64) into %ir.p0, align 4, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
; MIR-NEXT: $eax = COPY [[ADD32rm]]
; MIR-NEXT: RET 0, $eax
%p0 = bitcast ptr %p to ptr
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %p0, i8 170, i64 16, i1 false), !alias.scope !2, !noalias !4
%v0 = load i32, ptr %q, align 4, !alias.scope !4, !noalias !2
%q1 = getelementptr inbounds i32, ptr %q, i64 1
%v1 = load i32, ptr %q1, align 4, !alias.scope !4, !noalias !2
%add = add i32 %v0, %v1
ret i32 %add
}
define i32 @test_mempcpy(ptr nocapture %p, ptr nocapture readonly %q) {
; MIR-LABEL: name: test_mempcpy
; MIR: bb.0 (%ir-block.0):
; MIR-NEXT: liveins: $rdi, $rsi
; MIR-NEXT: {{ $}}
; MIR-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
; MIR-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
; MIR-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 1, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 1, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 1, !alias.scope !0, !noalias !3)
; MIR-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 1, !alias.scope !0, !noalias !3)
; MIR-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
; MIR-NEXT: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
; MIR-NEXT: $eax = COPY [[ADD32rm]]
; MIR-NEXT: RET 0, $eax
%p0 = bitcast ptr %p to ptr
%add.ptr = getelementptr inbounds i32, ptr %p, i64 4
%p1 = bitcast ptr %add.ptr to ptr
%call = tail call ptr @mempcpy(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16), !alias.scope !2, !noalias !4
%v0 = load i32, ptr %q, align 4, !alias.scope !4, !noalias !2
%q1 = getelementptr inbounds i32, ptr %q, i64 1
%v1 = load i32, ptr %q1, align 4, !alias.scope !4, !noalias !2
%add = add i32 %v0, %v1
ret i32 %add
}
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg)
declare void @llvm.memcpy.inline.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg)
declare ptr @mempcpy(ptr, ptr, i64)
!0 = distinct !{!0, !"bax"}
!1 = distinct !{!1, !0, !"bax: %p"}
!2 = !{!1}
!3 = distinct !{!3, !0, !"bax: %q"}
!4 = !{!3}
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