llvm/test/CodeGen/X86/membarrier.ll


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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse -O0 | FileCheck %s
; PR9675

define i32 @t() {
; CHECK-LABEL: t:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movl $1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT:    lock orl $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT:    lock decl -{{[0-9]+}}(%rsp)
; CHECK-NEXT:    lock orl $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    retq
  %i = alloca i32, align 4
  store i32 1, ptr %i, align 4
  fence seq_cst
  %t0 = atomicrmw sub ptr %i, i32 1 monotonic
  fence seq_cst
  ret i32 0
}