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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=riscv32 -mattr=+xmipscbop -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32XMIPSPREFETCH
; RUN: llc -mtriple=riscv64 -mattr=+xmipscbop -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64XMIPSPREFETCH
define void @prefetch_data_read(ptr noundef %ptr) nounwind {
; RV32XMIPSPREFETCH-LABEL: prefetch_data_read:
; RV32XMIPSPREFETCH: # %bb.0: # %entry
; RV32XMIPSPREFETCH-NEXT: mips.pref 8, 1(a0)
; RV32XMIPSPREFETCH-NEXT: ret
;
; RV64XMIPSPREFETCH-LABEL: prefetch_data_read:
; RV64XMIPSPREFETCH: # %bb.0: # %entry
; RV64XMIPSPREFETCH-NEXT: mips.pref 8, 1(a0)
; RV64XMIPSPREFETCH-NEXT: ret
entry:
%arrayidx = getelementptr inbounds nuw i8, ptr %ptr, i64 1
tail call void @llvm.prefetch.p0(ptr nonnull %arrayidx, i32 0, i32 0, i32 1)
ret void
}
define void @prefetch_data_write(ptr noundef %ptr) nounwind {
; RV32XMIPSPREFETCH-LABEL: prefetch_data_write:
; RV32XMIPSPREFETCH: # %bb.0:
; RV32XMIPSPREFETCH-NEXT: addi a0, a0, 512
; RV32XMIPSPREFETCH-NEXT: mips.pref 9, 0(a0)
; RV32XMIPSPREFETCH-NEXT: ret
;
; RV64XMIPSPREFETCH-LABEL: prefetch_data_write:
; RV64XMIPSPREFETCH: # %bb.0:
; RV64XMIPSPREFETCH-NEXT: addi a0, a0, 512
; RV64XMIPSPREFETCH-NEXT: mips.pref 9, 0(a0)
; RV64XMIPSPREFETCH-NEXT: ret
%arrayidx = getelementptr inbounds nuw i8, ptr %ptr, i64 512
tail call void @llvm.prefetch.p0(ptr nonnull %arrayidx, i32 1, i32 0, i32 1)
ret void
}
define void @prefetch_inst_read(ptr noundef %ptr) nounwind {
; RV32XMIPSPREFETCH-LABEL: prefetch_inst_read:
; RV32XMIPSPREFETCH: # %bb.0:
; RV32XMIPSPREFETCH-NEXT: ret
;
; RV64XMIPSPREFETCH-LABEL: prefetch_inst_read:
; RV64XMIPSPREFETCH: # %bb.0:
; RV64XMIPSPREFETCH-NEXT: ret
%arrayidx = getelementptr inbounds nuw i8, ptr %ptr, i64 512
tail call void @llvm.prefetch.p0(ptr nonnull %arrayidx, i32 0, i32 0, i32 0)
ret void
}
define void @prefetch_frameindex_test_neg() nounwind {
; RV32XMIPSPREFETCH-LABEL: prefetch_frameindex_test_neg:
; RV32XMIPSPREFETCH: # %bb.0:
; RV32XMIPSPREFETCH-NEXT: lui a0, 1
; RV32XMIPSPREFETCH-NEXT: addi a0, a0, 16
; RV32XMIPSPREFETCH-NEXT: sub sp, sp, a0
; RV32XMIPSPREFETCH-NEXT: addi a0, sp, 524
; RV32XMIPSPREFETCH-NEXT: mips.pref 8, 0(a0)
; RV32XMIPSPREFETCH-NEXT: lui a0, 1
; RV32XMIPSPREFETCH-NEXT: addi a0, a0, 16
; RV32XMIPSPREFETCH-NEXT: add sp, sp, a0
; RV32XMIPSPREFETCH-NEXT: ret
;
; RV64XMIPSPREFETCH-LABEL: prefetch_frameindex_test_neg:
; RV64XMIPSPREFETCH: # %bb.0:
; RV64XMIPSPREFETCH-NEXT: lui a0, 1
; RV64XMIPSPREFETCH-NEXT: addi a0, a0, 16
; RV64XMIPSPREFETCH-NEXT: sub sp, sp, a0
; RV64XMIPSPREFETCH-NEXT: addi a0, sp, 524
; RV64XMIPSPREFETCH-NEXT: mips.pref 8, 0(a0)
; RV64XMIPSPREFETCH-NEXT: lui a0, 1
; RV64XMIPSPREFETCH-NEXT: addi a0, a0, 16
; RV64XMIPSPREFETCH-NEXT: add sp, sp, a0
; RV64XMIPSPREFETCH-NEXT: ret
%data = alloca [1024 x i32], align 4
%ptr = getelementptr [1024 x i32], ptr %data, i32 0, i32 127
call void @llvm.prefetch(ptr %ptr, i32 0, i32 0, i32 1)
ret void
}
define void @prefetch_frameindex_test() nounwind {
; RV32XMIPSPREFETCH-LABEL: prefetch_frameindex_test:
; RV32XMIPSPREFETCH: # %bb.0:
; RV32XMIPSPREFETCH-NEXT: addi sp, sp, -512
; RV32XMIPSPREFETCH-NEXT: mips.pref 8, 32(sp)
; RV32XMIPSPREFETCH-NEXT: addi sp, sp, 512
; RV32XMIPSPREFETCH-NEXT: ret
;
; RV64XMIPSPREFETCH-LABEL: prefetch_frameindex_test:
; RV64XMIPSPREFETCH: # %bb.0:
; RV64XMIPSPREFETCH-NEXT: addi sp, sp, -512
; RV64XMIPSPREFETCH-NEXT: mips.pref 8, 32(sp)
; RV64XMIPSPREFETCH-NEXT: addi sp, sp, 512
; RV64XMIPSPREFETCH-NEXT: ret
%data = alloca [128 x i32], align 4
%base = bitcast ptr %data to ptr
%ptr = getelementptr [128 x i32], ptr %base, i32 0, i32 8
call void @llvm.prefetch(ptr %ptr, i32 0, i32 0, i32 1)
ret void
}
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