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path: root/llvm/test/CodeGen/RISCV/xcvmem-heuristic.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O3 -mtriple=riscv32 -mattr=+m,+xcvmem -verify-machineinstrs < %s \
; RUN:   | FileCheck %s --check-prefixes=CHECK

define i32 @test_heuristic(ptr %b, i32 %e, i1 %0) {
; CHECK-LABEL: test_heuristic:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    add a3, a0, a1
; CHECK-NEXT:    andi a2, a2, 1
; CHECK-NEXT:  .LBB0_1: # %loop
; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    cv.lbu a1, (a3), 1
; CHECK-NEXT:    addi a0, a0, 1
; CHECK-NEXT:    beqz a2, .LBB0_1
; CHECK-NEXT:  # %bb.2: # %exit
; CHECK-NEXT:    mv a0, a1
; CHECK-NEXT:    ret
entry:
  %1 = getelementptr i8, ptr %b, i32 %e
  br label %loop

loop:                                             ; preds = %loop, %entry
  %2 = phi ptr [ %b, %entry ], [ %7, %loop ]
  %3 = phi ptr [ %1, %entry ], [ %8, %loop ]
  %4 = load i8, ptr %2, align 1
  %5 = load i8, ptr %3, align 1
  %6 = zext i8 %5 to i32
  %7 = getelementptr i8, ptr %2, i32 1
  %8 = getelementptr i8, ptr %3, i32 1
  br i1 %0, label %exit, label %loop

exit:                                             ; preds = %loop
  ret i32 %6
}