llvm/test/CodeGen/PowerPC/fp-branch.ll


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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs < %s -mattr=-vsx -mtriple=ppc32-- | FileCheck %s

declare i1 @llvm.isunordered.f64(double, double)

define i1 @intcoord_cond_next55(double %tmp48.reload) {
; CHECK-LABEL: intcoord_cond_next55:
; CHECK:       # %bb.0: # %newFuncRoot
; CHECK-NEXT:    lis 3, .LCPI0_0@ha
; CHECK-NEXT:    lfs 0, .LCPI0_0@l(3)
; CHECK-NEXT:    fcmpu 0, 1, 0
; CHECK-NEXT:    blt 0, .LBB0_2
; CHECK-NEXT:  # %bb.1: # %bb72.exitStub
; CHECK-NEXT:    li 3, 1
; CHECK-NEXT:    blr
; CHECK-NEXT:  .LBB0_2: # %cond_next62.exitStub
; CHECK-NEXT:    li 3, 0
; CHECK-NEXT:    blr
newFuncRoot:
        br label %cond_next55

bb72.exitStub:          ; preds = %cond_next55
        ret i1 true

cond_next62.exitStub:           ; preds = %cond_next55
        ret i1 false

cond_next55:            ; preds = %newFuncRoot
        %tmp57 = fcmp oge double %tmp48.reload, 1.000000e+00            ; <i1> [#uses=1]
        %tmp58 = fcmp uno double %tmp48.reload, 1.000000e+00            ; <i1> [#uses=1]
        %tmp59 = or i1 %tmp57, %tmp58           ; <i1> [#uses=1]
        br i1 %tmp59, label %bb72.exitStub, label %cond_next62.exitStub
}