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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
define float @call_exp10f(float %a) nounwind {
; CHECK-LABEL: call_exp10f:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stdu r1, -32(r1)
; CHECK-NEXT: std r0, 48(r1)
; CHECK-NEXT: bl exp10f
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: mtlr r0
; CHECK-NEXT: blr
%result = call float @exp10f(float %a)
ret float %result
}
define double @call_exp10(double %a) nounwind {
; CHECK-LABEL: call_exp10:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stdu r1, -32(r1)
; CHECK-NEXT: std r0, 48(r1)
; CHECK-NEXT: bl exp10
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: mtlr r0
; CHECK-NEXT: blr
%result = call double @exp10(double %a)
ret double %result
}
define ppc_fp128 @call_exp10l(ppc_fp128 %a) nounwind {
; CHECK-LABEL: call_exp10l:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stdu r1, -32(r1)
; CHECK-NEXT: std r0, 48(r1)
; CHECK-NEXT: bl exp10l
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: mtlr r0
; CHECK-NEXT: blr
%result = call ppc_fp128 @exp10l(ppc_fp128 %a)
ret ppc_fp128 %result
}
declare float @exp10f(float %a) #0
declare double @exp10(double %a) #0
declare ppc_fp128 @exp10l(ppc_fp128 %a) #0
attributes #0 = { nounwind readonly }
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