aboutsummaryrefslogtreecommitdiff
path: root/llvm/test/CodeGen/Hexagon/memops3.ll
blob: 6210d1dfd33c9076e1751bc8eeb8f5293d66472f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
; RUN: llc -mtriple=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
; Generate MemOps for V4 and above.


define void @f(ptr nocapture %p) nounwind {
entry:
; CHECK:  memb(r{{[0-9]+}}+#10) -= #1
  %add.ptr = getelementptr inbounds i8, ptr %p, i32 10
  %0 = load i8, ptr %add.ptr, align 1
  %conv = zext i8 %0 to i32
  %sub = add nsw i32 %conv, 255
  %conv1 = trunc i32 %sub to i8
  store i8 %conv1, ptr %add.ptr, align 1
  ret void
}

define void @g(ptr nocapture %p, i32 %i) nounwind {
entry:
; CHECK:  memb(r{{[0-9]+}}+#10) -= #1
  %add.ptr.sum = add i32 %i, 10
  %add.ptr1 = getelementptr inbounds i8, ptr %p, i32 %add.ptr.sum
  %0 = load i8, ptr %add.ptr1, align 1
  %conv = zext i8 %0 to i32
  %sub = add nsw i32 %conv, 255
  %conv2 = trunc i32 %sub to i8
  store i8 %conv2, ptr %add.ptr1, align 1
  ret void
}