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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -O=2 -mtriple=avr-none --mcpu=avr128db28 -verify-machineinstrs | FileCheck %s
declare dso_local void @nil(i16 noundef) addrspace(1)
define void @complex_sbi() {
; CHECK-LABEL: complex_sbi:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: push r16
; CHECK-NEXT: push r17
; CHECK-NEXT: ldi r24, 0
; CHECK-NEXT: ldi r25, 0
; CHECK-NEXT: .LBB0_1: ; %while.cond
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
; CHECK-NEXT: sbi 1, 7
; CHECK-NEXT: adiw r24, 1
; CHECK-NEXT: movw r16, r24
; CHECK-NEXT: andi r24, 15
; CHECK-NEXT: andi r25, 0
; CHECK-NEXT: adiw r24, 1
; CHECK-NEXT: call nil
; CHECK-NEXT: movw r24, r16
; CHECK-NEXT: rjmp .LBB0_1
entry:
br label %while.cond
while.cond:
%s.0 = phi i16 [ 0, %entry ], [ %inc, %while.cond ]
%inc = add nuw nsw i16 %s.0, 1
%0 = load volatile i8, ptr inttoptr (i16 1 to ptr), align 1
%or = or i8 %0, -128
store volatile i8 %or, ptr inttoptr (i16 1 to ptr), align 1
%and = and i16 %inc, 15
%add = add nuw nsw i16 %and, 1
tail call addrspace(1) void @nil(i16 noundef %add)
br label %while.cond
}
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