1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=amdgcn -mcpu=tonga -show-mc-encoding | FileCheck -enable-var-scope -check-prefixes=PREGFX10-UNPACKED %s
; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx810 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx900 | FileCheck -enable-var-scope -check-prefixes=PREGFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1010 | FileCheck -enable-var-scope -check-prefixes=GFX10-PACKED %s
; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 | FileCheck -enable-var-scope -check-prefixes=GFX11-PACKED %s
define amdgpu_ps half @tbuffer_load_d16_x(ptr addrspace(8) inreg %rsrc) {
; PREGFX10-UNPACKED-LABEL: tbuffer_load_d16_x:
; PREGFX10-UNPACKED: ; %bb.0: ; %main_body
; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, 0 ; encoding: [0x80,0x02,0x00,0x7e]
; PREGFX10-UNPACKED-NEXT: tbuffer_load_format_d16_x v0, v0, s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_SNORM] idxen ; encoding: [0x00,0x20,0xb4,0xe8,0x00,0x00,0x00,0x80]
; PREGFX10-UNPACKED-NEXT: s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
; PREGFX10-UNPACKED-NEXT: ; return to shader part epilog
;
; PREGFX10-PACKED-LABEL: tbuffer_load_d16_x:
; PREGFX10-PACKED: ; %bb.0: ; %main_body
; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, 0
; PREGFX10-PACKED-NEXT: tbuffer_load_format_d16_x v0, v0, s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_SNORM] idxen
; PREGFX10-PACKED-NEXT: s_waitcnt vmcnt(0)
; PREGFX10-PACKED-NEXT: ; return to shader part epilog
;
; GFX10-PACKED-LABEL: tbuffer_load_d16_x:
; GFX10-PACKED: ; %bb.0: ; %main_body
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, 0
; GFX10-PACKED-NEXT: tbuffer_load_format_d16_x v0, v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
; GFX10-PACKED-NEXT: s_waitcnt vmcnt(0)
; GFX10-PACKED-NEXT: ; return to shader part epilog
;
; GFX11-PACKED-LABEL: tbuffer_load_d16_x:
; GFX11-PACKED: ; %bb.0: ; %main_body
; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, 0
; GFX11-PACKED-NEXT: tbuffer_load_d16_format_x v0, v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
; GFX11-PACKED-NEXT: s_waitcnt vmcnt(0)
; GFX11-PACKED-NEXT: ; return to shader part epilog
main_body:
%data = call half @llvm.amdgcn.struct.ptr.tbuffer.load.f16(ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0, i32 22, i32 0)
ret half %data
}
define amdgpu_ps half @tbuffer_load_d16_xy(ptr addrspace(8) inreg %rsrc) {
; PREGFX10-UNPACKED-LABEL: tbuffer_load_d16_xy:
; PREGFX10-UNPACKED: ; %bb.0: ; %main_body
; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, 0 ; encoding: [0x80,0x02,0x00,0x7e]
; PREGFX10-UNPACKED-NEXT: tbuffer_load_format_d16_xy v[0:1], v0, s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_SNORM] idxen ; encoding: [0x00,0xa0,0xb4,0xe8,0x00,0x00,0x00,0x80]
; PREGFX10-UNPACKED-NEXT: s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, v1 ; encoding: [0x01,0x03,0x00,0x7e]
; PREGFX10-UNPACKED-NEXT: ; return to shader part epilog
;
; PREGFX10-PACKED-LABEL: tbuffer_load_d16_xy:
; PREGFX10-PACKED: ; %bb.0: ; %main_body
; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, 0
; PREGFX10-PACKED-NEXT: tbuffer_load_format_d16_xy v0, v0, s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_SNORM] idxen
; PREGFX10-PACKED-NEXT: s_waitcnt vmcnt(0)
; PREGFX10-PACKED-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; PREGFX10-PACKED-NEXT: ; return to shader part epilog
;
; GFX10-PACKED-LABEL: tbuffer_load_d16_xy:
; GFX10-PACKED: ; %bb.0: ; %main_body
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, 0
; GFX10-PACKED-NEXT: tbuffer_load_format_d16_xy v0, v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
; GFX10-PACKED-NEXT: s_waitcnt vmcnt(0)
; GFX10-PACKED-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX10-PACKED-NEXT: ; return to shader part epilog
;
; GFX11-PACKED-LABEL: tbuffer_load_d16_xy:
; GFX11-PACKED: ; %bb.0: ; %main_body
; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, 0
; GFX11-PACKED-NEXT: tbuffer_load_d16_format_xy v0, v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
; GFX11-PACKED-NEXT: s_waitcnt vmcnt(0)
; GFX11-PACKED-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11-PACKED-NEXT: ; return to shader part epilog
main_body:
%data = call <2 x half> @llvm.amdgcn.struct.ptr.tbuffer.load.v2f16(ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0, i32 22, i32 0)
%elt = extractelement <2 x half> %data, i32 1
ret half %elt
}
define amdgpu_ps half @tbuffer_load_d16_xyz(ptr addrspace(8) inreg %rsrc) {
; PREGFX10-UNPACKED-LABEL: tbuffer_load_d16_xyz:
; PREGFX10-UNPACKED: ; %bb.0: ; %main_body
; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, 0 ; encoding: [0x80,0x02,0x00,0x7e]
; PREGFX10-UNPACKED-NEXT: tbuffer_load_format_d16_xyz v[0:2], v0, s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_SNORM] idxen ; encoding: [0x00,0x20,0xb5,0xe8,0x00,0x00,0x00,0x80]
; PREGFX10-UNPACKED-NEXT: s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, v2 ; encoding: [0x02,0x03,0x00,0x7e]
; PREGFX10-UNPACKED-NEXT: ; return to shader part epilog
;
; PREGFX10-PACKED-LABEL: tbuffer_load_d16_xyz:
; PREGFX10-PACKED: ; %bb.0: ; %main_body
; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, 0
; PREGFX10-PACKED-NEXT: tbuffer_load_format_d16_xyz v[0:1], v0, s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_SNORM] idxen
; PREGFX10-PACKED-NEXT: s_waitcnt vmcnt(0)
; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, v1
; PREGFX10-PACKED-NEXT: ; return to shader part epilog
;
; GFX10-PACKED-LABEL: tbuffer_load_d16_xyz:
; GFX10-PACKED: ; %bb.0: ; %main_body
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, 0
; GFX10-PACKED-NEXT: tbuffer_load_format_d16_xyz v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
; GFX10-PACKED-NEXT: s_waitcnt vmcnt(0)
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, v1
; GFX10-PACKED-NEXT: ; return to shader part epilog
;
; GFX11-PACKED-LABEL: tbuffer_load_d16_xyz:
; GFX11-PACKED: ; %bb.0: ; %main_body
; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, 0
; GFX11-PACKED-NEXT: tbuffer_load_d16_format_xyz v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
; GFX11-PACKED-NEXT: s_waitcnt vmcnt(0)
; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, v1
; GFX11-PACKED-NEXT: ; return to shader part epilog
main_body:
%data = call <3 x half> @llvm.amdgcn.struct.ptr.tbuffer.load.v3f16(ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0, i32 22, i32 0)
%elt = extractelement <3 x half> %data, i32 2
ret half %elt
}
define amdgpu_ps half @tbuffer_load_d16_xyzw(ptr addrspace(8) inreg %rsrc) {
; PREGFX10-UNPACKED-LABEL: tbuffer_load_d16_xyzw:
; PREGFX10-UNPACKED: ; %bb.0: ; %main_body
; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, 0 ; encoding: [0x80,0x02,0x00,0x7e]
; PREGFX10-UNPACKED-NEXT: tbuffer_load_format_d16_xyzw v[0:3], v0, s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_SNORM] idxen ; encoding: [0x00,0xa0,0xb5,0xe8,0x00,0x00,0x00,0x80]
; PREGFX10-UNPACKED-NEXT: s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
; PREGFX10-UNPACKED-NEXT: v_mov_b32_e32 v0, v3 ; encoding: [0x03,0x03,0x00,0x7e]
; PREGFX10-UNPACKED-NEXT: ; return to shader part epilog
;
; PREGFX10-PACKED-LABEL: tbuffer_load_d16_xyzw:
; PREGFX10-PACKED: ; %bb.0: ; %main_body
; PREGFX10-PACKED-NEXT: v_mov_b32_e32 v0, 0
; PREGFX10-PACKED-NEXT: tbuffer_load_format_d16_xyzw v[0:1], v0, s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_SNORM] idxen
; PREGFX10-PACKED-NEXT: s_waitcnt vmcnt(0)
; PREGFX10-PACKED-NEXT: v_lshrrev_b32_e32 v0, 16, v1
; PREGFX10-PACKED-NEXT: ; return to shader part epilog
;
; GFX10-PACKED-LABEL: tbuffer_load_d16_xyzw:
; GFX10-PACKED: ; %bb.0: ; %main_body
; GFX10-PACKED-NEXT: v_mov_b32_e32 v0, 0
; GFX10-PACKED-NEXT: tbuffer_load_format_d16_xyzw v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
; GFX10-PACKED-NEXT: s_waitcnt vmcnt(0)
; GFX10-PACKED-NEXT: v_lshrrev_b32_e32 v0, 16, v1
; GFX10-PACKED-NEXT: ; return to shader part epilog
;
; GFX11-PACKED-LABEL: tbuffer_load_d16_xyzw:
; GFX11-PACKED: ; %bb.0: ; %main_body
; GFX11-PACKED-NEXT: v_mov_b32_e32 v0, 0
; GFX11-PACKED-NEXT: tbuffer_load_d16_format_xyzw v[0:1], v0, s[0:3], 0 format:[BUF_FMT_32_FLOAT] idxen
; GFX11-PACKED-NEXT: s_waitcnt vmcnt(0)
; GFX11-PACKED-NEXT: v_lshrrev_b32_e32 v0, 16, v1
; GFX11-PACKED-NEXT: ; return to shader part epilog
main_body:
%data = call <4 x half> @llvm.amdgcn.struct.ptr.tbuffer.load.v4f16(ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0, i32 22, i32 0)
%elt = extractelement <4 x half> %data, i32 3
ret half %elt
}
declare half @llvm.amdgcn.struct.ptr.tbuffer.load.f16(ptr addrspace(8), i32, i32, i32, i32, i32)
declare <2 x half> @llvm.amdgcn.struct.ptr.tbuffer.load.v2f16(ptr addrspace(8), i32, i32, i32, i32, i32)
declare <3 x half> @llvm.amdgcn.struct.ptr.tbuffer.load.v3f16(ptr addrspace(8), i32, i32, i32, i32, i32)
declare <4 x half> @llvm.amdgcn.struct.ptr.tbuffer.load.v4f16(ptr addrspace(8), i32, i32, i32, i32, i32)
|
