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|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=amdgpu-prepare-agpr-alloc -o - %s | FileCheck -check-prefixes=HAS-AGPR,GFX90A %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass=amdgpu-prepare-agpr-alloc -o - %s | FileCheck -check-prefixes=HAS-AGPR,GFX908 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx906 -passes=amdgpu-prepare-agpr-alloc -o - %s | FileCheck -check-prefix=NO-AGPR %s
--- |
define void @func() {
ret void
}
; Attribute is ignored for gfx90a
define void @no_agprs() "amdgpu-agpr-alloc"="0,0" {
ret void
}
...
---
name: func
tracksRegLiveness: true
stack:
- { id: 0, size: 4 }
body: |
; HAS-AGPR-LABEL: name: func
; HAS-AGPR: bb.0:
; HAS-AGPR-NEXT: successors: %bb.1(0x80000000)
; HAS-AGPR-NEXT: liveins: $vgpr0
; HAS-AGPR-NEXT: {{ $}}
; HAS-AGPR-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 $vgpr0, implicit $exec
; HAS-AGPR-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; HAS-AGPR-NEXT: [[AV_MOV_:%[0-9]+]]:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 1, implicit $exec
; HAS-AGPR-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 65, implicit $exec
; HAS-AGPR-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
; HAS-AGPR-NEXT: [[AV_MOV_1:%[0-9]+]]:agpr_32 = AV_MOV_B32_IMM_PSEUDO 2, implicit $exec
; HAS-AGPR-NEXT: [[AV_MOV_2:%[0-9]+]]:agpr_32 = AV_MOV_B32_IMM_PSEUDO 6, implicit $exec
; HAS-AGPR-NEXT: {{ $}}
; HAS-AGPR-NEXT: bb.1:
; HAS-AGPR-NEXT: [[AV_MOV_3:%[0-9]+]]:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 3, implicit $exec
;
; NO-AGPR-LABEL: name: func
; NO-AGPR: bb.0:
; NO-AGPR-NEXT: successors: %bb.1(0x80000000)
; NO-AGPR-NEXT: liveins: $vgpr0
; NO-AGPR-NEXT: {{ $}}
; NO-AGPR-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 $vgpr0, implicit $exec
; NO-AGPR-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; NO-AGPR-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
; NO-AGPR-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 65, implicit $exec
; NO-AGPR-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
; NO-AGPR-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec
; NO-AGPR-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 6, implicit $exec
; NO-AGPR-NEXT: {{ $}}
; NO-AGPR-NEXT: bb.1:
; NO-AGPR-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
bb.0:
liveins: $vgpr0
%0:vgpr_32 = V_MOV_B32_e32 $vgpr0, implicit $exec
%1:agpr_32 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
%2:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
%3:vgpr_32 = V_MOV_B32_e32 65, implicit $exec
%4:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
%5:agpr_32 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec
%6:agpr_32 = V_ACCVGPR_WRITE_B32_e64 6, implicit $exec
bb.1:
%7:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
...
---
name: no_agprs
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GFX90A-LABEL: name: no_agprs
; GFX90A: liveins: $vgpr0
; GFX90A-NEXT: {{ $}}
; GFX90A-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec
;
; GFX908-LABEL: name: no_agprs
; GFX908: liveins: $vgpr0
; GFX908-NEXT: {{ $}}
; GFX908-NEXT: [[AV_MOV_:%[0-9]+]]:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 1, implicit $exec
; GFX908-NEXT: [[AV_MOV_1:%[0-9]+]]:agpr_32 = AV_MOV_B32_IMM_PSEUDO 2, implicit $exec
;
; NO-AGPR-LABEL: name: no_agprs
; NO-AGPR: liveins: $vgpr0
; NO-AGPR-NEXT: {{ $}}
; NO-AGPR-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
; NO-AGPR-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec
%0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
%1:agpr_32 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec
...
|
