1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SDAGISEL
; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FASTISEL
; RUN: llc -mtriple=aarch64-apple-darwin -global-isel -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GISEL
; First test the different supported value types for select.
define zeroext i1 @select_i1(i1 zeroext %c, i1 zeroext %a, i1 zeroext %b) {
; CHECK-SDAGISEL-LABEL: select_i1:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: cmp w0, #0
; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_i1:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: tst w0, #0x1
; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne
; CHECK-FASTISEL-NEXT: and w0, w8, #0x1
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_i1:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: tst w0, #0x1
; CHECK-GISEL-NEXT: csel w0, w1, w2, ne
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, i1 %a, i1 %b
ret i1 %1
}
define zeroext i8 @select_i8(i1 zeroext %c, i8 zeroext %a, i8 zeroext %b) {
; CHECK-SDAGISEL-LABEL: select_i8:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: cmp w0, #0
; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_i8:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: tst w0, #0x1
; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne
; CHECK-FASTISEL-NEXT: uxtb w0, w8
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_i8:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: tst w0, #0x1
; CHECK-GISEL-NEXT: csel w0, w1, w2, ne
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, i8 %a, i8 %b
ret i8 %1
}
define zeroext i16 @select_i16(i1 zeroext %c, i16 zeroext %a, i16 zeroext %b) {
; CHECK-SDAGISEL-LABEL: select_i16:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: cmp w0, #0
; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_i16:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: tst w0, #0x1
; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne
; CHECK-FASTISEL-NEXT: uxth w0, w8
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_i16:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: tst w0, #0x1
; CHECK-GISEL-NEXT: csel w0, w1, w2, ne
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, i16 %a, i16 %b
ret i16 %1
}
define i32 @select_i32(i1 zeroext %c, i32 %a, i32 %b) {
; CHECK-SDAGISEL-LABEL: select_i32:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: cmp w0, #0
; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_i32:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: tst w0, #0x1
; CHECK-FASTISEL-NEXT: csel w0, w1, w2, ne
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_i32:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: tst w0, #0x1
; CHECK-GISEL-NEXT: csel w0, w1, w2, ne
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, i32 %a, i32 %b
ret i32 %1
}
define i64 @select_i64(i1 zeroext %c, i64 %a, i64 %b) {
; CHECK-SDAGISEL-LABEL: select_i64:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: cmp w0, #0
; CHECK-SDAGISEL-NEXT: csel x0, x1, x2, ne
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_i64:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: tst w0, #0x1
; CHECK-FASTISEL-NEXT: csel x0, x1, x2, ne
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_i64:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: tst w0, #0x1
; CHECK-GISEL-NEXT: csel x0, x1, x2, ne
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, i64 %a, i64 %b
ret i64 %1
}
define float @select_f32(i1 zeroext %c, float %a, float %b) {
; CHECK-SDAGISEL-LABEL: select_f32:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: cmp w0, #0
; CHECK-SDAGISEL-NEXT: fcsel s0, s0, s1, ne
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_f32:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: tst w0, #0x1
; CHECK-FASTISEL-NEXT: fcsel s0, s0, s1, ne
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_f32:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: tst w0, #0x1
; CHECK-GISEL-NEXT: fcsel s0, s0, s1, ne
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, float %a, float %b
ret float %1
}
define double @select_f64(i1 zeroext %c, double %a, double %b) {
; CHECK-SDAGISEL-LABEL: select_f64:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: cmp w0, #0
; CHECK-SDAGISEL-NEXT: fcsel d0, d0, d1, ne
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_f64:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: tst w0, #0x1
; CHECK-FASTISEL-NEXT: fcsel d0, d0, d1, ne
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_f64:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: tst w0, #0x1
; CHECK-GISEL-NEXT: fcsel d0, d0, d1, ne
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, double %a, double %b
ret double %1
}
; Now test the folding of all compares.
define float @select_fcmp_false(float %x, float %a, float %b) {
; CHECK-SDAGISEL-LABEL: select_fcmp_false:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: fmov s0, s2
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_fcmp_false:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: fmov s0, s2
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_fcmp_false:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: fcmp s0, s0
; CHECK-GISEL-NEXT: fcsel s0, s1, s2, gt
; CHECK-GISEL-NEXT: ret
%1 = fcmp ogt float %x, %x
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_ogt(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_ogt:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, gt
; CHECK-NEXT: ret
%1 = fcmp ogt float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_oge(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_oge:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, ge
; CHECK-NEXT: ret
%1 = fcmp oge float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_olt(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_olt:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, mi
; CHECK-NEXT: ret
%1 = fcmp olt float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_ole(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_ole:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, ls
; CHECK-NEXT: ret
%1 = fcmp ole float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_one(float %x, float %y, float %a, float %b) {
; CHECK-SDAGISEL-LABEL: select_fcmp_one:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: fcmp s0, s1
; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s3, mi
; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s0, gt
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_fcmp_one:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: fcmp s0, s1
; CHECK-FASTISEL-NEXT: fcsel s0, s2, s3, mi
; CHECK-FASTISEL-NEXT: fcsel s0, s2, s0, gt
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_fcmp_one:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: fcmp s0, s1
; CHECK-GISEL-NEXT: cset w8, mi
; CHECK-GISEL-NEXT: cset w9, gt
; CHECK-GISEL-NEXT: orr w8, w8, w9
; CHECK-GISEL-NEXT: tst w8, #0x1
; CHECK-GISEL-NEXT: fcsel s0, s2, s3, ne
; CHECK-GISEL-NEXT: ret
%1 = fcmp one float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_ord(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_ord:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, vc
; CHECK-NEXT: ret
%1 = fcmp ord float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_uno(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_uno:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, vs
; CHECK-NEXT: ret
%1 = fcmp uno float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_ueq(float %x, float %y, float %a, float %b) {
; CHECK-SDAGISEL-LABEL: select_fcmp_ueq:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: fcmp s0, s1
; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s3, eq
; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s0, vs
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_fcmp_ueq:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: fcmp s0, s1
; CHECK-FASTISEL-NEXT: fcsel s0, s2, s3, eq
; CHECK-FASTISEL-NEXT: fcsel s0, s2, s0, vs
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_fcmp_ueq:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: fcmp s0, s1
; CHECK-GISEL-NEXT: cset w8, eq
; CHECK-GISEL-NEXT: cset w9, vs
; CHECK-GISEL-NEXT: orr w8, w8, w9
; CHECK-GISEL-NEXT: tst w8, #0x1
; CHECK-GISEL-NEXT: fcsel s0, s2, s3, ne
; CHECK-GISEL-NEXT: ret
%1 = fcmp ueq float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_ugt(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_ugt:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, hi
; CHECK-NEXT: ret
%1 = fcmp ugt float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_uge(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_uge:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, pl
; CHECK-NEXT: ret
%1 = fcmp uge float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_ult(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_ult:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, lt
; CHECK-NEXT: ret
%1 = fcmp ult float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_ule(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_ule:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, le
; CHECK-NEXT: ret
%1 = fcmp ule float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_une(float %x, float %y, float %a, float %b) {
; CHECK-LABEL: select_fcmp_une:
; CHECK: ; %bb.0:
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: fcsel s0, s2, s3, ne
; CHECK-NEXT: ret
%1 = fcmp une float %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_fcmp_true(float %x, float %a, float %b) {
; CHECK-SDAGISEL-LABEL: select_fcmp_true:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: fmov s0, s1
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_fcmp_true:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: fmov s0, s1
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_fcmp_true:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: fcmp s0, s0
; CHECK-GISEL-NEXT: cset w8, eq
; CHECK-GISEL-NEXT: cset w9, vs
; CHECK-GISEL-NEXT: orr w8, w8, w9
; CHECK-GISEL-NEXT: tst w8, #0x1
; CHECK-GISEL-NEXT: fcsel s0, s1, s2, ne
; CHECK-GISEL-NEXT: ret
%1 = fcmp ueq float %x, %x
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_eq(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_eq:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, eq
; CHECK-NEXT: ret
%1 = icmp eq i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_ne(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_ne:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, ne
; CHECK-NEXT: ret
%1 = icmp ne i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_ugt(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_ugt:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, hi
; CHECK-NEXT: ret
%1 = icmp ugt i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_uge(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_uge:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, hs
; CHECK-NEXT: ret
%1 = icmp uge i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_ult(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_ult:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, lo
; CHECK-NEXT: ret
%1 = icmp ult i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_ule(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_ule:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, ls
; CHECK-NEXT: ret
%1 = icmp ule i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_sgt(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_sgt:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, gt
; CHECK-NEXT: ret
%1 = icmp sgt i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_sge(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_sge:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, ge
; CHECK-NEXT: ret
%1 = icmp sge i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_slt(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_slt:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, lt
; CHECK-NEXT: ret
%1 = icmp slt i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
define float @select_icmp_sle(i32 %x, i32 %y, float %a, float %b) {
; CHECK-LABEL: select_icmp_sle:
; CHECK: ; %bb.0:
; CHECK-NEXT: cmp w0, w1
; CHECK-NEXT: fcsel s0, s0, s1, le
; CHECK-NEXT: ret
%1 = icmp sle i32 %x, %y
%2 = select i1 %1, float %a, float %b
ret float %2
}
; Test peephole optimizations for select.
define zeroext i1 @select_opt1(i1 zeroext %c, i1 zeroext %a) {
; CHECK-LABEL: select_opt1:
; CHECK: ; %bb.0:
; CHECK-NEXT: orr w8, w0, w1
; CHECK-NEXT: and w0, w8, #0x1
; CHECK-NEXT: ret
%1 = select i1 %c, i1 true, i1 %a
ret i1 %1
}
define zeroext i1 @select_opt2(i1 zeroext %c, i1 zeroext %a) {
; CHECK-SDAGISEL-LABEL: select_opt2:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: orn w8, w1, w0
; CHECK-SDAGISEL-NEXT: and w0, w8, #0x1
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_opt2:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: eor w8, w0, #0x1
; CHECK-FASTISEL-NEXT: orr w8, w8, w1
; CHECK-FASTISEL-NEXT: and w0, w8, #0x1
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_opt2:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: eor w8, w0, #0x1
; CHECK-GISEL-NEXT: orr w8, w8, w1
; CHECK-GISEL-NEXT: and w0, w8, #0x1
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, i1 %a, i1 true
ret i1 %1
}
define zeroext i1 @select_opt3(i1 zeroext %c, i1 zeroext %a) {
; CHECK-SDAGISEL-LABEL: select_opt3:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: eor w8, w0, #0x1
; CHECK-SDAGISEL-NEXT: and w0, w8, w1
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_opt3:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: bic w8, w1, w0
; CHECK-FASTISEL-NEXT: and w0, w8, #0x1
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_opt3:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: eor w8, w0, #0x1
; CHECK-GISEL-NEXT: and w0, w8, w1
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, i1 false, i1 %a
ret i1 %1
}
define zeroext i1 @select_opt4(i1 zeroext %c, i1 zeroext %a) {
; CHECK-SDAGISEL-LABEL: select_opt4:
; CHECK-SDAGISEL: ; %bb.0:
; CHECK-SDAGISEL-NEXT: and w0, w0, w1
; CHECK-SDAGISEL-NEXT: ret
;
; CHECK-FASTISEL-LABEL: select_opt4:
; CHECK-FASTISEL: ; %bb.0:
; CHECK-FASTISEL-NEXT: and w8, w0, w1
; CHECK-FASTISEL-NEXT: and w0, w8, #0x1
; CHECK-FASTISEL-NEXT: ret
;
; CHECK-GISEL-LABEL: select_opt4:
; CHECK-GISEL: ; %bb.0:
; CHECK-GISEL-NEXT: and w0, w0, w1
; CHECK-GISEL-NEXT: ret
%1 = select i1 %c, i1 %a, i1 false
ret i1 %1
}
|
