1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=4 -mvscale-max=4 -O1 -emit-llvm -o - %s | FileCheck %s
// REQUIRES: riscv-registered-target
#include <stdint.h>
typedef __rvv_int8m1_t vint8m1_t;
typedef __rvv_uint8m1_t vuint8m1_t;
typedef __rvv_int16m1_t vint16m1_t;
typedef __rvv_uint16m1_t vuint16m1_t;
typedef __rvv_int32m1_t vint32m1_t;
typedef __rvv_uint32m1_t vuint32m1_t;
typedef __rvv_int64m1_t vint64m1_t;
typedef __rvv_uint64m1_t vuint64m1_t;
typedef __rvv_float32m1_t vfloat32m1_t;
typedef __rvv_float64m1_t vfloat64m1_t;
typedef __rvv_bool1_t vbool1_t;
typedef __rvv_bool4_t vbool4_t;
typedef __rvv_bool32_t vbool32_t;
typedef vint64m1_t fixed_int64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
typedef vint32m1_t fixed_int32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
typedef int32_t gnu_int32m1_t __attribute__((vector_size(__riscv_v_fixed_vlen / 8)));
typedef vbool1_t fixed_bool1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
typedef vbool4_t fixed_bool4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/4)));
typedef vbool32_t fixed_bool32_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/32)));
// CHECK-LABEL: @to_vint32m1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 2 x i32> [[TYPE_COERCE:%.*]]
//
vint32m1_t to_vint32m1_t(fixed_int32m1_t type) {
return type;
}
// CHECK-LABEL: @from_vint32m1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 2 x i32> [[TYPE:%.*]]
//
fixed_int32m1_t from_vint32m1_t(vint32m1_t type) {
return type;
}
// CHECK-LABEL: @to_vfloat64m1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 1 x double> [[TYPE_COERCE:%.*]]
//
vfloat64m1_t to_vfloat64m1_t(fixed_float64m1_t type) {
return type;
}
// CHECK-LABEL: @from_vfloat64m1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 1 x double> [[TYPE:%.*]]
//
fixed_float64m1_t from_vfloat64m1_t(vfloat64m1_t type) {
return type;
}
// CHECK-LABEL: @from_vbool1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 64 x i1> [[TYPE:%.*]]
//
fixed_bool1_t from_vbool1_t(vbool1_t type) {
return type;
}
// CHECK-LABEL: @to_vbool1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 64 x i1> [[TMP0:%.*]]
//
vbool1_t to_vbool1_t(fixed_bool1_t type) {
return type;
}
// CHECK-LABEL: @from_vbool4_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 16 x i1> [[TYPE:%.*]]
//
fixed_bool4_t from_vbool4_t(vbool4_t type) {
return type;
}
// CHECK-LABEL: @to_vbool4_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0:%.*]]
//
vbool4_t to_vbool4_t(fixed_bool4_t type) {
return type;
}
// CHECK-LABEL: @from_vbool32_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 2 x i1> [[TYPE:%.*]]
//
fixed_bool32_t from_vbool32_t(vbool32_t type) {
return type;
}
// CHECK-LABEL: @to_vbool32_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: ret <vscale x 2 x i1> [[TMP0:%.*]]
//
vbool32_t to_vbool32_t(fixed_bool32_t type) {
return type;
}
// CHECK-LABEL: @to_vint32m1_t__from_gnu_int32m1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TYPE:%.*]] = load <8 x i32>, ptr [[TMP0:%.*]], align 32, !tbaa [[TBAA6:![0-9]+]]
// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[TYPE]], i64 0)
// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]
//
vint32m1_t to_vint32m1_t__from_gnu_int32m1_t(gnu_int32m1_t type) {
return type;
}
// CHECK-LABEL: @from_vint32m1_t__to_gnu_int32m1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[CAST_FIXED:%.*]] = tail call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[TYPE:%.*]], i64 0)
// CHECK-NEXT: store <8 x i32> [[CAST_FIXED]], ptr [[AGG_RESULT:%.*]], align 32, !tbaa [[TBAA6]]
// CHECK-NEXT: ret void
//
gnu_int32m1_t from_vint32m1_t__to_gnu_int32m1_t(vint32m1_t type) {
return type;
}
// CHECK-LABEL: @to_fixed_int32m1_t__from_gnu_int32m1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TYPE:%.*]] = load <8 x i32>, ptr [[TMP0:%.*]], align 32, !tbaa [[TBAA6]]
// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[TYPE]], i64 0)
// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]
//
fixed_int32m1_t to_fixed_int32m1_t__from_gnu_int32m1_t(gnu_int32m1_t type) {
return type;
}
// CHECK-LABEL: @from_fixed_int32m1_t__to_gnu_int32m1_t(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TYPE:%.*]] = tail call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[TYPE_COERCE:%.*]], i64 0)
// CHECK-NEXT: store <8 x i32> [[TYPE]], ptr [[AGG_RESULT:%.*]], align 32, !tbaa [[TBAA6]]
// CHECK-NEXT: ret void
//
gnu_int32m1_t from_fixed_int32m1_t__to_gnu_int32m1_t(fixed_int32m1_t type) {
return type;
}
|
