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14 days[MLIR][OpenMP] Add TableGen pseudo-generator for OpenMP-specific verification...Sergio Afonso2-0/+167
2024-07-07[mlir] load dialect in parser for optional parameters (#96667)Jeremy Kun2-3/+16
2024-07-02mlir/LogicalResult: move into llvm (#97309)Ramkumar Ramachandra14-29/+26
2024-06-27[mlir] Fix -Wextra-semi warnings in generated code (NFC) (#96981)akirchhoff-modular1-1/+1
2024-06-24[mlir][linalg] Implement patterns for reducing rank of named linalg contracti...srcarroll1-0/+2
2024-06-21[mlir] load dialects for non-namespaced attrs (#96242)Mehdi Amini1-2/+22
2024-06-20[mlir][gpu] Remove old GPU serialization passes (#94998)Fabian Mora1-4/+0
2024-06-19[mlir][side effect] refactor(*): Include more precise side effects (#94213)donald chen1-6/+12
2024-06-19Avoid object libraries in the VS IDE (#93519)Michael Kruse1-0/+1
2024-06-17[mlir][drr] Fix variadic destination emission (#95855)Jacques Pienaar1-6/+9
2024-06-10[mlir][Arith] Generalize and improve -int-range-optimizations (#94712)Krzysztof Drewniak1-2/+6
2024-06-09[mlir][nfc] Sort test passes registration (#94201)Ivan Butygin1-34/+34
2024-05-28[mlir][linalg] Add more precise memory effects to linalg op (#92079)donald chen1-2/+1
2024-05-25[mlir] Revise IDE folder structure (#89749)Michael Kruse4-3/+2
2024-05-24[mlir][drr] Allow variadic in rewrite side (#93340)Jacques Pienaar1-0/+27
2024-05-23merge code for llvm.emit_c_interface into convertFuncOpToLLVMFuncOp (#92986)drazi1-0/+2
2024-05-23[mlir][ods] Optimize FoldAdaptor constructor (#93219)Jeff Niu1-9/+20
2024-05-15[mlir][ods] Populate properties in generated builder (#90430)Jacques Pienaar1-25/+79
2024-05-14[MLIR][Linalg] Ternary Op & Linalg select (#91461)Petr Kurapov1-1/+9
2024-05-13[MLIR] NFC: change variable name to lowercase to follow mlir convention. (#91...Daniel Chen1-1/+1
2024-05-13[NFC] Make NVGPU casing consistent (#91903)tyb08071-2/+2
2024-05-08[mlir] Use StringRef::operator== instead of StringRef::equals (NFC) (#91560)Kazu Hirata2-3/+3
2024-05-08[mlir] Fixing a regression that '-D' option of llvm-tblgen is unregistered. (...Daniel Chen1-0/+10
2024-05-04[mlir][ODS][NFC] Deduplicate `ref` and `qualified` handling (#91080)Markus Böck4-78/+60
2024-05-02[mlir] remove test-tranfsorm-dialect-interpreter (#89931)Oleksandr "Alex" Zinenko1-2/+0
2024-04-24[mlir][ods] Allow sharding of op definitions (#89423)Jeff Niu5-36/+286
2024-04-15[mlir][scf] Uplift `scf.while` to `scf.for` (#76108)Ivan Butygin1-0/+2
2024-04-15[mlir][ODS] Make `prop-dict` behave closer to `attr-dict` (#88659)Markus Böck1-4/+114
2024-04-12[mlir][ods] Do not print default-valued properties when the value is equal to...Beal Wang1-1/+22
2024-04-08[mlir] Only inline if properties are used.Adrian Kuegel1-2/+2
2024-04-07[mlir] Add `convertInstruction` and `getSupportedInstructions` to `LLVMImport...Fabian Mora1-0/+2
2024-04-06[mlir][ods] Emit "trivial" ODS getter/setters inline (#87741)Jeff Niu1-41/+60
2024-04-05[mlir][OpFormatGen][NFC] Change Raw{Operands,Types} arrays to objects (#85631)Andrei Golubev1-11/+12
2024-04-04[mlir][ods] Fix attribute setter gen when properties are on (#87688)Jeff Niu1-13/+39
2024-04-04[mlir][linalg] Fix builder API usage in `RegionBuilderHelper` (#87451)Matthias Springer1-1/+1
2024-04-02[mlir][pass] Add composite pass utility (#87166)Ivan Butygin1-0/+2
2024-03-26[MLIR][LLVM] Add `llvm.experimental.constrained.fptrunc` operation (#86260)Victor Perez1-0/+4
2024-03-25[ODS][NFC] Cast range.size() to int32_t in accumulation (#85629)Andrei Golubev1-1/+1
2024-03-18[mlir][OpInterfacesGen][NFC] Add newline after traits declaration (#85633)Andrei Golubev1-1/+1
2024-03-17[mlir] Work around MSVC bugBenjamin Kramer1-2/+2
2024-03-14[mlir] Make the split markers of splitAndProcessBuffer configurable. (#84765)Ingo Müller1-6/+15
2024-03-13[mlir][ods] Fix generation of optional custom parsers (#84821)Jeff Niu2-5/+5
2024-03-08[mlir][ArmNeon] Implements LowerVectorToArmNeon Pattern for SMMLA (#81895)Kojo Acquah2-0/+3
2024-03-06[mlir][opt] Expose MLIR_ENABLE_DEPRECATED_GPU_SER... in mlir-config.h. (#84006)Ingo Müller2-9/+2
2024-03-06[mlir][drr] Add warning for simple case of mismatched variadic. (#84040)Jacques Pienaar1-0/+28
2024-03-05[mlir][irdl] Add support for basic structural constraints in tblgen-to-irdl (...Fehr Mathieu1-7/+41
2024-03-04[mlir][NFC] Apply rule of five to *Pass classes (#80998)Andrei Golubev1-0/+8
2024-02-29[MLIR][Affine] Add test pass for affine isContiguousAccess (#82923)Uday Bondhugula1-0/+2
2024-02-23[mlir][ArmSME] Add test-lower-to-arm-sme pipeline (#81732)Cullen Rhodes2-0/+3
2024-02-21[MLIR][Python] Use ir.Value directly instead of _SubClassValueT (#82341)Sergei Lebedev1-11/+7
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