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2024-05-05[AMDGPU] Improve MIR pattern for FMinFMaxLegacy combine. NFC. (#90968)Jay Foad2-12/+11
2024-05-05[X86] Support icmp_i64(i64 X, i64 Y) --> icmp_i32(trunc(X), trunc(Y)) for non...Simon Pilgrim3-12/+12
2024-05-04Revert "SystemZ: Fold copy of vector immediate to gr128" (#91099)Vitaly Buka3-243/+0
2024-05-05[SelectionDAG] Make ARITH_FENCE support half and bfloat type (#90836)Phoebe Wang3-0/+162
2024-05-04[TableGen] Use bitwise operations to access HwMode ID. (#88377)superZWT1237-58/+652
2024-05-04[LV,LAA] Don't vectorize loops with load and store to invar address.Florian Hahn4-18/+43
2024-05-04[Transforms] Use StringRef::operator== instead of StringRef::equals (NFC) (#9...Kazu Hirata10-28/+26
2024-05-04[SLP][NFC]Use std::optional::value_or.Alexey Bataev1-1/+1
2024-05-04Revert "llvm/lib/CodeGen/TargetSchedule.cpp:132:12: warning: Assert statement...David Blaikie1-2/+1
2024-05-04llvm/lib/CodeGen/TargetSchedule.cpp:132:12: warning: Assert statement modifie...akshaykumars6141-1/+2
2024-05-04Revert 4 last AMDGPU commits to unbreak Windows botsMehdi Amini8-1890/+0
2024-05-04Add clarifying parenthesis around non-trivial conditions in ternary expressio...luolent6-10/+10
2024-05-04[Support] Use StringRef::operator== instead of StringRef::equals (NFC) (#91042)Kazu Hirata8-18/+17
2024-05-04[DAG] Fold freeze(shuffle(x,y,m)) -> shuffle(freeze(x),freeze(y),m) (#90952)Simon Pilgrim7-754/+478
2024-05-04[C API] Add function to create ConstantRange attributes to C API (#90505)Andreas Jonson4-0/+62
2024-05-04[InstCombine] Do not request non-splat vector support in code reviews (NFC) (...Nikita Popov1-0/+8
2024-05-04[Instrumentation] Support verifying machine function (#90931)paperchalice6-2/+33
2024-05-03Update GettingInvolved.rst (#91008)Maksim Levental1-1/+1
2024-05-03[Attributor][NFC] update tests (#91011)Johannes Doerfert103-1398/+1338
2024-05-03[AArch64] Pre-commit another test case for #90936. NFCCraig Topper1-0/+25
2024-05-03[tsan] Don't crash on vscale (#91018)Vitaly Buka2-0/+16
2024-05-03[MemProf] Optionally match profiles on to manually hinted hot/cold new (#91027)Teresa Johnson2-1/+104
2024-05-03[SLP]Fix PR90892: do a correct sign analysis of the entries elements in gathe...Alexey Bataev2-5/+24
2024-05-03Revert "[gn] port 2d4acb086541 (LLVM_ENABLE_CURL)"Reid Kleckner1-7/+0
2024-05-03[ARM/X86] Standardize the isEligibleForTailCallOptimization prototypes (#90688)Reid Kleckner4-74/+62
2024-05-03[SLP][NFC]Add a test with incorrect casting of shuffled gathered values, NFC.Alexey Bataev1-0/+55
2024-05-03Revert "[BasicBlockUtils] Remove redundant llvm.dbg instructions after blocks...Jorge Gorbe Moya4-49/+2
2024-05-03[DirectX] Remove unneccary check lines (#90979)Chris B1-4/+0
2024-05-03AMDGPU: Add tests for minimum and maximum intrinsics (#90997)Matt Arsenault6-0/+31036
2024-05-03[InstCombine] Add example usage for new Checked matcher APINoah Goldstein2-20/+12
2024-05-03[InstCombine] Add non-splat test for `(icmp (lshr x, y), x)`; NFCNoah Goldstein1-8/+55
2024-05-03[PatternMatching] Add generic API for matching constants using custom conditionsNoah Goldstein2-0/+210
2024-05-03[Inliner] Propagate callee argument memory access attributes before inliningNoah Goldstein4-31/+108
2024-05-03[Inliner] Add tests for not propagating `writable` if `readonly` is present; NFCNoah Goldstein1-1/+44
2024-05-03[VectorCombine] Add foldShuffleToIdentity (#88693)David Green4-146/+212
2024-05-03[StandardInstrumentation] Annotate loops with the function name (#90756)annamthomas10-27/+28
2024-05-03[LV] Add test showing miscompile with store reductions and RT checks.Florian Hahn1-9/+44
2024-05-03[AMDGPU] Fix mode register pass for constrained FP operations (#90085)Abhinav Garg2-4/+8
2024-05-03AMDGPU: Use umin in set.rounding expansionMatt Arsenault2-111/+57
2024-05-03[docs,utils] Convert text files from CRLF to LFFangrui Song7-1185/+1185
2024-05-03[test] Convert text files from CRLF to LFFangrui Song23-2207/+2207
2024-05-03[test] Fix CodeGen/DirectX/strip-fn-attrs.llFangrui Song1-2/+1
2024-05-03[CostModel][X86] Treat lrint/llrint as fptosi calls (#90883)Simon Pilgrim6-484/+508
2024-05-03[DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits...Craig Topper2-2/+8
2024-05-03[tools,test] Convert text files from CRLF to LFFangrui Song16-662/+662
2024-05-03[DebugInfo,test] Convert text files from CRLF to LFFangrui Song74-2072/+2072
2024-05-03[AArch64] Add test for #90936. NFCCraig Topper1-0/+18
2024-05-03SystemZ: Fold copy of vector immediate to gr128 (#90706)Matt Arsenault3-0/+243
2024-05-03AMDGPU: Try to fix build error with old gccMatt Arsenault2-56/+57
2024-05-03[RISCV] Make parseArchString only accept [a-z0-9_]. (#90879)Craig Topper2-5/+6