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2024-06-21[SPIRV] #include "llvm/IR/PassInstrumentation.h"Fangrui Song1-0/+1
2024-06-21Add the 'initializes' attribute langref and support (#84803)Haopeng Liu2-0/+98
2024-06-21[TensorSpec] Avoid JSON.h include (NFC)Nikita Popov1-1/+2
2024-06-21[IR] Don't include PassInstrumentation.h in PassManager.h (NFC) (#96219)Nikita Popov3-0/+3
2024-06-21Revert "Intrinsic: introduce minimumnum and maximumnum (#93841)"Nikita Popov3-61/+6
2024-06-20[ProfileData] Teach addValueData to honor parameter Site (#96233)Kazu Hirata1-3/+3
2024-06-21Intrinsic: introduce minimumnum and maximumnum (#93841)YunQiang Su3-6/+61
2024-06-21[RISCV] Make M imply Zmmul (#95070)Jianjian Guan1-11/+21
2024-06-20[llvm][AArch64] SVE2 is an optional feature in ARMv9.0a (#96007)Jon Roelofs1-1/+1
2024-06-20[AArch64][TargetParser] Split FMV and extensions (#92882)Tomas Matheson1-2/+1
2024-06-20[IR] Remove support for shl constant expressions (#96037)Nikita Popov1-6/+2
2024-06-20[LLVM] Extend setModuleFlag interface. (#86031)Daniel Kiss1-0/+16
2024-06-19[Support] Add llvm::xxh3_128bits (#95863)Brendan Duke1-0/+69
2024-06-19[ADT] Fix incorrect const parent ptr type in ilist (#96059)Stephen Tozer3-6/+27
2024-06-19DenseMap: support enum class keys (#95972)Ramkumar Ramachandra1-2/+14
2024-06-18[LLVM] Add option to store Parent-pointer in ilist_node_base (#94224)Stephen Tozer5-3/+157
2024-06-18[MachineOutliner] Leaf Descendants (#90275)Xuan Zhang1-0/+134
2024-06-18[AArch64][TargetParser] move CPUInfo into tablegen [NFC] (#92145)Tomas Matheson1-175/+212
2024-06-17[LVI][ConstantRange] Generalize mask not equal conditions handlingAntonio Frighetto1-0/+48
2024-06-16Cleanup MC/DC intrinsics for #82448 (#95496)NAKAMURA Takumi1-3/+0
2024-06-15MathExtras: rewrite some methods to never overflow (#95556)Ramkumar Ramachandra1-2/+36
2024-06-14[Support] Add SipHash-based 16-bit ptrauth ABI-stable hash. (#93902)Ahmed Bougacha1-1/+19
2024-06-14[llvm][AArch64] Rearrange Apple CPUs by generation, not product class. NFC (#...Jon Roelofs1-31/+31
2024-06-14[llvm][AArch64] Support -mcpu=apple-m4 (#95478)Jon Roelofs1-1/+16
2024-06-14[Support] Integrate SipHash.cpp into libSupport. (#94394)Ahmed Bougacha2-1034/+59
2024-06-14[Support] Import SipHash c reference implementation. (#94393)Ahmed Bougacha2-0/+2829
2024-06-14[ProfileData] Sink the length checks (#95604)Kazu Hirata1-14/+16
2024-06-14[ProfileData] Migrate to a new version of getValueProfDataFromInst (#95568)Kazu Hirata1-16/+12
2024-06-14[ProfileData] Sink the length checks (#95559)Kazu Hirata1-11/+14
2024-06-14[ProfileData] Fix the order of tests (#95549)Kazu Hirata1-2/+2
2024-06-14[ProfileData] Migrate to getValueArrayForSite (#95493)Kazu Hirata1-34/+43
2024-06-14Reapply: [MC/DC][Coverage] Loosen the limit of NumConds from 6 (#82448)NAKAMURA Takumi1-2/+2
2024-06-14[SDPatternMatch] Only match ISD::SIGN_EXTEND in m_SExt (#95415)c8ef1-4/+0
2024-06-14[Error] Add non-consuming toString (#95375)Nikita Popov1-0/+10
2024-06-14Reapply#4 "[RemoveDIs] Load into new debug info format by default in LLVM (#8...Stephen Tozer8-211/+195
2024-06-14Revert "[MC/DC][Coverage] Loosen the limit of NumConds from 6 (#82448)"Hans Wennborg1-2/+2
2024-06-14[APFloat] Add APFloat support for FP4 data type (#95392)Durgadoss R1-5/+251
2024-06-14MathExtras/test: increase coverage (#95425)Ramkumar Ramachandra1-2/+44
2024-06-13[ProfileData] Migrate to getValueArrayForSite (#95457)Kazu Hirata1-5/+4
2024-06-13[llvm-project] Fix typo "seperate" (#95373)Jay Foad1-2/+2
2024-06-13[ProfileData] Add getValueArrayForSite (#95335)Kazu Hirata1-7/+7
2024-06-13MCExpr-ify AMDGPU PALMetadata (#93236)Janek van Oirschot2-0/+246
2024-06-13[MC/DC][Coverage] Loosen the limit of NumConds from 6 (#82448)NAKAMURA Takumi1-2/+2
2024-06-13[AArch64] Add support for Cortex-A725 and Cortex-X925 (#95214)Jonathan Thackray1-1/+35
2024-06-12[ProfileData] Compute sum in annotateValueSite (NFC) (#95199)Kazu Hirata1-9/+3
2024-06-12Reland "mlir/Presburger/MPInt: move into llvm/ADT" (#95254)Ramkumar Ramachandra2-0/+201
2024-06-12Revert #95218 and #94953 (#95244)Maksim Levental2-201/+0
2024-06-12mlir/Presburger/MPInt: move into llvm/ADT (#94953)Ramkumar Ramachandra2-0/+201
2024-06-12[RISCV] Add Smcsrind and Sscsrind extension (#93952)Monad1-0/+2
2024-06-12[RISCV] Add smcdeleg and ssccfg extensions (#95163)Monad1-0/+2
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