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2023-08-22Revert "[XCOFF][AIX] Peephole optimization for toc-data."llvmorg-17.0.0-rc3Sean Fertile3-82/+57
2023-08-22Revert "[PPC][AIX] Fix toc-data peephole bug and some related cleanup."Sean Fertile1-20/+0
2023-08-22[DAG] replaceStoreOfInsertLoad - don't fold if the inserted element is implic...Simon Pilgrim1-1/+10
2023-08-22[X86] Add test case for Issue #64655Simon Pilgrim1-0/+50
2023-08-22[RISCV] Support global address as inline asm memory operand of `m`wangpc1-0/+511
2023-08-22[RISCV][NFC] Move tests of inline asm memory constraints to separate filewangpc2-152/+277
2023-08-22[AArch64] [GlobalISel] Fix clobbered callee saved registers with win64 varargsMartin Storsjö1-0/+82
2023-08-22[BPF] Reset machine register kill mark in BPFMISimplifyPatchableEduard Zingerman1-0/+121
2023-08-22[X86]Support options -mno-gather -mno-scatterXinWang101-0/+199
2023-08-21AMDGPU: Fix fast f32 exp2Matt Arsenault3-54/+215
2023-08-21AMDGPU: Fix fast f32 log/log10Matt Arsenault2-156/+1250
2023-08-21AMDGPU: Fix fast math log2 f32Matt Arsenault1-60/+314
2023-08-21PreISelIntrinsicLowering: Check RuntimeLibcalls instead of TLI for memory fun...Matt Arsenault1-0/+32
2023-08-18[SelectionDAG] Use TypeSize variant of ComputeValueVTs to compute correct off...Paul Walker3-15/+13
2023-08-18[SVE] Add test to show incorrect code generation for scalable vector struct l...Paul Walker1-0/+35
2023-08-18[AArch64] Fix crash when neither Neon nor SVE are enabledFraser Cormack1-0/+48
2023-08-17[RISCV] Stop performFP_TO_INTCombine from folding with ISD::FRINT.Craig Topper3-0/+1386
2023-08-15[RISCV] Add bounds check before use on returned iterator.Anmol P. Paralkar1-0/+52
2023-08-15[SDAG] Don't transfer !range metadata without !noundef to SDAG (PR64589)Nikita Popov12-28/+28
2023-08-15[X86] Add test for PR64589 (NFC)Nikita Popov1-0/+25
2023-08-15[SelectionDAG] Fix problematic call to EVT::changeVectorElementType().Paul Walker1-10/+21
2023-08-14[BPF] Don't crash on missing line infoTamir Duberstein1-0/+54
2023-08-14[AMDGPU] Do not release VGPRs at -O0Jay Foad1-0/+558
2023-08-11[AArch64][PtrAuth] Fix unwind state for tail callsOliver Stannard4-24/+204
2023-08-11[AArch64] Refactor checks in sign-return-address.ll testAnatoly Trosinenko1-109/+219
2023-08-11[PPC][AIX] Fix toc-data peephole bug and some related cleanup.Sean Fertile1-0/+20
2023-08-10[RISCV] Add back handling of X > -1 to ISD::SETCC lowering.Craig Topper1-0/+37
2023-08-10[CodeGen] Disable FP LD1RX instructions generation for Neoverse-V1Igor Kirillov1-171/+395
2023-08-10[CodeGen] Fix incorrect pattern FMLA_* pseudo instructionsIgor Kirillov1-6/+12
2023-08-10[CodeGen] Precommit tests for D157095Igor Kirillov1-0/+33
2023-08-10[CodeGen] Pre-commit tests showing incorrect pattern FMLA_* pseudo instructionsIgor Kirillov1-0/+34
2023-08-09[LoongArch] Support -march=native and -mtune=Weining Lu2-0/+27
2023-08-09Revert "Reland "[LoongArch] Support -march=native and -mtune=""Steven Wu2-27/+0
2023-08-07Revert "[CodeGen]Allow targets to use target specific COPY instructions for l...Vitaly Buka84-7284/+5647
2023-08-07Retain all jump table range checks when using BTI.Simon Tatham1-0/+129
2023-08-07[RISCV] Use max pushed register to get pushed register number.Yeting Kuo1-0/+137
2023-08-03[RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.Jim Lin1-64/+64
2023-08-03Revert "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"Alexander Kornienko1-6/+8
2023-08-02[AArch64] Add some basic handling for bf16 constants.David Green1-0/+121
2023-08-01[XCOFF] Do not put MergeableCStrings in their own sectionWael Yehia3-15/+11
2023-07-28[AMDGPU] Fix PromoteAlloca Subvector Stores for Single Elementspvanhout1-21/+44
2023-07-28[AMDGPU] Precommit tests for D156308pvanhout1-1/+46
2023-07-27AMDGPU: Always custom lower extract_subvectorMatt Arsenault1-0/+573
2023-07-27[AArch64] Correct the regtype of indexed fmlalDavid Green1-4/+8
2023-07-27[AArch64] Add test showing incorrect register usage of FMLAL. NFCDavid Green1-0/+123
2023-07-26[XCOFF] Enable available_externally linkage for functions.esmeyi1-0/+51
2023-07-26Reland "[LoongArch] Support -march=native and -mtune="Weining Lu2-0/+27
2023-07-25AMDGPU: Correctly expand f64 sqrt intrinsicMatt Arsenault4-869/+5723
2023-07-25AMDGPU: Add more sqrt f64 lowering testsMatt Arsenault2-303/+2727
2023-07-25[SVE] Add vselect(mla/mls) patterns for cases where a multiplicand is used fo...Paul Walker2-124/+118
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