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path: root/llvm/lib/Target/PowerPC/PPCInstrInfo.td
AgeCommit message (Expand)AuthorFilesLines
2024-06-13DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)Matt Arsenault1-37/+37
2024-06-06[PowerPC] Adjust operand order of ADDItoc to be consistent with other ADDI* n...Kai Luo1-4/+2
2024-06-04[PowerPC] Remove DAG matching in ADDIStocHA (#93905)Kai Luo1-3/+1
2024-05-21[PowerPC][AIX] 64-bit large code-model support for toc-data (#90619)Zaara Syeda1-1/+1
2024-04-24[PowerPC] Add PPC prefix to retglue ISD node. NFC. (#89771)Kai Luo1-2/+2
2024-04-18[PowerPC] `ANDI_rec_1_*` should define CR0 (#89034)Kai Luo1-0/+2
2024-04-17[PowerPC] 32-bit large code-model support for toc-data (#85129)Zaara Syeda1-1/+3
2024-03-18[SystemZ] Don't lower ATOMIC_LOAD/STORE to LOAD/STORE (#75879)Jonas Paulsson1-6/+6
2024-03-01[PowerPC] Support local-dynamic TLS relocation on AIX (#66316)Felix (Ting Wang)1-1/+11
2024-01-26[PowerPC][X86] Make cpu id builtins target independent and lower for PPC (#68...Nemanja Ivanovic1-0/+3
2024-01-15[PowerPC] Implement fence builtin (#76495)Qiu Chaofan1-0/+4
2024-01-10[PowerPC] Make verifier happy when lowering `llvm.trap` (#77266)Kai Luo1-1/+1
2023-12-20[PowerPC] Use 'sync; ld; cmp; bc; isync' for atomic load seq-cst on 32-bit ...Kai Luo1-0/+3
2023-12-07[PowerPC] Add a set of extended mnemonics that are missing from Power 10. (#7...Stefan Pintilie1-17/+17
2023-10-05[PowerPC] Add the SCV instruction. (#68063)Stefan Pintilie1-1/+9
2023-09-18[SelectionDAG][RISCV][PowerPC][X86] Use TargetConstant for immediates for ISD...Craig Topper1-3/+3
2023-09-05[PowerPC] Implement builtin for mffslQiu Chaofan1-0/+1
2023-08-31SelectionDAG: Swap operands of atomic_storeMatt Arsenault1-6/+6
2023-08-30[PowerPC] Support initial-exec TLS relocation on AIXQiu Chaofan1-2/+2
2023-08-02[PowerPC][MC] Recognize tlbilx and its mnemonicsQiu Chaofan1-0/+9
2023-07-14[PowerPC] Add DFP format instructions definitions and MC testsLei Huang1-0/+51
2023-07-04[PowerPC] Add DFP quantum adjustment instruction definitions and MC testsLei Huang1-0/+47
2023-06-20[AIX][TLS] Generate 32-bit local-exec access code sequenceAmy Kwan1-0/+19
2023-06-05Reland "[PowerPC] Simplify fp-to-int store optimization"Qiu Chaofan1-5/+1
2023-05-24Revert "[PowerPC] Simplify fp-to-int store optimization"Vitaly Buka1-1/+5
2023-05-23[PowerPC] Simplify fp-to-int store optimizationQiu Chaofan1-5/+1
2023-05-01[PowerPC] Implement DFP add and sub instructions.Stefan Pintilie1-0/+1
2023-04-19[GlobalISelEmitter] handle operand without MVT/classChen Zheng1-16/+16
2023-04-02[Targets] Rename Flag->Glue. NFCCraig Topper1-2/+2
2023-02-24[PowerPC] Add Binary Coded Decimal Assist InstructionsStefan Pintilie1-0/+8
2023-02-02[PowerPC] Switch to by-name matching for instructions (part 2 of 2).James Y Knight1-36/+35
2023-02-02[PowerPC] Switch to by-name matching for instructions (part 1 of 2).James Y Knight1-777/+791
2023-01-051: use class instead of MVTChen Zheng1-2/+2
2023-01-05[PowerPC][GISel]fcmp supportChen Zheng1-16/+16
2023-01-04[PowerPC] Materialize floats in the range [-16.0, 15.0].Stefan Pintilie1-0/+18
2022-11-23[SelectionDAG] Remove deprecated MemSDNode->getAlignment()Alex Richardson1-7/+7
2022-11-22[PowerPC] Add handling for WACC register spilling.Stefan Pintilie1-0/+1
2022-11-03[PowerPC] Add new DMR register classes to Future CPU.Stefan Pintilie1-0/+2
2022-10-13[PowerPC] Change CRNOT to a code gen single operand instructionNemanja Ivanovic1-2/+6
2022-10-03[PowerPC] Fix a number of inefficiencies and issues with atomic code genNemanja Ivanovic1-1/+13
2022-09-26[PowerPC] XCOFF exception section support on the direct assembler pathPaul Scoropan1-6/+4
2022-08-30[PowerPC] CTRLoop pseudo instructions should not be duplicatedTing Wang1-2/+2
2022-08-19[PowerPC] Fix bugs in sign-/zero-extension eliminationStefan Pintilie1-31/+39
2022-08-08[PowerPC] mapping hardward loop intrinsics to powerpc pseudoChen Zheng1-6/+3
2022-07-27Fix misc uses of "long" variables to use "int64_t".Eli Friedman1-1/+1
2022-06-20[PowerPC] add a new pass to expand ctr loop pseudosChen Zheng1-0/+7
2022-05-26[PowerPC][Future] Add an ISA Future to go with mcpu=future.Stefan Pintilie1-0/+1
2022-05-19[PowerPC] Implement XL compat __fnabs and __fnabss builtins.Amy Kwan1-0/+2
2022-04-18[NFC][PowerPC] Move the Regsiter Operands for PowerPC into PPCRegisterInfo.tdStefan Pintilie1-508/+0
2022-03-31[PowerPC] Set the special DSCR with a compiler option.Stefan Pintilie1-0/+16
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