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path: root/llvm/lib/CodeGen/VirtRegMap.cpp
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2025-07-14[CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (#148107)Vikram Hegde1-0/+2
2025-05-22[LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (#140...users/pcc/spr/main.elf-add-branch-to-branch-optimizationRahul Joshi1-2/+1
2025-04-30[CodeGen] Remove unused variable 'ID' (NFC)Jie Fu1-1/+0
2025-04-30[CodeGen][NPM] Port VirtRegRewriter to NPM (#130564)Akshat Oke1-16/+69
2025-02-26RegAlloc: Use new approach to handling failed allocations (#128469)Matt Arsenault1-16/+3
2025-02-26VirtRegRewriter: Fix verifier errors after regalloc failures (#128280)Matt Arsenault1-4/+12
2025-01-18[CodeGen] Use MCRegister instead of MCPhysReg in VirtRegMap. NFCCraig Topper1-4/+4
2025-01-14[CodeGen] Remove unused argument from getCoveringSubRegIndexes. NFC. (#122884)Jay Foad1-3/+3
2024-12-16RegAlloc: Do not fatal error if there are no registers in the alloc order (#1...Matt Arsenault1-2/+7
2024-12-06[CodeGen][PM] Initialize analyses with isAnalysis=true (#118779)Akshat Oke1-1/+1
2024-12-06[CodeGen][NewPM] Port LiveStacks analysis to NPM (#118778)Akshat Oke1-3/+3
2024-12-04[CodeGen][NewPM] Port LiveDebugVariables to NPM (#115468)Akshat Oke1-4/+4
2024-10-28VirtRegRewriter: Add implicit register defs for live out undef lanes (#112679)Matt Arsenault1-0/+68
2024-10-22[NewPM][CodeGen] Port VirtRegMap to NPM (#109936)Akshat Oke1-7/+23
2024-09-15[VirtRegMap] Store MCRegister in Virt2PhysMap. (#108775)Craig Topper1-5/+5
2024-09-15[VirtRegMap] Remove unnecessary calls to Register::id() accessing IndexMaps.Craig Topper1-6/+6
2024-07-10[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)paperchalice1-4/+4
2024-07-09[CodeGen][NewPM] Port `SlotIndexes` to new pass manager (#97941)paperchalice1-4/+4
2024-04-15[NFC][LLVM][CodeGen] Move LiveDebugVariables.h into llvm/include/llvm/CodeGen...Piyou Chen1-1/+1
2023-10-11[SlotIndexes] Use upper/lower bound terminology for MBB searches. NFC. (#68802)Jay Foad1-2/+2
2023-10-11[VirtRegMap] Simplify condition after #65729Jay Foad1-1/+1
2023-10-11Clean up strange uses of getAnalysisIfAvailable (#65729)Jay Foad1-1/+1
2023-08-15Fix typos in commentsJay Foad1-1/+1
2023-06-16[MC] Add MCRegisterInfo::regunits for iteration over register unitsSergei Barannikov1-5/+4
2023-04-17Fix uninitialized pointer members in CodeGenAkshay Khadse1-8/+8
2023-03-22[CodeGen] Fix type of MachineRegisterInfo::RegAllocHints. NFC.Jay Foad1-3/+3
2023-01-05Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ partserge-sans-paille1-1/+1
2022-12-07[NFC] Use Register instead of unsigned for variables that receive a Register ...Gregory Alfonso1-2/+2
2021-11-11[CodeGen] Use MachineInstr::operands (NFC)Kazu Hirata1-5/+1
2021-11-08[llvm] Use make_early_inc_range (NFC)Kazu Hirata1-14/+11
2021-06-11[CodeGen][regalloc] Don't align stack slots if the stack can't be realignedTomas Matheson1-0/+7
2021-05-27VirtRegMap: Preserve LiveDebugVariablesMatt Arsenault1-3/+12
2021-04-29VirtRegMap: Support partially allocated virtual registersMatt Arsenault1-7/+40
2021-04-29VirtRegMap: Add pass option to not clear virt regsMatt Arsenault1-7/+20
2021-02-26[NFC] Const-ed 2 APIs in VirtRegMapMircea Trofin1-2/+2
2020-12-10[X86] AMX programming model.Luo, Yuanke1-0/+1
2020-11-02[NFC][regalloc] Use MCRegister appropriatelyMircea Trofin1-3/+3
2020-10-08[NFC][MC] MCRegister API typing.Mircea Trofin1-1/+1
2020-10-06Fix reordering of instructions during VirtRegRewriter unbundlingCarl Ritson1-1/+1
2020-08-10Unbundle KILL bundles in VirtRegRewriterStanislav Mekhanoshin1-3/+3
2020-04-02[Alignment][NFC] Use more Align versions of various functionsGuillaume Chatelet1-2/+2
2019-08-13Eliminate implicit Register->unsigned conversions in VirtRegMap. NFCDaniel Sanders1-32/+31
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders1-11/+11
2019-05-20RegAlloc: Fix verifier error with undef identity copiesMatt Arsenault1-1/+1
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-08-15[RegAlloc] Check that subreg liveness tracking applies to given virtual regKrzysztof Parzyszek1-1/+1
2018-06-14Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bu...Justin Bogner1-7/+46
2018-06-14Revert "[VirtRegRewriter] Avoid clobbering registers when expanding copy bund...Justin Bogner1-46/+7
2018-06-14[VirtRegRewriter] Avoid clobbering registers when expanding copy bundlesJustin Bogner1-7/+46
2018-05-14Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen1-9/+8
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