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path: root/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
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2025-05-05[ScheduleDAG] Allow disabling the SchedModel / Itineraries during Scheduling ...Jeffrey Byrnes1-1/+9
2025-02-01[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)Sergei Barannikov1-2/+14
2025-01-23[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)Benjamin Maxwell1-2/+3
2025-01-11[AMDGPU] Add target hook to isGlobalMemoryObject (#112781)Austin Kerbow1-7/+3
2024-12-16[NFC] Remove some unnecessary semicolonsDavid Green1-7/+6
2024-11-14Fix typo "necessarilly"Jay Foad1-1/+1
2024-09-30[NFC] Use initial-stack-allocations for more data structures (#110544)Jeremy Morse1-2/+3
2024-07-01[llvm][CodeGen] Avoid 'raw_string_ostream::str' (NFC) (#97318)Youngsuk Kim1-1/+1
2024-04-12[AArch64] Improve scheduling latency into Bundles (#86310)David Green1-3/+5
2024-03-11[SelectionDAG] Switch to LiveRegUnits (#84197)AtariDreams1-4/+6
2023-08-15[MachineScheduler] Account for lane masks in basic block liveinsJay Foad1-3/+3
2023-08-08[MachineScheduler] Rename Reg2SUnitsMap to RegUnit2SUnitsMapJay Foad1-5/+7
2023-08-07[MachineScheduler] Track physical register dependencies per-regunitJay Foad1-26/+39
2023-07-29Revert "[MachineScheduler] Track physical register dependencies per-regunit"Jay Foad1-39/+26
2023-07-29[MachineScheduler] Track physical register dependencies per-regunitJay Foad1-26/+39
2023-07-28[CodeGen] Clean up ScheduleDAGInstrs::addPhysRegDepsJay Foad1-28/+25
2023-06-01[CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.Jay Foad1-2/+1
2023-04-18[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.Jay Foad1-4/+4
2023-04-17[nfc][llvm] Replace pointer cast functions in PointerUnion by llvm casting fu...Shraiysh Vaishay1-5/+4
2023-02-27[CodeGen] Use LLVM_ATTRIBUTE_UNUSED instead of LLVM_DUMP_METHOD on a raw_ostr...Craig Topper1-1/+1
2023-02-07[CodeGen] Define and use MachineOperand::getOperandNoJay Foad1-1/+1
2023-01-17[MIScheduler] Print top/down cycle in the SUnit dump.Francesco Petrogalli1-0/+9
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper1-6/+6
2022-09-13[NFC][ScheduleDAGInstrs] Use structure bindings and emplace_backPavel Samolysov1-29/+33
2022-07-18CodeGen: Remove AliasAnalysis from regallocMatt Arsenault1-4/+4
2022-06-05Remove unneeded cl::ZeroOrMore for cl::opt/cl::list optionsFangrui Song1-3/+3
2022-03-16Cleanup codegen includesserge-sans-paille1-4/+0
2022-03-10Revert "Cleanup codegen includes"Nico Weber1-0/+4
2022-03-10Cleanup codegen includesserge-sans-paille1-4/+0
2021-11-25[llvm] Use range-based for loops (NFC)Kazu Hirata1-3/+2
2021-11-06[llvm] Use llvm::reverse (NFC)Kazu Hirata1-1/+1
2021-10-22[ScheduleDAGInstrs] Call adjustSchedDependency in more casesJay Foad1-6/+1
2021-07-27[DebugInfo][InstrRef] Correctly update DBG_PHIs during instr schedulingJeremy Morse1-4/+2
2021-07-08[DebugInfo][InstrRef][4/4] Support DBG_INSTR_REF through all backend passesJeremy Morse1-1/+1
2021-04-19[CSSPGO] Exclude pseudo probes from slot indexHongtao Yu1-4/+7
2020-10-22[DebugInstrRef] Pass DBG_INSTR_REFs through register allocationJeremy Morse1-1/+1
2020-10-22ScheduleDAGInstrs: Skip debug instructions at end of scheduling regionMatt Arsenault1-1/+6
2020-10-11[SchedDAGInstrs] Delete redundant contains(). NFCFangrui Song1-2/+0
2020-09-21Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"Alexander Belyaev1-1/+5
2020-09-19Fix some clang-tidy bugprone-argument-comment issuesFangrui Song1-1/+1
2020-09-18[NFC][ScheduleDAG] Remove unused EntrySU SUnitFrancis Visoiu Mistrih1-5/+1
2020-07-31[NFC] Remove unused GetUnderlyingObject paramenterVitaly Buka1-1/+1
2020-06-25LiveIntervals.h.h - reduce AliasAnalysis.h include to forward declaration. NFC.Simon Pilgrim1-0/+1
2020-05-22Revert "[CodeGen] Add support for multiple memory operands in MachineInstr::m...Jean-Michel Gorius1-5/+0
2020-05-21[CodeGen] Add support for multiple memory operands in MachineInstr::mayAliasJean-Michel Gorius1-0/+5
2020-04-21Let targets adjust physical output- and anti-depsFraser Cormack1-6/+6
2020-04-17Provide operand indices to adjustSchedDependencyFraser Cormack1-3/+3
2020-01-10Let targets adjust operand latency of bundlesStanislav Mekhanoshin1-1/+6
2019-10-19Prune Analysis includes from SelectionDAG.hReid Kleckner1-3/+2
2019-09-20MachineScheduler: Fix missing dependency with multiple subreg defsMatt Arsenault1-0/+12
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