aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2022-05-24[CUDA][HIP] Externalize kernels with internal linkagellvmorg-14.0.4Yaxun (Sam) Liu6-30/+91
2022-05-24[CUDA][HIP] Externalize kernels in anonymous name spaceYaxun (Sam) Liu6-15/+43
2022-05-24AST: Move __va_list tag back to std conditionally on AArch64.Peter Collingbourne5-139/+162
2022-05-24AST: Make getEffectiveDeclContext() a member function of ItaniumMangleContext...Peter Collingbourne1-78/+94
2022-05-24[clang][NFC] Remove IgnoreLinkageSpecDeclsNathan Sidwell1-14/+5
2022-05-24[clang][NFC] Standard substitution checking cleanupNathan Sidwell1-41/+34
2022-05-24[AVR] Generate 'rcall' instead of 'call' on avr2 and avr25Ben Shi2-31/+61
2022-05-24[AVR] Fix incorrect calling convention for varargs functionsBen Shi4-3/+277
2022-05-24[SystemZ] Bugfix for symbolic displacements.Jonas Paulsson2-2/+12
2022-05-24[libc++][CI] added XFAIL LIBCXX-AIX-FIXME to new runnning test cases after in...zhijian24-2/+23
2022-05-24[libc++] Always enable the ranges conceptsNikolas Klauser8-14/+5
2022-05-20[ELF][ARM] Fix unneeded thunk for branches to hidden undefined weakFangrui Song2-3/+13
2022-05-19Fix crash getting name of a template declTom Eccles2-2/+17
2022-05-19[OpenMP] Fix library path missing when using OpenMPJoseph Huber3-0/+20
2022-05-19[ELF][AArch64] Fix unneeded thunk for branches to hidden undefined weakFangrui Song3-4/+16
2022-05-18[ELF] Ignore --no-add-neededFangrui Song2-0/+2
2022-05-18[BOLT] Compact legacy profilesYi Kong1-1/+18
2022-05-18[CodeGen] Use ABI alignment for C++ new expressionsDaniel Bertalan2-1/+13
2022-05-18[compiler-rt] Add NO_EXEC_STACK_DIRECTIVE on s390xTimm Bäder1-0/+2
2022-05-18[GlobalIsel] Fix fallback if stack protector isn't supported.Eli Friedman2-1/+44
2022-05-18[Driver][Solaris] -r: imply -nostdlib like GCCBrad Smith2-4/+18
2022-05-18[Driver][Ananas] -r: imply -nostdlib like GCCBrad Smith2-5/+16
2022-05-18[cmake] Increase -fms-compatibility-version in Windows toolchain fileShoaib Meenai1-1/+1
2022-05-18[SystemZ] Bugfix in SystemZTargetLowering::combineINT_TO_FP()Jonas Paulsson2-6/+43
2022-05-18[X86] combineX86ShuffleChain - don't fold to truncate(concat(V1,V2)) if it wa...Simon Pilgrim2-1/+49
2022-05-11[AArch64] Ampere1 does not support MTEPhilipp Tomsich2-3/+2
2022-05-11[AArch64] Support for Ampere1 corePhilipp Tomsich15-4/+1209
2022-05-11[AArch64] Add native CPU detection for Ampere1Philipp Tomsich2-0/+10
2022-05-11[IPSCCP] Support unfeasible default dests for switch.Florian Hahn2-7/+166
2022-05-11[InstCombine] Fix scalable-vector bitwise select matchingFraser Cormack2-1/+36
2022-05-11[InstCombine] add scalable vector test for logical select; NFCSanjay Patel1-0/+19
2022-05-11[HIP] Fix HIP include pathYaxun (Sam) Liu3-9/+9
2022-05-11Fix test for c7ee0b8bda8b32a800bc01e9151b364446a6e1b1Brad Smith1-3/+0
2022-05-11[Clang] Fix the guaranteed alignment of memory returned by malloc/new on OpenBSDMark Kettenis4-3/+12
2022-05-11[Driver][Linux] Remove D.Dir+"/../lib" from default search paths for LLVM_ENA...Fangrui Song2-13/+5
2022-05-11[MC][ELF] Improve st_size propagation ruleFangrui Song2-5/+24
2022-05-11[MC][test] Improve offset.sFangrui Song1-111/+46
2022-05-11Bump version to 14.0.4Tom Stellard8-9/+9
2022-05-10[libc++abi] Remove XFAIL on arm64Louis Dionne1-3/+0
2022-04-28Bump version to 14.0.3llvmorg-14.0.3Tom Stellard8-9/+9
2022-04-28workflows: Add a test to ensure that the LLVM version is correctTom Stellard2-0/+58
2022-04-25[RISCV] Fix crash for section alignment with .option norvcllvmorg-14.0.2Luís Marques3-3/+21
2022-04-25[asan] Always skip first object from dl_iterate_phdrMichael Forney1-18/+12
2022-04-25[RISCV] Don't emit fractional VIDs with negative stepsFraser Cormack2-8/+9
2022-04-25[RISCV] Add another test showing incorrect BUILD_VECTOR loweringFraser Cormack1-0/+15
2022-04-25[RISCV] Fix lowering of BUILD_VECTORs as VID sequencesFraser Cormack2-35/+44
2022-04-25[RISCV] Add tests showing incorrect BUILD_VECTOR loweringFraser Cormack1-0/+21
2022-04-25[llvm-mt] Add support /notify_updateAlex Brachet3-2/+41
2022-04-25[RISCV] Only try LUI+SH*ADD+ADDI for int materialization if LUI+ADDI+SH*ADD f...Craig Topper2-26/+64
2022-04-25[ELF] --emit-relocs: fix missing STT_SECTION when the first input section is ...Fangrui Song2-17/+78
generated by cgit v1.1 at 2024-11-03 16:09:01 +0000