diff options
Diffstat (limited to 'llvm/test/tools')
58 files changed, 8004 insertions, 6089 deletions
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips64_eh.ll.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips64_eh.ll.expected index 897209a..56058bb 100644 --- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips64_eh.ll.expected +++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips64_eh.ll.expected @@ -8,17 +8,17 @@ define i32 @main() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to ; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill ; CHECK-NEXT: .cfi_offset 31, -8 -; CHECK-NEXT: .Ltmp0: +; CHECK-NEXT: .Ltmp0: # EH_LABEL ; CHECK-NEXT: jal foo ; CHECK-NEXT: nop -; CHECK-NEXT: .Ltmp1: +; CHECK-NEXT: .Ltmp1: # EH_LABEL ; CHECK-NEXT: # %bb.1: # %good ; CHECK-NEXT: addiu $2, $zero, 5 ; CHECK-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload ; CHECK-NEXT: jr $ra ; CHECK-NEXT: daddiu $sp, $sp, 16 ; CHECK-NEXT: .LBB0_2: # %bad -; CHECK-NEXT: .Ltmp2: +; CHECK-NEXT: .Ltmp2: # EH_LABEL ; CHECK-NEXT: jal _Unwind_Resume ; CHECK-NEXT: nop %1 = invoke i32 @foo() to label %good unwind label %bad diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected index 51cafac..e1da112 100644 --- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected +++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected @@ -10,15 +10,15 @@ define dso_local void @caller_St8x4(ptr nocapture noundef readonly byval(%struct ; CHECK-NEXT: .reg .b64 %rd<13>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: -; CHECK-NEXT: ld.param.b64 %rd1, [caller_St8x4_param_0+8]; -; CHECK-NEXT: ld.param.b64 %rd2, [caller_St8x4_param_0]; -; CHECK-NEXT: ld.param.b64 %rd3, [caller_St8x4_param_0+24]; -; CHECK-NEXT: ld.param.b64 %rd4, [caller_St8x4_param_0+16]; ; CHECK-NEXT: { // callseq 0, 0 ; CHECK-NEXT: .param .align 16 .b8 param0[32]; -; CHECK-NEXT: st.param.v2.b64 [param0], {%rd2, %rd1}; -; CHECK-NEXT: st.param.v2.b64 [param0+16], {%rd4, %rd3}; ; CHECK-NEXT: .param .align 16 .b8 retval0[32]; +; CHECK-NEXT: ld.param.b64 %rd1, [caller_St8x4_param_0+24]; +; CHECK-NEXT: ld.param.b64 %rd2, [caller_St8x4_param_0+16]; +; CHECK-NEXT: st.param.v2.b64 [param0+16], {%rd2, %rd1}; +; CHECK-NEXT: ld.param.b64 %rd3, [caller_St8x4_param_0+8]; +; CHECK-NEXT: ld.param.b64 %rd4, [caller_St8x4_param_0]; +; CHECK-NEXT: st.param.v2.b64 [param0], {%rd4, %rd3}; ; CHECK-NEXT: call.uni (retval0), callee_St8x4, (param0); ; CHECK-NEXT: ld.param.v2.b64 {%rd5, %rd6}, [retval0]; ; CHECK-NEXT: ld.param.v2.b64 {%rd7, %rd8}, [retval0+16]; diff --git a/llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test b/llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test index f2fe794..db223cd 100644 --- a/llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test +++ b/llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test @@ -5,7 +5,13 @@ # RUN: yaml2obj %t/stmt_seq_macho.o.yaml -o %t/stmt_seq_macho.o # RUN: dsymutil --flat --verify-dwarf=none -oso-prepend-path %t %t/stmt_seq_macho.exe -o %t/stmt_seq_macho.dSYM # RUN: llvm-dwarfdump --debug-info --debug-line -v %t/stmt_seq_macho.dSYM | sort | FileCheck %s -check-prefix=CHECK_DSYM +# RUN: llvm-dwarfdump --debug-info --debug-line -v %t/stmt_seq_macho.dSYM > %t/stmt_seq_macho.dSYM.txt +# RUN: cat %t/stmt_seq_macho.dSYM.txt | sort | FileCheck %s -check-prefix=CHECK_DSYM +# RUN: cat %t/stmt_seq_macho.dSYM.txt | FileCheck %s -check-prefix=CHECK_NO_INVALID_OFFSET +# RUN: cat stmt_seq_macho.dSYM.txt | grep DW_AT_LLVM_stmt_sequence | sort | uniq -d | wc -l | FileCheck %s -check-prefix=CHECK_NO_DUPLICATES +# CHECK_NO_DUPLICATES: 0 +# CHECK_NO_INVALID_OFFSET-NOT: DW_AT_LLVM_stmt_sequence{{.*}}0xfffffff # CHECK_DSYM: DW_AT_LLVM_stmt_sequence [DW_FORM_sec_offset] ([[OFFSET1:(0x[0-9a-f]+)]]) # CHECK_DSYM: DW_AT_LLVM_stmt_sequence [DW_FORM_sec_offset] ([[OFFSET2:(0x[0-9a-f]+)]]) # CHECK_DSYM: DW_AT_LLVM_stmt_sequence [DW_FORM_sec_offset] ([[OFFSET3:(0x[0-9a-f]+)]]) @@ -18,6 +24,9 @@ #--- stmt_seq_macho.cpp #define ATTRIB extern "C" __attribute__((noinline)) +ATTRIB int function1_copy1(int a) { + return ++a; +} ATTRIB int function3_copy1(int a) { int b = a + 3; @@ -51,6 +60,7 @@ int main() { sum += function2_copy2(3); sum += function3_copy2(41); sum += function2_copy1(11); + sum += function1_copy1(42); length_error e("test"); return sum; } @@ -108,9 +118,9 @@ LoadCommands: cmdsize: 1032 segname: '' vmaddr: 0 - vmsize: 2793 + vmsize: 3125 fileoff: 1208 - filesize: 2793 + filesize: 3125 maxprot: 7 initprot: 7 nsects: 12 @@ -119,18 +129,18 @@ LoadCommands: - sectname: __text segname: __TEXT addr: 0x0 - size: 128 + size: 148 offset: 0x4B8 align: 2 - reloff: 0xFA8 - nreloc: 7 + reloff: 0x10F0 + nreloc: 8 flags: 0x80000400 reserved1: 0x0 reserved2: 0x0 reserved3: 0x0 - content: 00100011C0035FD600580051C0035FD600100011C0035FD600580051C0035FD6FFC300D1F44F01A9FD7B02A9FD8300916000805200000094F30300AA20058052000000941400130B6001805200000094F30300AA0100009021000091E03F0091000000948002130BFD7B42A9F44F41A9FFC30091C0035FD600000014C0035FD6 + content: 00040011C0035FD600100011C0035FD600580051C0035FD600100011C0035FD600580051C0035FD6FFC300D1F44F01A9FD7B02A9FD8300916000805200000094F30300AA20058052000000941400130B6001805200000094F30300AA40058052000000947302000B0100009021000091E03F0091000000948002130BFD7B42A9F44F41A9FFC30091C0035FD600000014C0035FD6 relocations: - - address: 0x78 + - address: 0x8C symbolnum: 4 pcrel: true length: 2 @@ -138,7 +148,7 @@ LoadCommands: type: 2 scattered: false value: 0 - - address: 0x60 + - address: 0x74 symbolnum: 3 pcrel: true length: 2 @@ -146,7 +156,7 @@ LoadCommands: type: 2 scattered: false value: 0 - - address: 0x58 + - address: 0x6C symbolnum: 1 pcrel: false length: 2 @@ -154,7 +164,7 @@ LoadCommands: type: 4 scattered: false value: 0 - - address: 0x54 + - address: 0x68 symbolnum: 1 pcrel: true length: 2 @@ -162,7 +172,7 @@ LoadCommands: type: 3 scattered: false value: 0 - - address: 0x4C + - address: 0x60 symbolnum: 5 pcrel: true length: 2 @@ -170,16 +180,24 @@ LoadCommands: type: 2 scattered: false value: 0 - - address: 0x40 - symbolnum: 8 + - address: 0x54 + symbolnum: 6 pcrel: true length: 2 extern: true type: 2 scattered: false value: 0 - - address: 0x34 - symbolnum: 6 + - address: 0x48 + symbolnum: 9 + pcrel: true + length: 2 + extern: true + type: 2 + scattered: false + value: 0 + - address: 0x3C + symbolnum: 7 pcrel: true length: 2 extern: true @@ -188,9 +206,9 @@ LoadCommands: value: 0 - sectname: __cstring segname: __TEXT - addr: 0x80 + addr: 0x94 size: 5 - offset: 0x538 + offset: 0x54C align: 0 reloff: 0x0 nreloc: 0 @@ -201,9 +219,9 @@ LoadCommands: content: '7465737400' - sectname: __debug_loc segname: __DWARF - addr: 0x85 + addr: 0x99 size: 412 - offset: 0x53D + offset: 0x551 align: 0 reloff: 0x0 nreloc: 0 @@ -211,12 +229,12 @@ LoadCommands: reserved1: 0x0 reserved2: 0x0 reserved3: 0x0 - content: 00000000000000000400000000000000010050040000000000000008000000000000000400A301509F0000000000000000000000000000000000000000000000000400000000000000030070039F0000000000000000000000000000000008000000000000000C000000000000000100500C0000000000000010000000000000000400A301509F0000000000000000000000000000000010000000000000001400000000000000010050140000000000000018000000000000000400A301509F0000000000000000000000000000000010000000000000001400000000000000030070039F0000000000000000000000000000000018000000000000001C000000000000000100501C0000000000000020000000000000000400A301509F000000000000000000000000000000001C0000000000000020000000000000000100500000000000000000000000000000000030000000000000003C00000000000000030011009F3C0000000000000048000000000000000100634800000000000000540000000000000001006400000000000000000000000000000000 + content: 08000000000000000C000000000000000100500C0000000000000010000000000000000400A301509F0000000000000000000000000000000008000000000000000C00000000000000030070039F0000000000000000000000000000000010000000000000001400000000000000010050140000000000000018000000000000000400A301509F0000000000000000000000000000000018000000000000001C000000000000000100501C0000000000000020000000000000000400A301509F0000000000000000000000000000000018000000000000001C00000000000000030070039F0000000000000000000000000000000020000000000000002400000000000000010050240000000000000028000000000000000400A301509F00000000000000000000000000000000240000000000000028000000000000000100500000000000000000000000000000000038000000000000004400000000000000030011009F4400000000000000500000000000000001006350000000000000005C0000000000000001006400000000000000000000000000000000 - sectname: __debug_abbrev segname: __DWARF - addr: 0x221 - size: 359 - offset: 0x6D9 + addr: 0x235 + size: 372 + offset: 0x6ED align: 0 reloff: 0x0 nreloc: 0 @@ -226,18 +244,34 @@ LoadCommands: reserved3: 0x0 - sectname: __debug_info segname: __DWARF - addr: 0x388 - size: 686 - offset: 0x840 + addr: 0x3A9 + size: 747 + offset: 0x861 align: 0 - reloff: 0xFE0 - nreloc: 14 + reloff: 0x1130 + nreloc: 16 flags: 0x2000000 reserved1: 0x0 reserved2: 0x0 reserved3: 0x0 relocations: - - address: 0x26A + - address: 0x2A7 + symbolnum: 1 + pcrel: false + length: 3 + extern: false + type: 0 + scattered: false + value: 0 + - address: 0x28E + symbolnum: 1 + pcrel: false + length: 3 + extern: false + type: 0 + scattered: false + value: 0 + - address: 0x253 symbolnum: 1 pcrel: false length: 3 @@ -245,7 +279,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x251 + - address: 0x1F5 symbolnum: 1 pcrel: false length: 3 @@ -253,7 +287,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x216 + - address: 0x1E1 symbolnum: 1 pcrel: false length: 3 @@ -261,7 +295,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x1B8 + - address: 0x1CE symbolnum: 1 pcrel: false length: 3 @@ -269,7 +303,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x1A5 + - address: 0x1BA symbolnum: 1 pcrel: false length: 3 @@ -277,7 +311,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x191 + - address: 0x1A7 symbolnum: 1 pcrel: false length: 3 @@ -285,7 +319,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x17E + - address: 0x169 symbolnum: 1 pcrel: false length: 3 @@ -293,7 +327,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x140 + - address: 0x12D symbolnum: 1 pcrel: false length: 3 @@ -301,7 +335,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x104 + - address: 0xF1 symbolnum: 1 pcrel: false length: 3 @@ -309,7 +343,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0xC8 + - address: 0xC4 symbolnum: 1 pcrel: false length: 3 @@ -317,7 +351,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x9B + - address: 0x88 symbolnum: 1 pcrel: false length: 3 @@ -351,9 +385,9 @@ LoadCommands: value: 0 - sectname: __debug_str segname: __DWARF - addr: 0x636 - size: 239 - offset: 0xAEE + addr: 0x694 + size: 400 + offset: 0xB4C align: 0 reloff: 0x0 nreloc: 0 @@ -363,9 +397,9 @@ LoadCommands: reserved3: 0x0 - sectname: __apple_names segname: __DWARF - addr: 0x725 - size: 260 - offset: 0xBDD + addr: 0x824 + size: 288 + offset: 0xCDC align: 0 reloff: 0x0 nreloc: 0 @@ -373,12 +407,12 @@ LoadCommands: reserved1: 0x0 reserved2: 0x0 reserved3: 0x0 - content: 485341480100000008000000080000000C000000000000000100000001000600000000000200000005000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF90D9F86F88CB36CF4908311CD1125E5389CB36CF4A08311C522B70536A7F9A7C8000000094000000A4000000B4000000C4000000D4000000E4000000F40000008A0000000200000015020000690200000000000055000000010000009A0000000000000045000000010000005E00000000000000A3000000010000001502000000000000750000000100000003010000000000006500000001000000C700000000000000BB00000001000000690200000000000085000000010000003F01000000000000 + content: 485341480100000009000000090000000C00000000000000010000000100060000000000FFFFFFFFFFFFFFFF0100000003000000040000000600000007000000080000004A08311CC78E3C8288CB36CF89CB36CFD1125E53522B705390D9F86F6A7F9A7C4908311C8C0000009C000000AC000000BC000000CC000000DC000000EC00000000010000100100000601000001000000F000000000000000D6000000010000005E00000000000000F600000001000000C30000000000000016010000010000002C01000000000000440100000100000052020000000000005C01000001000000A6020000000000002B0100000200000052020000A60200000000000026010000010000006801000000000000E6000000010000008700000000000000 - sectname: __apple_objc segname: __DWARF - addr: 0x829 + addr: 0x944 size: 36 - offset: 0xCE1 + offset: 0xDFC align: 0 reloff: 0x0 nreloc: 0 @@ -389,9 +423,9 @@ LoadCommands: content: 485341480100000001000000000000000C000000000000000100000001000600FFFFFFFF - sectname: __apple_namespac segname: __DWARF - addr: 0x84D + addr: 0x968 size: 36 - offset: 0xD05 + offset: 0xE20 align: 0 reloff: 0x0 nreloc: 0 @@ -402,9 +436,9 @@ LoadCommands: content: 485341480100000001000000000000000C000000000000000100000001000600FFFFFFFF - sectname: __apple_types segname: __DWARF - addr: 0x871 + addr: 0x98C size: 195 - offset: 0xD29 + offset: 0xE44 align: 0 reloff: 0x0 nreloc: 0 @@ -412,21 +446,29 @@ LoadCommands: reserved1: 0x0 reserved2: 0x0 reserved3: 0x0 - content: 48534148010000000500000005000000140000000000000003000000010006000300050004000B000000000002000000FFFFFFFF03000000040000007CA8F05D90D9F86F5B738CDC3080880B6320957C64000000770000008A0000009D000000B00000009700000001000000EA010000130000000000008A00000001000000C80100001300000000000031000000010000005700000024000000000000D300000001000000A1020000240000000000002C000000010000005000000024000000000000 + content: 48534148010000000500000005000000140000000000000003000000010006000300050004000B000000000002000000FFFFFFFF03000000040000007CA8F05D90D9F86F5B738CDC3080880B6320957C64000000770000008A0000009D000000B0000000380100000100000027020000130000000000002B010000010000000502000013000000000000C20000000100000057000000240000000000007401000001000000DE02000024000000000000BD000000010000005000000024000000000000 - sectname: __debug_frame segname: __DWARF - addr: 0x938 - size: 208 - offset: 0xDF0 + addr: 0xA50 + size: 232 + offset: 0xF08 align: 3 - reloff: 0x1050 - nreloc: 7 + reloff: 0x11B0 + nreloc: 8 flags: 0x2000000 reserved1: 0x0 reserved2: 0x0 reserved3: 0x0 - content: 14000000FFFFFFFF0400080001781E0C1F00000000000000140000000000000000000000000000000800000000000000140000000000000008000000000000000800000000000000140000000000000010000000000000000800000000000000140000000000000018000000000000000800000000000000240000000000000020000000000000005800000000000000500C1D109E019D02930394040000000014000000000000007800000000000000040000000000000014000000000000007C000000000000000400000000000000 + content: 14000000FFFFFFFF0400080001781E0C1F00000000000000140000000000000000000000000000000800000000000000140000000000000008000000000000000800000000000000140000000000000010000000000000000800000000000000140000000000000018000000000000000800000000000000140000000000000020000000000000000800000000000000240000000000000028000000000000006400000000000000500C1D109E019D02930394040000000014000000000000008C000000000000000400000000000000140000000000000090000000000000000400000000000000 relocations: + - address: 0xD8 + symbolnum: 1 + pcrel: false + length: 3 + extern: false + type: 0 + scattered: false + value: 0 - address: 0xC0 symbolnum: 1 pcrel: false @@ -435,7 +477,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0xA8 + - address: 0x98 symbolnum: 1 pcrel: false length: 3 @@ -485,18 +527,26 @@ LoadCommands: value: 0 - sectname: __debug_line segname: __DWARF - addr: 0xA08 - size: 225 - offset: 0xEC0 + addr: 0xB38 + size: 253 + offset: 0xFF0 align: 0 - reloff: 0x1088 - nreloc: 7 + reloff: 0x11F0 + nreloc: 8 flags: 0x2000000 reserved1: 0x0 reserved2: 0x0 reserved3: 0x0 relocations: - - address: 0xD1 + - address: 0xED + symbolnum: 1 + pcrel: false + length: 3 + extern: false + type: 0 + scattered: false + value: 0 + - address: 0xD9 symbolnum: 1 pcrel: false length: 3 @@ -504,7 +554,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0xBD + - address: 0xAA symbolnum: 1 pcrel: false length: 3 @@ -512,7 +562,7 @@ LoadCommands: type: 0 scattered: false value: 0 - - address: 0x92 + - address: 0x96 symbolnum: 1 pcrel: false length: 3 @@ -560,21 +610,21 @@ LoadCommands: ntools: 0 - cmd: LC_LINKER_OPTIMIZATION_HINT cmdsize: 16 - dataoff: 4288 + dataoff: 4656 datasize: 8 - cmd: LC_SYMTAB cmdsize: 24 - symoff: 4296 - nsyms: 10 - stroff: 4456 - strsize: 144 + symoff: 4664 + nsyms: 11 + stroff: 4840 + strsize: 168 - cmd: LC_DYSYMTAB cmdsize: 80 ilocalsym: 0 nlocalsym: 3 iextdefsym: 3 - nextdefsym: 7 - iundefsym: 10 + nextdefsym: 8 + iundefsym: 11 nundefsym: 0 tocoff: 0 ntoc: 0 @@ -590,7 +640,7 @@ LoadCommands: nlocrel: 0 LinkEditData: NameList: - - n_strx: 138 + - n_strx: 155 n_type: 0xE n_sect: 1 n_desc: 0 @@ -599,47 +649,52 @@ LinkEditData: n_type: 0xE n_sect: 2 n_desc: 0 - n_value: 128 - - n_strx: 132 + n_value: 148 + - n_strx: 149 n_type: 0xE n_sect: 2 n_desc: 0 - n_value: 128 + n_value: 148 - n_strx: 39 n_type: 0xF n_sect: 1 n_desc: 192 - n_value: 120 + n_value: 140 - n_strx: 14 n_type: 0xF n_sect: 1 n_desc: 192 - n_value: 124 + n_value: 144 + - n_strx: 132 + n_type: 0xF + n_sect: 1 + n_desc: 0 + n_value: 0 - n_strx: 115 n_type: 0xF n_sect: 1 n_desc: 0 - n_value: 8 + n_value: 16 - n_strx: 81 n_type: 0xF n_sect: 1 n_desc: 0 - n_value: 24 + n_value: 32 - n_strx: 98 n_type: 0xF n_sect: 1 n_desc: 0 - n_value: 0 + n_value: 8 - n_strx: 64 n_type: 0xF n_sect: 1 n_desc: 0 - n_value: 16 + n_value: 24 - n_strx: 8 n_type: 0xF n_sect: 1 n_desc: 0 - n_value: 32 + n_value: 40 StringTable: - '' - l_.str @@ -650,16 +705,25 @@ LinkEditData: - _function2_copy2 - _function3_copy1 - _function2_copy1 + - _function1_copy1 - ltmp1 - ltmp0 + - '' + - '' + - '' + - '' + - '' + - '' + - '' DWARF: debug_str: - - '' + - 'Facebook clang version 19.1.5 (https://git.internal.tfbnw.net/repos/git/rw/osmeta/external/llvm-project b36c9ae1f8f2b39e4aafb9ca4700c608c3036365)' - stmt_seq_macho.cpp - '/' - '/private/tmp/stmt_seq' - char - __ARRAY_SIZE_TYPE__ + - function1_copy1 - function3_copy1 - function2_copy1 - function3_copy2 @@ -786,6 +850,18 @@ DWARF: Tag: DW_TAG_formal_parameter Children: DW_CHILDREN_no Attributes: + - Attribute: DW_AT_name + Form: DW_FORM_strp + - Attribute: DW_AT_decl_file + Form: DW_FORM_data1 + - Attribute: DW_AT_decl_line + Form: DW_FORM_data1 + - Attribute: DW_AT_type + Form: DW_FORM_ref4 + - Code: 0xA + Tag: DW_TAG_formal_parameter + Children: DW_CHILDREN_no + Attributes: - Attribute: DW_AT_location Form: DW_FORM_sec_offset - Attribute: DW_AT_name @@ -796,7 +872,7 @@ DWARF: Form: DW_FORM_data1 - Attribute: DW_AT_type Form: DW_FORM_ref4 - - Code: 0xA + - Code: 0xB Tag: DW_TAG_variable Children: DW_CHILDREN_no Attributes: @@ -810,7 +886,7 @@ DWARF: Form: DW_FORM_data1 - Attribute: DW_AT_type Form: DW_FORM_ref4 - - Code: 0xB + - Code: 0xC Tag: DW_TAG_subprogram Children: DW_CHILDREN_yes Attributes: @@ -836,7 +912,7 @@ DWARF: Form: DW_FORM_flag_present - Attribute: DW_AT_APPLE_optimized Form: DW_FORM_flag_present - - Code: 0xC + - Code: 0xD Tag: DW_TAG_variable Children: DW_CHILDREN_no Attributes: @@ -850,7 +926,7 @@ DWARF: Form: DW_FORM_data1 - Attribute: DW_AT_type Form: DW_FORM_ref4 - - Code: 0xD + - Code: 0xE Tag: DW_TAG_call_site Children: DW_CHILDREN_yes Attributes: @@ -858,7 +934,7 @@ DWARF: Form: DW_FORM_ref4 - Attribute: DW_AT_call_return_pc Form: DW_FORM_addr - - Code: 0xE + - Code: 0xF Tag: DW_TAG_call_site_parameter Children: DW_CHILDREN_no Attributes: @@ -866,7 +942,7 @@ DWARF: Form: DW_FORM_exprloc - Attribute: DW_AT_call_value Form: DW_FORM_exprloc - - Code: 0xF + - Code: 0x10 Tag: DW_TAG_structure_type Children: DW_CHILDREN_yes Attributes: @@ -880,7 +956,7 @@ DWARF: Form: DW_FORM_data1 - Attribute: DW_AT_decl_line Form: DW_FORM_data1 - - Code: 0x10 + - Code: 0x11 Tag: DW_TAG_inheritance Children: DW_CHILDREN_no Attributes: @@ -888,7 +964,7 @@ DWARF: Form: DW_FORM_ref4 - Attribute: DW_AT_data_member_location Form: DW_FORM_data1 - - Code: 0x11 + - Code: 0x12 Tag: DW_TAG_subprogram Children: DW_CHILDREN_yes Attributes: @@ -906,7 +982,7 @@ DWARF: Form: DW_FORM_flag_present - Attribute: DW_AT_explicit Form: DW_FORM_flag_present - - Code: 0x12 + - Code: 0x13 Tag: DW_TAG_formal_parameter Children: DW_CHILDREN_no Attributes: @@ -914,13 +990,13 @@ DWARF: Form: DW_FORM_ref4 - Attribute: DW_AT_artificial Form: DW_FORM_flag_present - - Code: 0x13 + - Code: 0x14 Tag: DW_TAG_formal_parameter Children: DW_CHILDREN_no Attributes: - Attribute: DW_AT_type Form: DW_FORM_ref4 - - Code: 0x14 + - Code: 0x15 Tag: DW_TAG_subprogram Children: DW_CHILDREN_yes Attributes: @@ -936,13 +1012,13 @@ DWARF: Form: DW_FORM_flag_present - Attribute: DW_AT_APPLE_optimized Form: DW_FORM_flag_present - - Code: 0x15 + - Code: 0x16 Tag: DW_TAG_pointer_type Children: DW_CHILDREN_no Attributes: - Attribute: DW_AT_type Form: DW_FORM_ref4 - - Code: 0x16 + - Code: 0x17 Tag: DW_TAG_subprogram Children: DW_CHILDREN_yes Attributes: @@ -964,7 +1040,7 @@ DWARF: Form: DW_FORM_strp - Attribute: DW_AT_specification Form: DW_FORM_ref4 - - Code: 0x17 + - Code: 0x18 Tag: DW_TAG_formal_parameter Children: DW_CHILDREN_no Attributes: @@ -976,7 +1052,7 @@ DWARF: Form: DW_FORM_ref4 - Attribute: DW_AT_artificial Form: DW_FORM_flag_present - - Code: 0x18 + - Code: 0x19 Tag: DW_TAG_formal_parameter Children: DW_CHILDREN_no Attributes: @@ -990,7 +1066,7 @@ DWARF: Form: DW_FORM_data1 - Attribute: DW_AT_type Form: DW_FORM_ref4 - - Code: 0x19 + - Code: 0x1A Tag: DW_TAG_call_site Children: DW_CHILDREN_yes Attributes: @@ -1001,7 +1077,7 @@ DWARF: - Attribute: DW_AT_call_pc Form: DW_FORM_addr debug_info: - - Length: 0x2AA + - Length: 0x2E7 Version: 4 AbbrevTableID: 0 AbbrOffset: 0x0 @@ -1011,20 +1087,20 @@ DWARF: Values: - Value: 0x0 - Value: 0x21 - - Value: 0x1 - - Value: 0x14 + - Value: 0x92 + - Value: 0xA5 - Value: 0x0 - - Value: 0x16 + - Value: 0xA7 - Value: 0x1 - Value: 0x0 - - Value: 0x80 + - Value: 0x94 - AbbrCode: 0x2 Values: - Value: 0x3F - Value: 0x1 - - Value: 0x23 + - Value: 0x27 - Value: 0x9 - BlockData: [ 0x3, 0x80, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + BlockData: [ 0x3, 0x94, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 ] - AbbrCode: 0x3 Values: @@ -1039,12 +1115,12 @@ DWARF: - Value: 0x50 - AbbrCode: 0x6 Values: - - Value: 0x2C + - Value: 0xBD - Value: 0x6 - Value: 0x1 - AbbrCode: 0x7 Values: - - Value: 0x31 + - Value: 0xC2 - Value: 0x8 - Value: 0x7 - AbbrCode: 0x8 @@ -1056,285 +1132,318 @@ DWARF: - Value: 0x1 BlockData: [ 0x6F ] - Value: 0x1 - - Value: 0x45 + - Value: 0xD6 - Value: 0x1 - - Value: 0x3 - - Value: 0x2A1 + - Value: 0x2 + - Value: 0x2DE - Value: 0x1 - Value: 0x1 - AbbrCode: 0x9 Values: - - Value: 0x0 - - Value: 0xD7 + - Value: 0x178 + - Value: 0x1 + - Value: 0x2 + - Value: 0x2DE + - AbbrCode: 0x0 + - AbbrCode: 0x8 + Values: + - Value: 0x8 + - Value: 0x8 + - Value: 0x1 + - Value: 0x4A + - Value: 0x1 + BlockData: [ 0x6F ] + - Value: 0x1 + - Value: 0xE6 + - Value: 0x1 + - Value: 0x6 + - Value: 0x2DE + - Value: 0x1 - Value: 0x1 - - Value: 0x3 - - Value: 0x2A1 - AbbrCode: 0xA Values: + - Value: 0x0 + - Value: 0x178 + - Value: 0x1 + - Value: 0x6 + - Value: 0x2DE + - AbbrCode: 0xB + Values: - Value: 0x39 - - Value: 0xD9 + - Value: 0x17A - Value: 0x1 - - Value: 0x4 - - Value: 0x2A1 + - Value: 0x7 + - Value: 0x2DE - AbbrCode: 0x0 - AbbrCode: 0x8 Values: - - Value: 0x8 + - Value: 0x10 - Value: 0x8 - Value: 0x1 - - Value: 0x4A + - Value: 0x60 - Value: 0x1 BlockData: [ 0x6F ] - Value: 0x1 - - Value: 0x55 + - Value: 0xF6 - Value: 0x1 - - Value: 0x8 - - Value: 0x2A1 + - Value: 0xB + - Value: 0x2DE - Value: 0x1 - Value: 0x1 - - AbbrCode: 0x9 + - AbbrCode: 0xA Values: - Value: 0x5E - - Value: 0xD7 + - Value: 0x178 - Value: 0x1 - - Value: 0x8 - - Value: 0x2A1 + - Value: 0xB + - Value: 0x2DE - AbbrCode: 0x0 - AbbrCode: 0x8 Values: - - Value: 0x10 + - Value: 0x18 - Value: 0x8 - Value: 0x1 - - Value: 0x60 + - Value: 0x78 - Value: 0x1 BlockData: [ 0x6F ] - Value: 0x1 - - Value: 0x65 + - Value: 0x106 - Value: 0x1 - - Value: 0xC - - Value: 0x2A1 + - Value: 0xF + - Value: 0x2DE - Value: 0x1 - Value: 0x1 - - AbbrCode: 0x9 + - AbbrCode: 0xA Values: - Value: 0x97 - - Value: 0xD7 + - Value: 0x178 - Value: 0x1 - - Value: 0xC - - Value: 0x2A1 - - AbbrCode: 0xA + - Value: 0xF + - Value: 0x2DE + - AbbrCode: 0xB Values: - Value: 0xD0 - - Value: 0xD9 + - Value: 0x17A - Value: 0x1 - - Value: 0xD - - Value: 0x2A1 + - Value: 0x10 + - Value: 0x2DE - AbbrCode: 0x0 - AbbrCode: 0x8 Values: - - Value: 0x18 + - Value: 0x20 - Value: 0x8 - Value: 0x1 - - Value: 0x78 + - Value: 0x90 - Value: 0x1 BlockData: [ 0x6F ] - Value: 0x1 - - Value: 0x75 + - Value: 0x116 - Value: 0x1 - - Value: 0x11 - - Value: 0x2A1 + - Value: 0x14 + - Value: 0x2DE - Value: 0x1 - Value: 0x1 - - AbbrCode: 0x9 + - AbbrCode: 0xA Values: - Value: 0xF5 - - Value: 0xD7 + - Value: 0x178 - Value: 0x1 - - Value: 0x11 - - Value: 0x2A1 - - AbbrCode: 0xA + - Value: 0x14 + - Value: 0x2DE + - AbbrCode: 0xB Values: - Value: 0x12E - - Value: 0xDB + - Value: 0x17C - Value: 0x1 - - Value: 0x12 - - Value: 0x2A1 + - Value: 0x15 + - Value: 0x2DE - AbbrCode: 0x0 - - AbbrCode: 0xB + - AbbrCode: 0xC Values: - - Value: 0x20 - - Value: 0x58 - - Value: 0x8F + - Value: 0x28 + - Value: 0x64 + - Value: 0xA7 - Value: 0x1 BlockData: [ 0x6D ] - Value: 0x1 - - Value: 0x85 + - Value: 0x126 - Value: 0x1 - - Value: 0x1E - - Value: 0x2A1 + - Value: 0x21 + - Value: 0x2DE - Value: 0x1 - Value: 0x1 - - AbbrCode: 0xC + - AbbrCode: 0xD Values: - Value: 0x2 BlockData: [ 0x8F, 0xF ] - - Value: 0xE2 + - Value: 0x183 - Value: 0x1 - - Value: 0x23 - - Value: 0x1C8 - - AbbrCode: 0xA + - Value: 0x27 + - Value: 0x205 + - AbbrCode: 0xB Values: - Value: 0x151 - - Value: 0xE4 + - Value: 0x185 - Value: 0x1 - - Value: 0x1F - - Value: 0x2A1 - - AbbrCode: 0xD - Values: - - Value: 0x103 - - Value: 0x38 + - Value: 0x22 + - Value: 0x2DE - AbbrCode: 0xE Values: + - Value: 0x12C + - Value: 0x40 + - AbbrCode: 0xF + Values: - Value: 0x1 BlockData: [ 0x50 ] - Value: 0x1 BlockData: [ 0x33 ] - AbbrCode: 0x0 - - AbbrCode: 0xD - Values: - - Value: 0xC7 - - Value: 0x44 - AbbrCode: 0xE Values: + - Value: 0xF0 + - Value: 0x4C + - AbbrCode: 0xF + Values: - Value: 0x1 BlockData: [ 0x50 ] - Value: 0x2 BlockData: [ 0x10, 0x29 ] - AbbrCode: 0x0 - - AbbrCode: 0xD - Values: - - Value: 0x9A - - Value: 0x50 - AbbrCode: 0xE Values: + - Value: 0xC3 + - Value: 0x58 + - AbbrCode: 0xF + Values: - Value: 0x1 BlockData: [ 0x50 ] - Value: 0x1 BlockData: [ 0x3B ] - AbbrCode: 0x0 - - AbbrCode: 0xD + - AbbrCode: 0xE Values: - - Value: 0x215 + - Value: 0x5E - Value: 0x64 + - AbbrCode: 0xF + Values: + - Value: 0x1 + BlockData: [ 0x50 ] + - Value: 0x2 + BlockData: [ 0x10, 0x2A ] + - AbbrCode: 0x0 - AbbrCode: 0xE Values: + - Value: 0x252 + - Value: 0x78 + - AbbrCode: 0xF + Values: - Value: 0x1 BlockData: [ 0x50 ] - Value: 0x2 BlockData: [ 0x8F, 0xF ] - AbbrCode: 0x0 - AbbrCode: 0x0 - - AbbrCode: 0xF + - AbbrCode: 0x10 Values: - Value: 0x5 - - Value: 0x8A + - Value: 0x12B - Value: 0x1 - Value: 0x1 - - Value: 0x1A - - AbbrCode: 0x10 + - Value: 0x1D + - AbbrCode: 0x11 Values: - - Value: 0x1EA + - Value: 0x227 - Value: 0x0 - - AbbrCode: 0x11 + - AbbrCode: 0x12 Values: - - Value: 0x8A + - Value: 0x12B - Value: 0x1 - - Value: 0x1B + - Value: 0x1E - Value: 0x1 - Value: 0x1 - Value: 0x1 - Value: 0x1 - - AbbrCode: 0x12 + - AbbrCode: 0x13 Values: - - Value: 0x210 + - Value: 0x24D - Value: 0x1 - - AbbrCode: 0x13 + - AbbrCode: 0x14 Values: - - Value: 0x20B + - Value: 0x248 - AbbrCode: 0x0 - AbbrCode: 0x0 - - AbbrCode: 0xF + - AbbrCode: 0x10 Values: - Value: 0x5 - - Value: 0x97 + - Value: 0x138 - Value: 0x1 - Value: 0x1 - - Value: 0x16 - - AbbrCode: 0x14 + - Value: 0x19 + - AbbrCode: 0x15 Values: - - Value: 0x97 + - Value: 0x138 - Value: 0x1 - - Value: 0x17 + - Value: 0x1A - Value: 0x1 - Value: 0x1 - Value: 0x1 - - AbbrCode: 0x12 + - AbbrCode: 0x13 Values: - - Value: 0x206 + - Value: 0x243 - Value: 0x1 - - AbbrCode: 0x13 + - AbbrCode: 0x14 Values: - - Value: 0x20B + - Value: 0x248 - AbbrCode: 0x0 - AbbrCode: 0x0 - - AbbrCode: 0x15 + - AbbrCode: 0x16 Values: - - Value: 0x1EA - - AbbrCode: 0x15 + - Value: 0x227 + - AbbrCode: 0x16 Values: - Value: 0x4B - - AbbrCode: 0x15 - Values: - - Value: 0x1C8 - AbbrCode: 0x16 Values: - - Value: 0x78 + - Value: 0x205 + - AbbrCode: 0x17 + Values: + - Value: 0x8C - Value: 0x4 - Value: 0x1 - - Value: 0xB7 + - Value: 0xD3 - Value: 0x1 BlockData: [ 0x6F ] - - Value: 0x234 + - Value: 0x271 - Value: 0x1 - - Value: 0xA3 - - Value: 0x1D7 - - AbbrCode: 0x17 + - Value: 0x144 + - Value: 0x214 + - AbbrCode: 0x18 Values: - Value: 0x1 BlockData: [ 0x50 ] - - Value: 0xE8 - - Value: 0x2A8 + - Value: 0x189 + - Value: 0x2E5 - Value: 0x1 - - AbbrCode: 0x18 + - AbbrCode: 0x19 Values: - Value: 0x1 BlockData: [ 0x51 ] - - Value: 0xED + - Value: 0x18E - Value: 0x1 - - Value: 0x1B - - Value: 0x20B - - AbbrCode: 0x19 + - Value: 0x1E + - Value: 0x248 + - AbbrCode: 0x1A Values: - - Value: 0x269 + - Value: 0x2A6 - Value: 0x1 - - Value: 0x78 - - AbbrCode: 0xE + - Value: 0x8C + - AbbrCode: 0xF Values: - Value: 0x1 BlockData: [ 0x50 ] - Value: 0x3 BlockData: [ 0xA3, 0x1, 0x50 ] - - AbbrCode: 0xE + - AbbrCode: 0xF Values: - Value: 0x1 BlockData: [ 0x51 ] @@ -1342,45 +1451,45 @@ DWARF: BlockData: [ 0xA3, 0x1, 0x51 ] - AbbrCode: 0x0 - AbbrCode: 0x0 - - AbbrCode: 0x16 + - AbbrCode: 0x17 Values: - - Value: 0x7C + - Value: 0x90 - Value: 0x4 - Value: 0x1 - - Value: 0xCB + - Value: 0xE7 - Value: 0x1 BlockData: [ 0x6F ] - - Value: 0x288 + - Value: 0x2C5 - Value: 0x1 - - Value: 0xBB - - Value: 0x1D7 - - AbbrCode: 0x17 + - Value: 0x15C + - Value: 0x214 + - AbbrCode: 0x18 Values: - Value: 0x1 BlockData: [ 0x50 ] - - Value: 0xE8 - - Value: 0x2A8 + - Value: 0x189 + - Value: 0x2E5 - Value: 0x1 - - AbbrCode: 0x18 + - AbbrCode: 0x19 Values: - Value: 0x1 BlockData: [ 0x51 ] - - Value: 0xED + - Value: 0x18E - Value: 0x1 - - Value: 0x1B - - Value: 0x20B + - Value: 0x1E + - Value: 0x248 - AbbrCode: 0x0 - AbbrCode: 0x6 Values: - - Value: 0xD3 + - Value: 0x174 - Value: 0x5 - Value: 0x4 - - AbbrCode: 0x15 + - AbbrCode: 0x16 Values: - - Value: 0x1C8 + - Value: 0x205 - AbbrCode: 0x0 debug_line: - - Length: 221 + - Length: 249 Version: 4 PrologueLength: 42 MinInstLength: 1 @@ -1397,17 +1506,17 @@ DWARF: Length: 0 Opcodes: - Opcode: DW_LNS_set_column - Data: 14 + Data: 10 - Opcode: DW_LNS_set_prologue_end Data: 0 - Opcode: DW_LNS_extended_op ExtLen: 9 SubOpcode: DW_LNE_set_address Data: 0 - - Opcode: 0x16 + - Opcode: 0x14 Data: 0 - Opcode: DW_LNS_set_column - Data: 5 + Data: 3 - Opcode: DW_LNS_negate_stmt Data: 0 - Opcode: 0x4A @@ -1424,7 +1533,7 @@ DWARF: ExtLen: 9 SubOpcode: DW_LNE_set_address Data: 8 - - Opcode: 0x1A + - Opcode: 0x19 Data: 0 - Opcode: DW_LNS_set_column Data: 5 @@ -1445,7 +1554,7 @@ DWARF: SubOpcode: DW_LNE_set_address Data: 16 - Opcode: DW_LNS_advance_line - SData: 13 + SData: 11 Data: 0 - Opcode: DW_LNS_copy Data: 0 @@ -1460,7 +1569,7 @@ DWARF: SubOpcode: DW_LNE_end_sequence Data: 0 - Opcode: DW_LNS_set_column - Data: 20 + Data: 14 - Opcode: DW_LNS_set_prologue_end Data: 0 - Opcode: DW_LNS_extended_op @@ -1468,24 +1577,47 @@ DWARF: SubOpcode: DW_LNE_set_address Data: 24 - Opcode: DW_LNS_advance_line - SData: 17 + SData: 16 Data: 0 - Opcode: DW_LNS_copy Data: 0 - Opcode: DW_LNS_set_column Data: 5 - - Opcode: 0x4B + - Opcode: DW_LNS_negate_stmt + Data: 0 + - Opcode: 0x4A Data: 0 - Opcode: DW_LNS_extended_op ExtLen: 1 SubOpcode: DW_LNE_end_sequence Data: 0 + - Opcode: DW_LNS_set_column + Data: 20 + - Opcode: DW_LNS_set_prologue_end + Data: 0 - Opcode: DW_LNS_extended_op ExtLen: 9 SubOpcode: DW_LNE_set_address Data: 32 - Opcode: DW_LNS_advance_line - SData: 29 + SData: 20 + Data: 0 + - Opcode: DW_LNS_copy + Data: 0 + - Opcode: DW_LNS_set_column + Data: 5 + - Opcode: 0x4B + Data: 0 + - Opcode: DW_LNS_extended_op + ExtLen: 1 + SubOpcode: DW_LNE_end_sequence + Data: 0 + - Opcode: DW_LNS_extended_op + ExtLen: 9 + SubOpcode: DW_LNE_set_address + Data: 40 + - Opcode: DW_LNS_advance_line + SData: 32 Data: 0 - Opcode: DW_LNS_copy Data: 0 @@ -1509,9 +1641,15 @@ DWARF: Data: 0 - Opcode: 0x4B Data: 0 + - Opcode: 0xBB + Data: 0 + - Opcode: DW_LNS_set_column + Data: 9 + - Opcode: 0x81 + Data: 0 - Opcode: DW_LNS_set_column Data: 18 - - Opcode: 0xBB + - Opcode: 0x4C Data: 0 - Opcode: DW_LNS_set_column Data: 9 @@ -1534,9 +1672,9 @@ DWARF: - Opcode: DW_LNS_extended_op ExtLen: 9 SubOpcode: DW_LNE_set_address - Data: 120 + Data: 140 - Opcode: DW_LNS_advance_line - SData: 26 + SData: 29 Data: 0 - Opcode: DW_LNS_copy Data: 0 @@ -1551,9 +1689,9 @@ DWARF: - Opcode: DW_LNS_extended_op ExtLen: 9 SubOpcode: DW_LNE_set_address - Data: 124 + Data: 144 - Opcode: DW_LNS_advance_line - SData: 26 + SData: 29 Data: 0 - Opcode: DW_LNS_copy Data: 0 @@ -1604,7 +1742,7 @@ LoadCommands: - sectname: __text segname: __TEXT addr: 0x1000002F0 - size: 112 + size: 132 offset: 0x2F0 align: 2 reloff: 0x0 @@ -1613,12 +1751,12 @@ LoadCommands: reserved1: 0x0 reserved2: 0x0 reserved3: 0x0 - content: 00580051C0035FD600100011C0035FD6FFC300D1F44F01A9FD7B02A9FD83009160008052F7FFFF97F30300AA20058052F6FFFF971400130B60018052F1FFFF97F30300AA610100101F2003D5E03F0091060000948002130BFD7B42A9F44F41A9FFC30091C0035FD601000014C0035FD6 + content: 00040011C0035FD600580051C0035FD600100011C0035FD6FFC300D1F44F01A9FD7B02A9FD83009160008052F7FFFF97F30300AA20058052F6FFFF971400130B60018052F1FFFF97F30300AA40058052ECFFFF977302000B610100101F2003D5E03F0091060000948002130BFD7B42A9F44F41A9FFC30091C0035FD601000014C0035FD6 - sectname: __cstring segname: __TEXT - addr: 0x100000360 + addr: 0x100000374 size: 5 - offset: 0x360 + offset: 0x374 align: 0 reloff: 0x0 nreloc: 0 @@ -1631,9 +1769,9 @@ LoadCommands: cmdsize: 72 segname: __LINKEDIT vmaddr: 4294983680 - vmsize: 960 + vmsize: 1040 fileoff: 16384 - filesize: 960 + filesize: 1040 maxprot: 1 initprot: 1 nsects: 0 @@ -1649,20 +1787,20 @@ LoadCommands: lazy_bind_off: 0 lazy_bind_size: 0 export_off: 16384 - export_size: 96 + export_size: 112 - cmd: LC_SYMTAB cmdsize: 24 - symoff: 16488 - nsyms: 22 - stroff: 16840 - strsize: 192 + symoff: 16504 + nsyms: 25 + stroff: 16904 + strsize: 208 - cmd: LC_DYSYMTAB cmdsize: 80 ilocalsym: 0 - nlocalsym: 17 - iextdefsym: 17 - nextdefsym: 5 - iundefsym: 22 + nlocalsym: 19 + iextdefsym: 19 + nextdefsym: 6 + iundefsym: 25 nundefsym: 0 tocoff: 0 ntoc: 0 @@ -1683,7 +1821,7 @@ LoadCommands: ZeroPadBytes: 7 - cmd: LC_UUID cmdsize: 24 - uuid: 4C4C4480-5555-3144-A138-E5DA50CC68DB + uuid: 4C4C443F-5555-3144-A15F-DE084AB2A15B - cmd: LC_BUILD_VERSION cmdsize: 32 platform: 1 @@ -1692,22 +1830,22 @@ LoadCommands: ntools: 1 Tools: - tool: 4 - version: 1376256 + version: 1245445 - cmd: LC_MAIN cmdsize: 24 - entryoff: 768 + entryoff: 776 stacksize: 0 - cmd: LC_FUNCTION_STARTS cmdsize: 16 - dataoff: 16480 + dataoff: 16496 datasize: 8 - cmd: LC_DATA_IN_CODE cmdsize: 16 - dataoff: 16488 + dataoff: 16504 datasize: 0 - cmd: LC_CODE_SIGNATURE cmdsize: 16 - dataoff: 17040 + dataoff: 17120 datasize: 304 LinkEditData: ExportTrie: @@ -1738,7 +1876,7 @@ LinkEditData: NodeOffset: 47 Name: main Flags: 0x0 - Address: 0x300 + Address: 0x308 Other: 0x0 ImportName: '' - TerminalSize: 0 @@ -1749,8 +1887,15 @@ LinkEditData: Other: 0x0 ImportName: '' Children: + - TerminalSize: 3 + NodeOffset: 80 + Name: 1_copy1 + Flags: 0x0 + Address: 0x2F0 + Other: 0x0 + ImportName: '' - TerminalSize: 0 - NodeOffset: 71 + NodeOffset: 85 Name: 2_copy Flags: 0x0 Address: 0x0 @@ -1758,52 +1903,52 @@ LinkEditData: ImportName: '' Children: - TerminalSize: 3 - NodeOffset: 79 + NodeOffset: 93 Name: '1' Flags: 0x0 - Address: 0x2F0 + Address: 0x2F8 Other: 0x0 ImportName: '' - TerminalSize: 3 - NodeOffset: 84 + NodeOffset: 98 Name: '2' Flags: 0x0 - Address: 0x2F0 + Address: 0x2F8 Other: 0x0 ImportName: '' - TerminalSize: 3 - NodeOffset: 89 + NodeOffset: 103 Name: 3_copy2 Flags: 0x0 - Address: 0x2F8 + Address: 0x300 Other: 0x0 ImportName: '' NameList: - - n_strx: 129 + - n_strx: 146 n_type: 0x64 n_sect: 0 n_desc: 0 n_value: 0 - - n_strx: 170 + - n_strx: 187 n_type: 0x66 n_sect: 0 n_desc: 1 n_value: 0 - - n_strx: 59 + - n_strx: 76 n_type: 0x24 n_sect: 1 n_desc: 0 - n_value: 4294968152 + n_value: 4294968172 - n_strx: 1 n_type: 0x24 n_sect: 0 n_desc: 0 n_value: 4 - - n_strx: 84 + - n_strx: 101 n_type: 0x24 n_sect: 1 n_desc: 0 - n_value: 4294968156 + n_value: 4294968176 - n_strx: 1 n_type: 0x24 n_sect: 0 @@ -1813,12 +1958,12 @@ LinkEditData: n_type: 0x24 n_sect: 1 n_desc: 0 - n_value: 4294968064 + n_value: 4294968072 - n_strx: 1 n_type: 0x24 n_sect: 0 n_desc: 0 - n_value: 88 + n_value: 100 - n_strx: 8 n_type: 0x24 n_sect: 1 @@ -1843,7 +1988,17 @@ LinkEditData: n_type: 0x24 n_sect: 1 n_desc: 0 - n_value: 4294968048 + n_value: 4294968064 + - n_strx: 1 + n_type: 0x24 + n_sect: 0 + n_desc: 0 + n_value: 8 + - n_strx: 59 + n_type: 0x24 + n_sect: 1 + n_desc: 0 + n_value: 4294968056 - n_strx: 1 n_type: 0x24 n_sect: 0 @@ -1854,21 +2009,21 @@ LinkEditData: n_sect: 1 n_desc: 0 n_value: 0 - - n_strx: 59 + - n_strx: 76 n_type: 0x1E n_sect: 1 n_desc: 0 - n_value: 4294968152 - - n_strx: 84 + n_value: 4294968172 + - n_strx: 101 n_type: 0x1E n_sect: 1 n_desc: 0 - n_value: 4294968156 + n_value: 4294968176 - n_strx: 2 n_type: 0xF n_sect: 1 n_desc: 0 - n_value: 4294968064 + n_value: 4294968072 - n_strx: 8 n_type: 0xF n_sect: 1 @@ -1883,8 +2038,13 @@ LinkEditData: n_type: 0xF n_sect: 1 n_desc: 0 - n_value: 4294968048 - - n_strx: 109 + n_value: 4294968064 + - n_strx: 59 + n_type: 0xF + n_sect: 1 + n_desc: 0 + n_value: 4294968056 + - n_strx: 126 n_type: 0xF n_sect: 1 n_desc: 16 @@ -1892,6 +2052,7 @@ LinkEditData: StringTable: - ' ' - _main + - _function1_copy1 - _function2_copy1 - _function3_copy2 - _function2_copy2 @@ -1904,6 +2065,5 @@ LinkEditData: - '' - '' - '' - - '' - FunctionStarts: [ 0x2F0, 0x2F8, 0x300, 0x358, 0x35C ] + FunctionStarts: [ 0x2F0, 0x2F8, 0x300, 0x308, 0x36C, 0x370 ] ... diff --git a/llvm/test/tools/llc/new-pm/start-stop.ll b/llvm/test/tools/llc/new-pm/start-stop.ll index 13d9663..e4c4549 100644 --- a/llvm/test/tools/llc/new-pm/start-stop.ll +++ b/llvm/test/tools/llc/new-pm/start-stop.ll @@ -2,4 +2,4 @@ ; RUN: llc -mtriple=x86_64-pc-linux-gnu -enable-new-pm -print-pipeline-passes -start-before=mergeicmps -stop-after=gc-lowering -o /dev/null %s | FileCheck --match-full-lines %s --check-prefix=OBJ ; NULL: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,function(verify,mergeicmps,expand-memcmp,gc-lowering,verify) -; OBJ: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,function(verify,mergeicmps,expand-memcmp,gc-lowering,verify),PrintMIRPreparePass,function(machine-function(print),invalidate<machine-function-info>) +; OBJ: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,function(verify,mergeicmps,expand-memcmp,gc-lowering,verify),PrintMIRPreparePass,function(machine-function(print),free-machine-function) diff --git a/llvm/test/tools/llvm-exegesis/RISCV/set-reg-init-check.s b/llvm/test/tools/llvm-exegesis/RISCV/set-reg-init-check.s new file mode 100644 index 0000000..153e86a --- /dev/null +++ b/llvm/test/tools/llvm-exegesis/RISCV/set-reg-init-check.s @@ -0,0 +1,7 @@ +# RUN: llvm-exegesis -mode=latency -mtriple=riscv32-unknown-linux-gnu --mcpu=generic --dump-object-to-disk=%d --benchmark-phase=assemble-measured-code --opcode-name=FADD_D -mattr="+d" 2>&1 +# RUN: llvm-objdump -M numeric -d %d > %t.s +# RUN: FileCheck %s < %t.s + +CHECK: <foo>: +CHECK: li x30, 0x0 +CHECK-NEXT: fcvt.d.w f{{[0-9]|[12][0-9]|3[01]}}, x30 diff --git a/llvm/test/tools/llvm-ir2vec/embeddings.ll b/llvm/test/tools/llvm-ir2vec/embeddings.ll new file mode 100644 index 0000000..993ea86 --- /dev/null +++ b/llvm/test/tools/llvm-ir2vec/embeddings.ll @@ -0,0 +1,73 @@ +; RUN: llvm-ir2vec --mode=embeddings --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json %s | FileCheck %s -check-prefix=CHECK-DEFAULT +; RUN: llvm-ir2vec --mode=embeddings --level=func --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json %s | FileCheck %s -check-prefix=CHECK-FUNC-LEVEL +; RUN: llvm-ir2vec --mode=embeddings --level=func --function=abc --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json %s | FileCheck %s -check-prefix=CHECK-FUNC-LEVEL-ABC +; RUN: not llvm-ir2vec --mode=embeddings --level=func --function=def --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json %s 2>&1 | FileCheck %s -check-prefix=CHECK-FUNC-DEF +; RUN: llvm-ir2vec --mode=embeddings --level=bb --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json %s | FileCheck %s -check-prefix=CHECK-BB-LEVEL +; RUN: llvm-ir2vec --mode=embeddings --level=bb --function=abc_repeat --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json %s | FileCheck %s -check-prefix=CHECK-BB-LEVEL-ABC-REPEAT +; RUN: llvm-ir2vec --mode=embeddings --level=inst --function=abc_repeat --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json %s | FileCheck %s -check-prefix=CHECK-INST-LEVEL-ABC-REPEAT + +define dso_local noundef float @abc(i32 noundef %a, float noundef %b) #0 { +entry: + %a.addr = alloca i32, align 4 + %b.addr = alloca float, align 4 + store i32 %a, ptr %a.addr, align 4 + store float %b, ptr %b.addr, align 4 + %0 = load i32, ptr %a.addr, align 4 + %1 = load i32, ptr %a.addr, align 4 + %mul = mul nsw i32 %0, %1 + %conv = sitofp i32 %mul to float + %2 = load float, ptr %b.addr, align 4 + %add = fadd float %conv, %2 + ret float %add +} + +define dso_local noundef float @abc_repeat(i32 noundef %a, float noundef %b) #0 { +entry: + %a.addr = alloca i32, align 4 + %b.addr = alloca float, align 4 + store i32 %a, ptr %a.addr, align 4 + store float %b, ptr %b.addr, align 4 + %0 = load i32, ptr %a.addr, align 4 + %1 = load i32, ptr %a.addr, align 4 + %mul = mul nsw i32 %0, %1 + %conv = sitofp i32 %mul to float + %2 = load float, ptr %b.addr, align 4 + %add = fadd float %conv, %2 + ret float %add +} + +; CHECK-DEFAULT: Function: abc +; CHECK-DEFAULT-NEXT: [ 878.00 889.00 900.00 ] +; CHECK-DEFAULT-NEXT: Function: abc_repeat +; CHECK-DEFAULT-NEXT: [ 878.00 889.00 900.00 ] + +; CHECK-FUNC-LEVEL: Function: abc +; CHECK-FUNC-LEVEL-NEXT: [ 878.00 889.00 900.00 ] +; CHECK-FUNC-LEVEL-NEXT: Function: abc_repeat +; CHECK-FUNC-LEVEL-NEXT: [ 878.00 889.00 900.00 ] + +; CHECK-FUNC-LEVEL-ABC: Function: abc +; CHECK-FUNC-LEVEL-NEXT-ABC: [ 878.00 889.00 900.00 ] + +; CHECK-FUNC-DEF: Error: Function 'def' not found + +; CHECK-BB-LEVEL: Function: abc +; CHECK-BB-LEVEL-NEXT: entry: [ 878.00 889.00 900.00 ] +; CHECK-BB-LEVEL-NEXT: Function: abc_repeat +; CHECK-BB-LEVEL-NEXT: entry: [ 878.00 889.00 900.00 ] + +; CHECK-BB-LEVEL-ABC-REPEAT: Function: abc_repeat +; CHECK-BB-LEVEL-ABC-REPEAT-NEXT: entry: [ 878.00 889.00 900.00 ] + +; CHECK-INST-LEVEL-ABC-REPEAT: Function: abc_repeat +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: %a.addr = alloca i32, align 4 [ 91.00 92.00 93.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: %b.addr = alloca float, align 4 [ 91.00 92.00 93.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: store i32 %a, ptr %a.addr, align 4 [ 97.00 98.00 99.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: store float %b, ptr %b.addr, align 4 [ 97.00 98.00 99.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: %0 = load i32, ptr %a.addr, align 4 [ 94.00 95.00 96.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: %1 = load i32, ptr %a.addr, align 4 [ 94.00 95.00 96.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: %mul = mul nsw i32 %0, %1 [ 49.00 50.00 51.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: %conv = sitofp i32 %mul to float [ 130.00 131.00 132.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: %2 = load float, ptr %b.addr, align 4 [ 94.00 95.00 96.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: %add = fadd float %conv, %2 [ 40.00 41.00 42.00 ] +; CHECK-INST-LEVEL-ABC-REPEAT-NEXT: ret float %add [ 1.00 2.00 3.00 ] diff --git a/llvm/test/tools/llvm-ir2vec/entities.ll b/llvm/test/tools/llvm-ir2vec/entities.ll new file mode 100644 index 0000000..57c3d6f --- /dev/null +++ b/llvm/test/tools/llvm-ir2vec/entities.ll @@ -0,0 +1,95 @@ +; RUN: llvm-ir2vec --mode=entities | FileCheck %s + +CHECK: 92 +CHECK-NEXT: Ret 0 +CHECK-NEXT: Br 1 +CHECK-NEXT: Switch 2 +CHECK-NEXT: IndirectBr 3 +CHECK-NEXT: Invoke 4 +CHECK-NEXT: Resume 5 +CHECK-NEXT: Unreachable 6 +CHECK-NEXT: CleanupRet 7 +CHECK-NEXT: CatchRet 8 +CHECK-NEXT: CatchSwitch 9 +CHECK-NEXT: CallBr 10 +CHECK-NEXT: FNeg 11 +CHECK-NEXT: Add 12 +CHECK-NEXT: FAdd 13 +CHECK-NEXT: Sub 14 +CHECK-NEXT: FSub 15 +CHECK-NEXT: Mul 16 +CHECK-NEXT: FMul 17 +CHECK-NEXT: UDiv 18 +CHECK-NEXT: SDiv 19 +CHECK-NEXT: FDiv 20 +CHECK-NEXT: URem 21 +CHECK-NEXT: SRem 22 +CHECK-NEXT: FRem 23 +CHECK-NEXT: Shl 24 +CHECK-NEXT: LShr 25 +CHECK-NEXT: AShr 26 +CHECK-NEXT: And 27 +CHECK-NEXT: Or 28 +CHECK-NEXT: Xor 29 +CHECK-NEXT: Alloca 30 +CHECK-NEXT: Load 31 +CHECK-NEXT: Store 32 +CHECK-NEXT: GetElementPtr 33 +CHECK-NEXT: Fence 34 +CHECK-NEXT: AtomicCmpXchg 35 +CHECK-NEXT: AtomicRMW 36 +CHECK-NEXT: Trunc 37 +CHECK-NEXT: ZExt 38 +CHECK-NEXT: SExt 39 +CHECK-NEXT: FPToUI 40 +CHECK-NEXT: FPToSI 41 +CHECK-NEXT: UIToFP 42 +CHECK-NEXT: SIToFP 43 +CHECK-NEXT: FPTrunc 44 +CHECK-NEXT: FPExt 45 +CHECK-NEXT: PtrToInt 46 +CHECK-NEXT: IntToPtr 47 +CHECK-NEXT: BitCast 48 +CHECK-NEXT: AddrSpaceCast 49 +CHECK-NEXT: CleanupPad 50 +CHECK-NEXT: CatchPad 51 +CHECK-NEXT: ICmp 52 +CHECK-NEXT: FCmp 53 +CHECK-NEXT: PHI 54 +CHECK-NEXT: Call 55 +CHECK-NEXT: Select 56 +CHECK-NEXT: UserOp1 57 +CHECK-NEXT: UserOp2 58 +CHECK-NEXT: VAArg 59 +CHECK-NEXT: ExtractElement 60 +CHECK-NEXT: InsertElement 61 +CHECK-NEXT: ShuffleVector 62 +CHECK-NEXT: ExtractValue 63 +CHECK-NEXT: InsertValue 64 +CHECK-NEXT: LandingPad 65 +CHECK-NEXT: Freeze 66 +CHECK-NEXT: FloatTy 67 +CHECK-NEXT: FloatTy 68 +CHECK-NEXT: FloatTy 69 +CHECK-NEXT: FloatTy 70 +CHECK-NEXT: FloatTy 71 +CHECK-NEXT: FloatTy 72 +CHECK-NEXT: FloatTy 73 +CHECK-NEXT: VoidTy 74 +CHECK-NEXT: LabelTy 75 +CHECK-NEXT: MetadataTy 76 +CHECK-NEXT: UnknownTy 77 +CHECK-NEXT: TokenTy 78 +CHECK-NEXT: IntegerTy 79 +CHECK-NEXT: FunctionTy 80 +CHECK-NEXT: PointerTy 81 +CHECK-NEXT: StructTy 82 +CHECK-NEXT: ArrayTy 83 +CHECK-NEXT: VectorTy 84 +CHECK-NEXT: VectorTy 85 +CHECK-NEXT: PointerTy 86 +CHECK-NEXT: UnknownTy 87 +CHECK-NEXT: Function 88 +CHECK-NEXT: Pointer 89 +CHECK-NEXT: Constant 90 +CHECK-NEXT: Variable 91 diff --git a/llvm/test/tools/llvm-ir2vec/error-handling.ll b/llvm/test/tools/llvm-ir2vec/error-handling.ll new file mode 100644 index 0000000..c23c529 --- /dev/null +++ b/llvm/test/tools/llvm-ir2vec/error-handling.ll @@ -0,0 +1,22 @@ +; Test error handling and input validation for llvm-ir2vec tool + +; RUN: not llvm-ir2vec --mode=embeddings %s 2>&1 | FileCheck %s -check-prefix=CHECK-NO-VOCAB + +; RUN: not llvm-ir2vec --mode=embeddings --function=nonexistent --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json %s 2>&1 | FileCheck %s -check-prefix=CHECK-FUNC-NOT-FOUND + +; RUN: llvm-ir2vec --mode=triplets --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json --level=inst %s 2>&1 | FileCheck %s -check-prefix=CHECK-UNUSED-LEVEL +; RUN: llvm-ir2vec --mode=entities --level=inst %s 2>&1 | FileCheck %s -check-prefix=CHECK-UNUSED-LEVEL + +; RUN: llvm-ir2vec --mode=triplets --ir2vec-vocab-path=%ir2vec_test_vocab_dir/dummy_3D_nonzero_opc_vocab.json --function=dummy %s 2>&1 | FileCheck %s -check-prefix=CHECK-UNUSED-FUNC +; RUN: llvm-ir2vec --mode=entities --function=dummy %s 2>&1 | FileCheck %s -check-prefix=CHECK-UNUSED-FUNC + +; Simple test function for valid IR +define i32 @test_func(i32 %a) { +entry: + ret i32 %a +} + +; CHECK-NO-VOCAB: error: IR2Vec vocabulary file path not specified; You may need to set it using --ir2vec-vocab-path +; CHECK-FUNC-NOT-FOUND: Error: Function 'nonexistent' not found +; CHECK-UNUSED-LEVEL: Warning: --level option is ignored +; CHECK-UNUSED-FUNC: Warning: --function option is ignored diff --git a/llvm/test/tools/llvm-ir2vec/triplets.ll b/llvm/test/tools/llvm-ir2vec/triplets.ll new file mode 100644 index 0000000..dcd1dc9 --- /dev/null +++ b/llvm/test/tools/llvm-ir2vec/triplets.ll @@ -0,0 +1,65 @@ +; RUN: llvm-ir2vec --mode=triplets %s | FileCheck %s -check-prefix=TRIPLETS + +define i32 @simple_add(i32 %a, i32 %b) { +entry: + %add = add i32 %a, %b + ret i32 %add +} + +define i32 @simple_mul(i32 %x, i32 %y) { +entry: + %mul = mul i32 %x, %y + ret i32 %mul +} + +define i32 @test_function(i32 %arg1, i32 %arg2) { +entry: + %local1 = alloca i32, align 4 + %local2 = alloca i32, align 4 + store i32 %arg1, ptr %local1, align 4 + store i32 %arg2, ptr %local2, align 4 + %load1 = load i32, ptr %local1, align 4 + %load2 = load i32, ptr %local2, align 4 + %result = add i32 %load1, %load2 + ret i32 %result +} + +; TRIPLETS: MAX_RELATION=3 +; TRIPLETS-NEXT: 12 79 0 +; TRIPLETS-NEXT: 12 91 2 +; TRIPLETS-NEXT: 12 91 3 +; TRIPLETS-NEXT: 12 0 1 +; TRIPLETS-NEXT: 0 74 0 +; TRIPLETS-NEXT: 0 91 2 +; TRIPLETS-NEXT: 16 79 0 +; TRIPLETS-NEXT: 16 91 2 +; TRIPLETS-NEXT: 16 91 3 +; TRIPLETS-NEXT: 16 0 1 +; TRIPLETS-NEXT: 0 74 0 +; TRIPLETS-NEXT: 0 91 2 +; TRIPLETS-NEXT: 30 81 0 +; TRIPLETS-NEXT: 30 90 2 +; TRIPLETS-NEXT: 30 30 1 +; TRIPLETS-NEXT: 30 81 0 +; TRIPLETS-NEXT: 30 90 2 +; TRIPLETS-NEXT: 30 32 1 +; TRIPLETS-NEXT: 32 74 0 +; TRIPLETS-NEXT: 32 91 2 +; TRIPLETS-NEXT: 32 89 3 +; TRIPLETS-NEXT: 32 32 1 +; TRIPLETS-NEXT: 32 74 0 +; TRIPLETS-NEXT: 32 91 2 +; TRIPLETS-NEXT: 32 89 3 +; TRIPLETS-NEXT: 32 31 1 +; TRIPLETS-NEXT: 31 79 0 +; TRIPLETS-NEXT: 31 89 2 +; TRIPLETS-NEXT: 31 31 1 +; TRIPLETS-NEXT: 31 79 0 +; TRIPLETS-NEXT: 31 89 2 +; TRIPLETS-NEXT: 31 12 1 +; TRIPLETS-NEXT: 12 79 0 +; TRIPLETS-NEXT: 12 91 2 +; TRIPLETS-NEXT: 12 91 3 +; TRIPLETS-NEXT: 12 0 1 +; TRIPLETS-NEXT: 0 74 0 +; TRIPLETS-NEXT: 0 91 2 diff --git a/llvm/test/tools/llvm-mc/disassembler-profile.test b/llvm/test/tools/llvm-mc/disassembler-profile.test new file mode 100644 index 0000000..67afdce --- /dev/null +++ b/llvm/test/tools/llvm-mc/disassembler-profile.test @@ -0,0 +1,12 @@ +# REQUIRES: aarch64-registered-target +# RUN: rm -rf %t.json +# RUN: llvm-mc -triple=aarch64 -disassemble -o /dev/null %s -runs=1000 -time-trace -time-trace-file=%t.json +# RUN: FileCheck --input-file %t.json %s + +# Note: Test input taken from llvm/test/MC/Disassembler/AArch64/udf.txt + +# CHECK: "name":"Total getInstruction" +# CHECK: "args":{"count":3,"avg ms":{{.*}}} +[0x00,0x00,0x00,0x00] +[0x01,0x02,0x00,0x00] +[0xff,0xff,0x00,0x00] diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s index c7755dc..5cf5ed5 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s @@ -2322,685 +2322,685 @@ vwsub.wx v8, v16, x30 # CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu @@ -3354,533 +3354,533 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu @@ -4322,245 +4322,245 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5 # CHECK: Resources: # CHECK-NEXT: [0] - SMX60_FP @@ -4574,690 +4574,690 @@ vwsub.wx v8, v16, x30 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 1120.00 - - - - 1120.00 - +# CHECK-NEXT: - 1120.00 - - - - 3292.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -5611,533 +5611,533 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6579,242 +6579,242 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5 diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s index 0b5dd60..89d3872 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s @@ -1478,1157 +1478,1157 @@ vssrl.vx v8, v8, x30 # CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu @@ -2906,1162 +2906,1162 @@ vssrl.vx v8, v8, x30 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 708.00 - - - - 708.00 - +# CHECK-NEXT: - 708.00 - - - - 2436.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s index e381b45..f0247e4 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s @@ -926,885 +926,885 @@ vmslt.vx v8, v8, x30 # CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 6 4.00 6 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 10 4.00 10 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5 +# CHECK-NEXT: 1 18 4.00 18 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5 # CHECK: Resources: # CHECK-NEXT: [0] - SMX60_FP @@ -1818,887 +1818,887 @@ vmslt.vx v8, v8, x30 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 440.00 - - - - 440.00 - +# CHECK-NEXT: - 440.00 - - - - 1760.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5 diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s index ca6e9d1..9592d1b 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s @@ -615,117 +615,117 @@ vfwcvt.xu.f.v v8, v16 # CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu @@ -1189,122 +1189,122 @@ vfwcvt.xu.f.v v8, v16 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 281.00 - - - 225.00 56.00 - +# CHECK-NEXT: - 281.00 - - - 225.00 224.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16 +# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - 1.00 - - vfcvt.f.xu.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s index a3105c3..d8e0feb 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s @@ -755,567 +755,567 @@ vfwnmsac.vv v8, v16, v24 # CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu @@ -1473,572 +1473,572 @@ vfwnmsac.vv v8, v16, v24 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 353.00 - - - 72.00 281.00 - +# CHECK-NEXT: - 353.00 - - - 72.00 1652.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8 +# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s index 4cc496b..2b6f4ba 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s @@ -386,357 +386,357 @@ vminu.vx v8, v8, x30 # CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5 # CHECK: Resources: # CHECK-NEXT: [0] - SMX60_FP @@ -750,359 +750,359 @@ vminu.vx v8, v8, x30 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 176.00 - - - - 176.00 - +# CHECK-NEXT: - 176.00 - - - - 704.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5 diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s index 5faf262..572ebf2 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s @@ -1022,889 +1022,889 @@ vsmul.vx v8, v8, x30 # CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VV vdiv.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIV_VX vdiv.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VV vdivu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VDIVU_VX vdivu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VV vrem.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREM_VX vrem.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VV vremu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 12 12.00 12 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 24 12.00 24 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 48 12.00 48 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 96 12.00 96 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5 +# CHECK-NEXT: 1 192 12.00 192 SMX60_VIEU[12] VREMU_VX vremu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 7.00 8 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 16 7.00 16 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: 1 32 7.00 32 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu @@ -2006,894 +2006,894 @@ vsmul.vx v8, v8, x30 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 486.00 - - - - 486.00 - +# CHECK-NEXT: - 486.00 - - - - 3748.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdiv.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vdivu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vrem.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 12.00 - vremu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5 +# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s index fa53c08..5ae0d43b 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s @@ -1198,137 +1198,137 @@ vfslide1up.vf v8, v16, ft0 # CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu @@ -2120,137 +2120,137 @@ vfslide1up.vf v8, v16, ft0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu @@ -2354,142 +2354,142 @@ vfslide1up.vf v8, v16, ft0 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 572.00 - - - 45.00 527.00 - +# CHECK-NEXT: - 572.00 - - - 45.00 923.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -3281,137 +3281,137 @@ vfslide1up.vf v8, v16, ft0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0 +# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu diff --git a/llvm/test/tools/llvm-objcopy/COFF/exe-bogus-assoc.test b/llvm/test/tools/llvm-objcopy/COFF/exe-bogus-assoc.test new file mode 100644 index 0000000..12f14b5 --- /dev/null +++ b/llvm/test/tools/llvm-objcopy/COFF/exe-bogus-assoc.test @@ -0,0 +1,134 @@ +## Test that bogus associative section symbols in executables are ignored. +## +## The executable contains two (bogus) associative section symbols, both for +## (parts of) the .rdata section; one pointing at the .debug_info section +## (which will be stripped out) and one pointing at a nonexistent section. +## +## Check that stripping does succeed, and that it doesn't end up removing +## the .rdata section. + +# RUN: yaml2obj %s -o %t.in.exe + +# RUN: llvm-strip --strip-debug %t.in.exe -o %t.out.exe +# RUN: llvm-readobj --sections %t.out.exe | FileCheck %s + +# CHECK: Name: .rdata + +--- !COFF +OptionalHeader: + AddressOfEntryPoint: 4096 + ImageBase: 5368709120 + SectionAlignment: 4096 + FileAlignment: 512 + MajorOperatingSystemVersion: 4 + MinorOperatingSystemVersion: 0 + MajorImageVersion: 0 + MinorImageVersion: 0 + MajorSubsystemVersion: 5 + MinorSubsystemVersion: 2 + Subsystem: IMAGE_SUBSYSTEM_WINDOWS_CUI + DLLCharacteristics: [ ] + SizeOfStackReserve: 2097152 + SizeOfStackCommit: 4096 + SizeOfHeapReserve: 1048576 + SizeOfHeapCommit: 4096 +header: + Machine: IMAGE_FILE_MACHINE_AMD64 + Characteristics: [ ] +sections: + - Name: .text + Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ] + VirtualAddress: 4096 + VirtualSize: 48 + SectionData: E806000000E802000000C3C3C30F1F00FFFFFFFFFFFFFFFF0000000000000000FFFFFFFFFFFFFFFF0000000000000000 + SizeOfRawData: 512 + - Name: .rdata + Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ ] + VirtualAddress: 8192 + VirtualSize: 4 + SectionData: '00000000' + SizeOfRawData: 512 + - Name: .debug_info + Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ] + VirtualAddress: 16384 + VirtualSize: 4 + SectionData: '00000000' + SizeOfRawData: 512 +symbols: + - Name: .text + Value: 0 + SectionNumber: 1 + SimpleType: IMAGE_SYM_TYPE_NULL + ComplexType: IMAGE_SYM_DTYPE_NULL + StorageClass: IMAGE_SYM_CLASS_STATIC + SectionDefinition: + Length: 11 + NumberOfRelocations: 2 + NumberOfLinenumbers: 0 + CheckSum: 1703692295 + Number: 1 + - Name: '.text$func1' + Value: 11 + SectionNumber: 1 + SimpleType: IMAGE_SYM_TYPE_NULL + ComplexType: IMAGE_SYM_DTYPE_NULL + StorageClass: IMAGE_SYM_CLASS_STATIC + SectionDefinition: + Length: 1 + NumberOfRelocations: 0 + NumberOfLinenumbers: 0 + CheckSum: 40735498 + Number: 3 + Selection: IMAGE_COMDAT_SELECT_ANY + - Name: .rdata + Value: 0 + SectionNumber: 2 + SimpleType: IMAGE_SYM_TYPE_NULL + ComplexType: IMAGE_SYM_DTYPE_NULL + StorageClass: IMAGE_SYM_CLASS_STATIC + SectionDefinition: + Length: 1 + NumberOfRelocations: 0 + NumberOfLinenumbers: 0 + CheckSum: 0 + Number: 3 + Selection: IMAGE_COMDAT_SELECT_ASSOCIATIVE + - Name: '.text$func2' + Value: 12 + SectionNumber: 1 + SimpleType: IMAGE_SYM_TYPE_NULL + ComplexType: IMAGE_SYM_DTYPE_NULL + StorageClass: IMAGE_SYM_CLASS_STATIC + SectionDefinition: + Length: 1 + NumberOfRelocations: 0 + NumberOfLinenumbers: 0 + CheckSum: 40735498 + Number: 4 + Selection: IMAGE_COMDAT_SELECT_ANY + - Name: .rdata + Value: 1 + SectionNumber: 2 + SimpleType: IMAGE_SYM_TYPE_NULL + ComplexType: IMAGE_SYM_DTYPE_NULL + StorageClass: IMAGE_SYM_CLASS_STATIC + SectionDefinition: + Length: 1 + NumberOfRelocations: 0 + NumberOfLinenumbers: 0 + CheckSum: 0 + Number: 4 + Selection: IMAGE_COMDAT_SELECT_ASSOCIATIVE + - Name: .debug_info + Value: 0 + SectionNumber: 3 + SimpleType: IMAGE_SYM_TYPE_NULL + ComplexType: IMAGE_SYM_DTYPE_NULL + StorageClass: IMAGE_SYM_CLASS_STATIC + SectionDefinition: + Length: 4 + NumberOfRelocations: 0 + NumberOfLinenumbers: 0 + CheckSum: 0 + Number: 0 +... diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s b/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s index 69b7489..085f258 100644 --- a/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s @@ -15,10 +15,10 @@ ## Check that passing the default value for --debug-vars-indent (52) makes no ## change to the output. -# RUN: llvm-objdump %t.o -d --debug-vars --debug-vars-indent=52 | \ +# RUN: llvm-objdump %t.o -d --debug-vars --debug-indent=52 | \ # RUN: FileCheck %s --check-prefix=RAW --strict-whitespace -# RUN: llvm-objdump %t.o -d --debug-vars --debug-vars-indent=30 | \ +# RUN: llvm-objdump %t.o -d --debug-vars --debug-indent=30 | \ # RUN: FileCheck %s --check-prefix=INDENT --strict-whitespace # RUN: llvm-objdump %t.o -d --debug-vars --no-show-raw-insn | \ diff --git a/llvm/test/tools/llvm-objdump/ELF/Hexagon/hexagon-bundles.s b/llvm/test/tools/llvm-objdump/ELF/Hexagon/hexagon-bundles.s new file mode 100644 index 0000000..6a4927e --- /dev/null +++ b/llvm/test/tools/llvm-objdump/ELF/Hexagon/hexagon-bundles.s @@ -0,0 +1,47 @@ +/// Checks that various hexagon scenarios are handled correctly: +/// - branch targets +/// - endloops +/// - inline-relocs +/// - multi-insn bundles + +{ + r6 = sub(r1, r0) + r7 = and(r4, #0x0) + if (p1) jump:t target1 + if (p2) jump:nt target2 +} + +{ + r8 = r7 + r9 = add(r8, #0) + r10 = memw(r9) +} :endloop0 + +{ jump ##sym } + +target1: + nop + +target2: + nop + +// RUN: llvm-mc %s --triple=hexagon -filetype=obj | llvm-objdump -d -r - | FileCheck %s + +// CHECK: 00000000 <.text>: +// CHECK-NEXT: 0: 12 51 00 5c 5c005112 { if (p1) jump:t 0x24 <target1> +// CHECK-NEXT: 4: 14 42 00 5c 5c004214 if (p2) jump:nt 0x28 <target2> +// CHECK-NEXT: 8: 06 41 20 f3 f3204106 r6 = sub(r1,r0) +// CHECK-NEXT: c: 07 c0 04 76 7604c007 r7 = and(r4,#0x0) } +// CHECK-NEXT: 10: 08 80 67 70 70678008 { r8 = r7 +// CHECK-NEXT: 14: 09 40 08 b0 b0084009 r9 = add(r8,#0x0) +// CHECK-NEXT: 18: 0a c0 89 91 9189c00a r10 = memw(r9+#0x0) } :endloop0 +// CHECK-NEXT: 1c: 00 40 00 00 00004000 { immext(#0x0) +// CHECK-NEXT: 0000001c: R_HEX_B32_PCREL_X sym +// CHECK-NEXT: 20: 00 c0 00 58 5800c000 jump 0x1c <.text+0x1c> } +// CHECK-NEXT: 00000020: R_HEX_B22_PCREL_X sym+0x4 +// CHECK-EMPTY: +// CHECK-NEXT: 00000024 <target1>: +// CHECK-NEXT: 24: 00 c0 00 7f 7f00c000 { nop } +// CHECK-EMPTY: +// CHECK-NEXT: 00000028 <target2>: +// CHECK-NEXT: 28: 00 c0 00 7f 7f00c000 { nop } diff --git a/llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc b/llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc new file mode 100644 index 0000000..a708bc0 --- /dev/null +++ b/llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc @@ -0,0 +1,10 @@ +int bar(int x, int y) { + int sum = x + y; + int mul = x * y; + return sum + mul; +} + +int foo(int a, int b) { + int result = bar(a, b); + return result; +} diff --git a/llvm/test/tools/llvm-objdump/X86/debug-inlined-functions.s b/llvm/test/tools/llvm-objdump/X86/debug-inlined-functions.s new file mode 100644 index 0000000..6ed3507 --- /dev/null +++ b/llvm/test/tools/llvm-objdump/X86/debug-inlined-functions.s @@ -0,0 +1,643 @@ +## Generated with this compile command, with the source code in Inputs/debug-inlined-functions.cc: +## clang++ -g -c debug-inlined-functions.cc -O1 -S -o - + +# RUN: llvm-mc -triple=x86_64 %s -filetype=obj -o %t.o + +# RUN: llvm-objdump %t.o -d --debug-inlined-funcs=unicode | \ +# RUN: FileCheck %s --check-prefixes=UNICODE,UNICODE-MANGLED --strict-whitespace + +# RUN: llvm-objdump %t.o -d -C --debug-inlined-funcs | \ +# RUN: FileCheck %s --check-prefixes=UNICODE,UNICODE-DEMANGLED --strict-whitespace + +# RUN: llvm-objdump %t.o -d -C --debug-inlined-funcs=unicode | \ +# RUN: FileCheck %s --check-prefixes=UNICODE,UNICODE-DEMANGLED --strict-whitespace + +# RUN: llvm-objdump %t.o -d -C --debug-inlined-funcs=unicode --debug-indent=30 | \ +# RUN: FileCheck %s --check-prefix=UNICODE-DEMANGLED-INDENT --strict-whitespace + +# RUN: llvm-objdump %t.o -d -C --debug-inlined-funcs=ascii | \ +# RUN: FileCheck %s --check-prefix=ASCII-DEMANGLED --strict-whitespace + +# RUN: llvm-objdump %t.o -d -C --debug-inlined-funcs=limits-only | \ +# RUN: FileCheck %s --check-prefix=LIMITS-ONLY-DEMANGLED + +# RUN: llvm-objdump %t.o -d -C --debug-inlined-funcs=unicode --debug-vars=unicode | \ +# RUN: FileCheck %s --check-prefix=DEBUG-DEMANGLED-ALL --strict-whitespace + +# UNICODE-MANGLED: 0000000000000000 <_Z3barii>: +# UNICODE-DEMANGLED: 0000000000000000 <bar(int, int)>: +# UNICODE-NEXT: 0: 8d 04 3e leal (%rsi,%rdi), %eax +# UNICODE-NEXT: 3: 0f af f7 imull %edi, %esi +# UNICODE-NEXT: 6: 01 f0 addl %esi, %eax +# UNICODE-NEXT: 8: c3 retq +# UNICODE-NEXT: 9: 0f 1f 80 00 00 00 00 nopl (%rax) +# UNICODE-EMPTY: +# UNICODE-MANGLED-NEXT: 0000000000000010 <_Z3fooii>: +# UNICODE-DEMANGLED-NEXT: 0000000000000010 <foo(int, int)>: +# UNICODE-MANGLED-NEXT: ┠─ _Z3barii = inlined into _Z3fooii +# UNICODE-DEMANGLED-NEXT: ┠─ bar(int, int) = inlined into foo(int, int) +# UNICODE-NEXT: 10: 8d 04 3e leal (%rsi,%rdi), %eax ┃ +# UNICODE-NEXT: 13: 0f af f7 imull %edi, %esi ┃ +# UNICODE-NEXT: 16: 01 f0 addl %esi, %eax ┻ +# UNICODE-NEXT: 18: c3 retq + +# UNICODE-DEMANGLED-INDENT: 0000000000000010 <foo(int, int)>: +# UNICODE-DEMANGLED-INDENT-NEXT: ┠─ bar(int, int) = inlined into foo(int, int) +# UNICODE-DEMANGLED-INDENT-NEXT: 10: 8d 04 3e leal (%rsi,%rdi), %eax ┃ +# UNICODE-DEMANGLED-INDENT-NEXT: 13: 0f af f7 imull %edi, %esi ┃ +# UNICODE-DEMANGLED-INDENT-NEXT: 16: 01 f0 addl %esi, %eax ┻ +# UNICODE-DEMANGLED-INDENT-NEXT: 18: c3 retq + +# ASCII-DEMANGLED: 0000000000000010 <foo(int, int)>: +# ASCII-DEMANGLED-NEXT: |- bar(int, int) = inlined into foo(int, int) +# ASCII-DEMANGLED-NEXT: 10: 8d 04 3e leal (%rsi,%rdi), %eax | +# ASCII-DEMANGLED-NEXT: 13: 0f af f7 imull %edi, %esi | +# ASCII-DEMANGLED-NEXT: 16: 01 f0 addl %esi, %eax v +# ASCII-DEMANGLED-NEXT: 18: c3 retq + +# LIMITS-ONLY-DEMANGLED: 0000000000000010 <foo(int, int)>: +# LIMITS-ONLY-DEMANGLED-NEXT: debug-inlined-functions.cc:8:16: bar(int, int) inlined into foo(int, int) +# LIMITS-ONLY-DEMANGLED-NEXT: 10: 8d 04 3e leal (%rsi,%rdi), %eax +# LIMITS-ONLY-DEMANGLED-NEXT: 13: 0f af f7 imull %edi, %esi +# LIMITS-ONLY-DEMANGLED-NEXT: 16: 01 f0 addl %esi, %eax +# LIMITS-ONLY-DEMANGLED-NEXT: debug-inlined-functions.cc:8:16: end of bar(int, int) inlined into foo(int, int) +# LIMITS-ONLY-DEMANGLED-NEXT: 18: c3 retq + +# DEBUG-DEMANGLED-ALL: 0000000000000010 <foo(int, int)>: +# DEBUG-DEMANGLED-ALL-NEXT: ┠─ a = RDI +# DEBUG-DEMANGLED-ALL-NEXT: ┃ ┠─ b = RSI +# DEBUG-DEMANGLED-ALL-NEXT: ┃ ┃ ┠─ bar(int, int) = inlined into foo(int, int) +# DEBUG-DEMANGLED-ALL-NEXT: ┃ ┃ ┃ ┠─ x = RDI +# DEBUG-DEMANGLED-ALL-NEXT: ┃ ┃ ┃ ┃ ┠─ y = RSI +# DEBUG-DEMANGLED-ALL-NEXT: ┃ ┃ ┃ ┃ ┃ ┌─ sum = RAX +# DEBUG-DEMANGLED-ALL-NEXT: 10: 8d 04 3e leal (%rsi,%rdi), %eax ┃ ┃ ┃ ┃ ┃ ╈ +# DEBUG-DEMANGLED-ALL-NEXT: ┃ ┃ ┃ ┃ ┃ ┃ ┌─ b = entry(RSI) +# DEBUG-DEMANGLED-ALL-NEXT: ┃ ┃ ┃ ┃ ┃ ┃ │ ┌─ mul = RSI +# DEBUG-DEMANGLED-ALL-NEXT: 13: 0f af f7 imull %edi, %esi ┃ ┻ ┃ ┃ ┻ ┃ ╈ ╈ +# DEBUG-DEMANGLED-ALL-NEXT: ┃ ┌─ result = RAX +# DEBUG-DEMANGLED-ALL-NEXT: 16: 01 f0 addl %esi, %eax ┃ ╈ ┻ ┻ ┻ ┃ ┃ +# DEBUG-DEMANGLED-ALL-NEXT: 18: c3 retq ┻ ┻ ┻ ┻ + + .file "debug-inlined-functions.cc" + .text + .globl _Z3barii # -- Begin function _Z3barii + .p2align 4 + .type _Z3barii,@function +_Z3barii: # @_Z3barii +.Lfunc_begin0: + .file 0 "debug-inlined-functions.cc" md5 0xf07b869ec4d0996589aa6856ae4e6c83 + .cfi_startproc +# %bb.0: # %entry + #DEBUG_VALUE: bar:x <- $edi + #DEBUG_VALUE: bar:y <- $esi + # kill: def $esi killed $esi def $rsi + # kill: def $edi killed $edi def $rdi + .loc 0 2 15 prologue_end # llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:2:15 + leal (%rsi,%rdi), %eax +.Ltmp0: + #DEBUG_VALUE: bar:sum <- $eax + .loc 0 3 15 # llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:3:15 + imull %edi, %esi +.Ltmp1: + #DEBUG_VALUE: bar:y <- [DW_OP_LLVM_entry_value 1] $esi + #DEBUG_VALUE: bar:mul <- $esi + .loc 0 4 14 # llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:4:14 + addl %esi, %eax +.Ltmp2: + .loc 0 4 3 is_stmt 0 # llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:4:3 + retq +.Ltmp3: +.Lfunc_end0: + .size _Z3barii, .Lfunc_end0-_Z3barii + .cfi_endproc + # -- End function + .globl _Z3fooii # -- Begin function _Z3fooii + .p2align 4 + .type _Z3fooii,@function +_Z3fooii: # @_Z3fooii +.Lfunc_begin1: + .cfi_startproc +# %bb.0: # %entry + #DEBUG_VALUE: foo:a <- $edi + #DEBUG_VALUE: foo:b <- $esi + #DEBUG_VALUE: bar:x <- $edi + #DEBUG_VALUE: bar:y <- $esi + # kill: def $esi killed $esi def $rsi + # kill: def $edi killed $edi def $rdi + .loc 0 2 15 prologue_end is_stmt 1 # llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:2:15 @[ llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:8:16 ] + leal (%rsi,%rdi), %eax +.Ltmp4: + #DEBUG_VALUE: bar:sum <- $eax + .loc 0 3 15 # llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:3:15 @[ llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:8:16 ] + imull %edi, %esi +.Ltmp5: + #DEBUG_VALUE: foo:b <- [DW_OP_LLVM_entry_value 1] $esi + #DEBUG_VALUE: bar:mul <- $esi + .loc 0 4 14 # llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:4:14 @[ llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:8:16 ] + addl %esi, %eax +.Ltmp6: + #DEBUG_VALUE: foo:result <- $eax + .loc 0 9 3 # llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc:9:3 + retq +.Ltmp7: +.Lfunc_end1: + .size _Z3fooii, .Lfunc_end1-_Z3fooii + .cfi_endproc + # -- End function + .section .debug_loclists,"",@progbits + .long .Ldebug_list_header_end0-.Ldebug_list_header_start0 # Length +.Ldebug_list_header_start0: + .short 5 # Version + .byte 8 # Address size + .byte 0 # Segment selector size + .long 8 # Offset entry count +.Lloclists_table_base0: + .long .Ldebug_loc0-.Lloclists_table_base0 + .long .Ldebug_loc1-.Lloclists_table_base0 + .long .Ldebug_loc2-.Lloclists_table_base0 + .long .Ldebug_loc3-.Lloclists_table_base0 + .long .Ldebug_loc4-.Lloclists_table_base0 + .long .Ldebug_loc5-.Lloclists_table_base0 + .long .Ldebug_loc6-.Lloclists_table_base0 + .long .Ldebug_loc7-.Lloclists_table_base0 +.Ldebug_loc0: + .byte 4 # DW_LLE_offset_pair + .uleb128 .Lfunc_begin0-.Lfunc_begin0 # starting offset + .uleb128 .Ltmp1-.Lfunc_begin0 # ending offset + .byte 1 # Loc expr size + .byte 84 # super-register DW_OP_reg4 + .byte 4 # DW_LLE_offset_pair + .uleb128 .Ltmp1-.Lfunc_begin0 # starting offset + .uleb128 .Lfunc_end0-.Lfunc_begin0 # ending offset + .byte 4 # Loc expr size + .byte 163 # DW_OP_entry_value + .byte 1 # 1 + .byte 84 # super-register DW_OP_reg4 + .byte 159 # DW_OP_stack_value + .byte 0 # DW_LLE_end_of_list +.Ldebug_loc1: + .byte 4 # DW_LLE_offset_pair + .uleb128 .Ltmp0-.Lfunc_begin0 # starting offset + .uleb128 .Ltmp2-.Lfunc_begin0 # ending offset + .byte 1 # Loc expr size + .byte 80 # super-register DW_OP_reg0 + .byte 0 # DW_LLE_end_of_list +.Ldebug_loc2: + .byte 4 # DW_LLE_offset_pair + .uleb128 .Ltmp1-.Lfunc_begin0 # starting offset + .uleb128 .Lfunc_end0-.Lfunc_begin0 # ending offset + .byte 1 # Loc expr size + .byte 84 # super-register DW_OP_reg4 + .byte 0 # DW_LLE_end_of_list +.Ldebug_loc3: + .byte 4 # DW_LLE_offset_pair + .uleb128 .Lfunc_begin1-.Lfunc_begin0 # starting offset + .uleb128 .Ltmp5-.Lfunc_begin0 # ending offset + .byte 1 # Loc expr size + .byte 84 # super-register DW_OP_reg4 + .byte 4 # DW_LLE_offset_pair + .uleb128 .Ltmp5-.Lfunc_begin0 # starting offset + .uleb128 .Lfunc_end1-.Lfunc_begin0 # ending offset + .byte 4 # Loc expr size + .byte 163 # DW_OP_entry_value + .byte 1 # 1 + .byte 84 # super-register DW_OP_reg4 + .byte 159 # DW_OP_stack_value + .byte 0 # DW_LLE_end_of_list +.Ldebug_loc4: + .byte 4 # DW_LLE_offset_pair + .uleb128 .Lfunc_begin1-.Lfunc_begin0 # starting offset + .uleb128 .Ltmp5-.Lfunc_begin0 # ending offset + .byte 1 # Loc expr size + .byte 84 # super-register DW_OP_reg4 + .byte 0 # DW_LLE_end_of_list +.Ldebug_loc5: + .byte 4 # DW_LLE_offset_pair + .uleb128 .Ltmp4-.Lfunc_begin0 # starting offset + .uleb128 .Ltmp6-.Lfunc_begin0 # ending offset + .byte 1 # Loc expr size + .byte 80 # super-register DW_OP_reg0 + .byte 0 # DW_LLE_end_of_list +.Ldebug_loc6: + .byte 4 # DW_LLE_offset_pair + .uleb128 .Ltmp5-.Lfunc_begin0 # starting offset + .uleb128 .Lfunc_end1-.Lfunc_begin0 # ending offset + .byte 1 # Loc expr size + .byte 84 # super-register DW_OP_reg4 + .byte 0 # DW_LLE_end_of_list +.Ldebug_loc7: + .byte 4 # DW_LLE_offset_pair + .uleb128 .Ltmp6-.Lfunc_begin0 # starting offset + .uleb128 .Lfunc_end1-.Lfunc_begin0 # ending offset + .byte 1 # Loc expr size + .byte 80 # super-register DW_OP_reg0 + .byte 0 # DW_LLE_end_of_list +.Ldebug_list_header_end0: + .section .debug_abbrev,"",@progbits + .byte 1 # Abbreviation Code + .byte 17 # DW_TAG_compile_unit + .byte 1 # DW_CHILDREN_yes + .byte 37 # DW_AT_producer + .byte 37 # DW_FORM_strx1 + .byte 19 # DW_AT_language + .byte 5 # DW_FORM_data2 + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 114 # DW_AT_str_offsets_base + .byte 23 # DW_FORM_sec_offset + .byte 16 # DW_AT_stmt_list + .byte 23 # DW_FORM_sec_offset + .byte 27 # DW_AT_comp_dir + .byte 37 # DW_FORM_strx1 + .byte 17 # DW_AT_low_pc + .byte 27 # DW_FORM_addrx + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 115 # DW_AT_addr_base + .byte 23 # DW_FORM_sec_offset + .ascii "\214\001" # DW_AT_loclists_base + .byte 23 # DW_FORM_sec_offset + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 2 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 17 # DW_AT_low_pc + .byte 27 # DW_FORM_addrx + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 64 # DW_AT_frame_base + .byte 24 # DW_FORM_exprloc + .byte 122 # DW_AT_call_all_calls + .byte 25 # DW_FORM_flag_present + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 3 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 24 # DW_FORM_exprloc + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 4 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 34 # DW_FORM_loclistx + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 5 # Abbreviation Code + .byte 52 # DW_TAG_variable + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 34 # DW_FORM_loclistx + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 6 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 37 # DW_FORM_strx1 + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 32 # DW_AT_inline + .byte 33 # DW_FORM_implicit_const + .byte 1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 7 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 8 # Abbreviation Code + .byte 52 # DW_TAG_variable + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 9 # Abbreviation Code + .byte 36 # DW_TAG_base_type + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 62 # DW_AT_encoding + .byte 11 # DW_FORM_data1 + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 10 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 17 # DW_AT_low_pc + .byte 27 # DW_FORM_addrx + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 64 # DW_AT_frame_base + .byte 24 # DW_FORM_exprloc + .byte 122 # DW_AT_call_all_calls + .byte 25 # DW_FORM_flag_present + .byte 110 # DW_AT_linkage_name + .byte 37 # DW_FORM_strx1 + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 11 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 24 # DW_FORM_exprloc + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 12 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 34 # DW_FORM_loclistx + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 13 # Abbreviation Code + .byte 52 # DW_TAG_variable + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 34 # DW_FORM_loclistx + .byte 3 # DW_AT_name + .byte 37 # DW_FORM_strx1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 14 # Abbreviation Code + .byte 29 # DW_TAG_inlined_subroutine + .byte 1 # DW_CHILDREN_yes + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 17 # DW_AT_low_pc + .byte 27 # DW_FORM_addrx + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 88 # DW_AT_call_file + .byte 11 # DW_FORM_data1 + .byte 89 # DW_AT_call_line + .byte 11 # DW_FORM_data1 + .byte 87 # DW_AT_call_column + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 0 # EOM(3) + .section .debug_info,"",@progbits +.Lcu_begin0: + .long .Ldebug_info_end0-.Ldebug_info_start0 # Length of Unit +.Ldebug_info_start0: + .short 5 # DWARF version number + .byte 1 # DWARF Unit Type + .byte 8 # Address Size (in bytes) + .long .debug_abbrev # Offset Into Abbrev. Section + .byte 1 # Abbrev [1] 0xc:0xc4 DW_TAG_compile_unit + .byte 0 # DW_AT_producer + .short 33 # DW_AT_language + .byte 1 # DW_AT_name + .long .Lstr_offsets_base0 # DW_AT_str_offsets_base + .long .Lline_table_start0 # DW_AT_stmt_list + .byte 2 # DW_AT_comp_dir + .byte 0 # DW_AT_low_pc + .long .Lfunc_end1-.Lfunc_begin0 # DW_AT_high_pc + .long .Laddr_table_base0 # DW_AT_addr_base + .long .Lloclists_table_base0 # DW_AT_loclists_base + .byte 2 # Abbrev [2] 0x27:0x26 DW_TAG_subprogram + .byte 0 # DW_AT_low_pc + .long .Lfunc_end0-.Lfunc_begin0 # DW_AT_high_pc + .byte 1 # DW_AT_frame_base + .byte 87 + # DW_AT_call_all_calls + .long 77 # DW_AT_abstract_origin + .byte 3 # Abbrev [3] 0x33:0x7 DW_TAG_formal_parameter + .byte 1 # DW_AT_location + .byte 85 + .long 86 # DW_AT_abstract_origin + .byte 4 # Abbrev [4] 0x3a:0x6 DW_TAG_formal_parameter + .byte 0 # DW_AT_location + .long 94 # DW_AT_abstract_origin + .byte 5 # Abbrev [5] 0x40:0x6 DW_TAG_variable + .byte 1 # DW_AT_location + .long 102 # DW_AT_abstract_origin + .byte 5 # Abbrev [5] 0x46:0x6 DW_TAG_variable + .byte 2 # DW_AT_location + .long 110 # DW_AT_abstract_origin + .byte 0 # End Of Children Mark + .byte 6 # Abbrev [6] 0x4d:0x2a DW_TAG_subprogram + .byte 3 # DW_AT_linkage_name + .byte 4 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 1 # DW_AT_decl_line + .long 119 # DW_AT_type + # DW_AT_external + # DW_AT_inline + .byte 7 # Abbrev [7] 0x56:0x8 DW_TAG_formal_parameter + .byte 6 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 1 # DW_AT_decl_line + .long 119 # DW_AT_type + .byte 7 # Abbrev [7] 0x5e:0x8 DW_TAG_formal_parameter + .byte 7 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 1 # DW_AT_decl_line + .long 119 # DW_AT_type + .byte 8 # Abbrev [8] 0x66:0x8 DW_TAG_variable + .byte 8 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 2 # DW_AT_decl_line + .long 119 # DW_AT_type + .byte 8 # Abbrev [8] 0x6e:0x8 DW_TAG_variable + .byte 9 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 3 # DW_AT_decl_line + .long 119 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 9 # Abbrev [9] 0x77:0x4 DW_TAG_base_type + .byte 5 # DW_AT_name + .byte 5 # DW_AT_encoding + .byte 4 # DW_AT_byte_size + .byte 10 # Abbrev [10] 0x7b:0x54 DW_TAG_subprogram + .byte 1 # DW_AT_low_pc + .long .Lfunc_end1-.Lfunc_begin1 # DW_AT_high_pc + .byte 1 # DW_AT_frame_base + .byte 87 + # DW_AT_call_all_calls + .byte 10 # DW_AT_linkage_name + .byte 11 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 7 # DW_AT_decl_line + .long 119 # DW_AT_type + # DW_AT_external + .byte 11 # Abbrev [11] 0x8b:0xa DW_TAG_formal_parameter + .byte 1 # DW_AT_location + .byte 85 + .byte 12 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 7 # DW_AT_decl_line + .long 119 # DW_AT_type + .byte 12 # Abbrev [12] 0x95:0x9 DW_TAG_formal_parameter + .byte 3 # DW_AT_location + .byte 13 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 7 # DW_AT_decl_line + .long 119 # DW_AT_type + .byte 13 # Abbrev [13] 0x9e:0x9 DW_TAG_variable + .byte 7 # DW_AT_location + .byte 14 # DW_AT_name + .byte 0 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .long 119 # DW_AT_type + .byte 14 # Abbrev [14] 0xa7:0x27 DW_TAG_inlined_subroutine + .long 77 # DW_AT_abstract_origin + .byte 1 # DW_AT_low_pc + .long .Ltmp6-.Lfunc_begin1 # DW_AT_high_pc + .byte 0 # DW_AT_call_file + .byte 8 # DW_AT_call_line + .byte 16 # DW_AT_call_column + .byte 3 # Abbrev [3] 0xb4:0x7 DW_TAG_formal_parameter + .byte 1 # DW_AT_location + .byte 85 + .long 86 # DW_AT_abstract_origin + .byte 4 # Abbrev [4] 0xbb:0x6 DW_TAG_formal_parameter + .byte 4 # DW_AT_location + .long 94 # DW_AT_abstract_origin + .byte 5 # Abbrev [5] 0xc1:0x6 DW_TAG_variable + .byte 5 # DW_AT_location + .long 102 # DW_AT_abstract_origin + .byte 5 # Abbrev [5] 0xc7:0x6 DW_TAG_variable + .byte 6 # DW_AT_location + .long 110 # DW_AT_abstract_origin + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark +.Ldebug_info_end0: + .section .debug_str_offsets,"",@progbits + .long 64 # Length of String Offsets Set + .short 5 + .short 0 +.Lstr_offsets_base0: + .section .debug_str,"MS",@progbits,1 +.Linfo_string0: + .asciz "clang version 21.0.0git (git@github.com:llvm/llvm-project.git eed98e1493414ae9c30596b1eeb8f4a9b260e42)" # string offset=0 +.Linfo_string1: + .asciz "llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc" # string offset=112 +.Linfo_string2: + .asciz "llvm-project" # string offset=179 +.Linfo_string3: + .asciz "_Z3barii" # string offset=229 +.Linfo_string4: + .asciz "bar" # string offset=238 +.Linfo_string5: + .asciz "int" # string offset=242 +.Linfo_string6: + .asciz "x" # string offset=246 +.Linfo_string7: + .asciz "y" # string offset=248 +.Linfo_string8: + .asciz "sum" # string offset=250 +.Linfo_string9: + .asciz "mul" # string offset=254 +.Linfo_string10: + .asciz "_Z3fooii" # string offset=258 +.Linfo_string11: + .asciz "foo" # string offset=267 +.Linfo_string12: + .asciz "a" # string offset=271 +.Linfo_string13: + .asciz "b" # string offset=273 +.Linfo_string14: + .asciz "result" # string offset=275 + .section .debug_str_offsets,"",@progbits + .long .Linfo_string0 + .long .Linfo_string1 + .long .Linfo_string2 + .long .Linfo_string3 + .long .Linfo_string4 + .long .Linfo_string5 + .long .Linfo_string6 + .long .Linfo_string7 + .long .Linfo_string8 + .long .Linfo_string9 + .long .Linfo_string10 + .long .Linfo_string11 + .long .Linfo_string12 + .long .Linfo_string13 + .long .Linfo_string14 + .section .debug_addr,"",@progbits + .long .Ldebug_addr_end0-.Ldebug_addr_start0 # Length of contribution +.Ldebug_addr_start0: + .short 5 # DWARF version number + .byte 8 # Address size + .byte 0 # Segment selector size +.Laddr_table_base0: + .quad .Lfunc_begin0 + .quad .Lfunc_begin1 +.Ldebug_addr_end0: + .ident "clang version 21.0.0git (git@github.com:llvm/llvm-project.git eed98e1493414ae9c30596b1eeb8f4a9b260e42a)" + .section ".note.GNU-stack","",@progbits + .addrsig + .section .debug_line,"",@progbits +.Lline_table_start0: diff --git a/llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofexe b/llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofexe Binary files differindex f69c0b1..fc530a4 100755 --- a/llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofexe +++ b/llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofexe diff --git a/llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofraw b/llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofraw Binary files differindex ed679dc..d492076 100644 --- a/llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofraw +++ b/llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofraw diff --git a/llvm/test/tools/llvm-profdata/Inputs/basic.memprofexe b/llvm/test/tools/llvm-profdata/Inputs/basic.memprofexe Binary files differindex 14cbfeb..8810ee1 100755 --- a/llvm/test/tools/llvm-profdata/Inputs/basic.memprofexe +++ b/llvm/test/tools/llvm-profdata/Inputs/basic.memprofexe diff --git a/llvm/test/tools/llvm-profdata/Inputs/basic.memprofraw b/llvm/test/tools/llvm-profdata/Inputs/basic.memprofraw Binary files differindex c3ac49e..6943c18 100644 --- a/llvm/test/tools/llvm-profdata/Inputs/basic.memprofraw +++ b/llvm/test/tools/llvm-profdata/Inputs/basic.memprofraw diff --git a/llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofexe b/llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofexe Binary files differnew file mode 100755 index 0000000..14cbfeb --- /dev/null +++ b/llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofexe diff --git a/llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofraw b/llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofraw Binary files differnew file mode 100644 index 0000000..c3ac49e --- /dev/null +++ b/llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofraw diff --git a/llvm/test/tools/llvm-profdata/Inputs/buildid.memprofexe b/llvm/test/tools/llvm-profdata/Inputs/buildid.memprofexe Binary files differindex 1b4db88..4ab8040 100755 --- a/llvm/test/tools/llvm-profdata/Inputs/buildid.memprofexe +++ b/llvm/test/tools/llvm-profdata/Inputs/buildid.memprofexe diff --git a/llvm/test/tools/llvm-profdata/Inputs/buildid.memprofraw b/llvm/test/tools/llvm-profdata/Inputs/buildid.memprofraw Binary files differindex e959e76..c6aec8d 100644 --- a/llvm/test/tools/llvm-profdata/Inputs/buildid.memprofraw +++ b/llvm/test/tools/llvm-profdata/Inputs/buildid.memprofraw diff --git a/llvm/test/tools/llvm-profdata/Inputs/inline.memprofexe b/llvm/test/tools/llvm-profdata/Inputs/inline.memprofexe Binary files differindex 2822f2f..5af6c81 100755 --- a/llvm/test/tools/llvm-profdata/Inputs/inline.memprofexe +++ b/llvm/test/tools/llvm-profdata/Inputs/inline.memprofexe diff --git a/llvm/test/tools/llvm-profdata/Inputs/inline.memprofraw b/llvm/test/tools/llvm-profdata/Inputs/inline.memprofraw Binary files differindex 05deb2e..8958af9 100644 --- a/llvm/test/tools/llvm-profdata/Inputs/inline.memprofraw +++ b/llvm/test/tools/llvm-profdata/Inputs/inline.memprofraw diff --git a/llvm/test/tools/llvm-profdata/Inputs/multi.memprofexe b/llvm/test/tools/llvm-profdata/Inputs/multi.memprofexe Binary files differindex 22c6136..e9ec22c 100755 --- a/llvm/test/tools/llvm-profdata/Inputs/multi.memprofexe +++ b/llvm/test/tools/llvm-profdata/Inputs/multi.memprofexe diff --git a/llvm/test/tools/llvm-profdata/Inputs/multi.memprofraw b/llvm/test/tools/llvm-profdata/Inputs/multi.memprofraw Binary files differindex 364aa1c..3952768 100644 --- a/llvm/test/tools/llvm-profdata/Inputs/multi.memprofraw +++ b/llvm/test/tools/llvm-profdata/Inputs/multi.memprofraw diff --git a/llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofexe b/llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofexe Binary files differindex 34db7e7..e50f663 100755 --- a/llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofexe +++ b/llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofexe diff --git a/llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofraw b/llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofraw Binary files differindex 7a7d3a6..df6fcb1 100644 --- a/llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofraw +++ b/llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofraw diff --git a/llvm/test/tools/llvm-profdata/Inputs/pic.memprofexe b/llvm/test/tools/llvm-profdata/Inputs/pic.memprofexe Binary files differindex f7d1723..63eea44 100755 --- a/llvm/test/tools/llvm-profdata/Inputs/pic.memprofexe +++ b/llvm/test/tools/llvm-profdata/Inputs/pic.memprofexe diff --git a/llvm/test/tools/llvm-profdata/Inputs/pic.memprofraw b/llvm/test/tools/llvm-profdata/Inputs/pic.memprofraw Binary files differindex 0920028..b6a733a 100644 --- a/llvm/test/tools/llvm-profdata/Inputs/pic.memprofraw +++ b/llvm/test/tools/llvm-profdata/Inputs/pic.memprofraw diff --git a/llvm/test/tools/llvm-profdata/c-general.test b/llvm/test/tools/llvm-profdata/c-general.test index 7c48f7b..ab4849f 100644 --- a/llvm/test/tools/llvm-profdata/c-general.test +++ b/llvm/test/tools/llvm-profdata/c-general.test @@ -22,6 +22,6 @@ SWITCHES-LABEL: Functions shown: 1 CHECK-LABEL: Total functions: 12 CHECK-NEXT: Maximum function count: 1 CHECK-NEXT: Maximum internal block count: 100 -TOPN: boolean_operators, max count = 100 -TOPN-NEXT: simple_loops, max count = 100 -TOPN-NEXT: conditionals, max count = 100 +TOPN: simple_loops, max count = 100 +TOPN-NEXT: conditionals, max count = 100 +TOPN-NEXT: boolean_operators, max count = 100 diff --git a/llvm/test/tools/llvm-profdata/memprof-basic-histogram.test b/llvm/test/tools/llvm-profdata/memprof-basic-histogram.test index 3d30a62..ce534db 100644 --- a/llvm/test/tools/llvm-profdata/memprof-basic-histogram.test +++ b/llvm/test/tools/llvm-profdata/memprof-basic-histogram.test @@ -7,7 +7,7 @@ We expect 5 MIBs, each with different AccessHistogramValues. CHECK: MemprofProfile: CHECK-NEXT: Summary: -CHECK-NEXT: Version: 4 +CHECK-NEXT: Version: 5 CHECK-NEXT: NumSegments: {{[0-9]+}} CHECK-NEXT: NumMibInfo: 5 CHECK-NEXT: NumAllocFunctions: 3 @@ -241,4 +241,4 @@ CHECK-NEXT: MinLifetimeAccessDensity: 56000 CHECK-NEXT: MaxLifetimeAccessDensity: 56000 CHECK-NEXT: AccessHistogramSize: 8 CHECK-NEXT: AccessHistogram: {{[0-9]+}} -CHECK-NEXT: AccessHistogramValues: 168 147 126 105 84 63 42 21
\ No newline at end of file +CHECK-NEXT: AccessHistogramValues: 168 147 126 105 84 63 42 21 diff --git a/llvm/test/tools/llvm-profdata/memprof-basic.test b/llvm/test/tools/llvm-profdata/memprof-basic.test index e15df50..81550eb 100644 --- a/llvm/test/tools/llvm-profdata/memprof-basic.test +++ b/llvm/test/tools/llvm-profdata/memprof-basic.test @@ -8,7 +8,7 @@ additional allocations which do not originate from the main binary are pruned. CHECK: MemprofProfile: CHECK-NEXT: Summary: -CHECK-NEXT: Version: 4 +CHECK-NEXT: Version: 5 CHECK-NEXT: NumSegments: {{[0-9]+}} CHECK-NEXT: NumMibInfo: 2 CHECK-NEXT: NumAllocFunctions: 1 @@ -96,4 +96,4 @@ CHECK-NEXT: TotalLifetimeAccessDensity: 20000 CHECK-NEXT: MinLifetimeAccessDensity: 20000 CHECK-NEXT: MaxLifetimeAccessDensity: 20000 CHECK-NEXT: AccessHistogramSize: 0 -CHECK-NEXT: AccessHistogram: 0
\ No newline at end of file +CHECK-NEXT: AccessHistogram: 0 diff --git a/llvm/test/tools/llvm-profdata/memprof-basic_v4.test b/llvm/test/tools/llvm-profdata/memprof-basic_v4.test new file mode 100644 index 0000000..79d4fe2 --- /dev/null +++ b/llvm/test/tools/llvm-profdata/memprof-basic_v4.test @@ -0,0 +1,102 @@ +REQUIRES: x86_64-linux + +This is a copy of memprof-basic.test with slight changes to check that we can still read v3 of memprofraw. + +Inputs cannot and should not be updated. + +RUN: llvm-profdata show --memory %p/Inputs/basic_v4.memprofraw --profiled-binary %p/Inputs/basic_v4.memprofexe -o - | FileCheck %s + +We expect 2 MIB entries, 1 each for the malloc calls in the program. Any +additional allocations which do not originate from the main binary are pruned. + +CHECK: MemprofProfile: +CHECK-NEXT: Summary: +CHECK-NEXT: Version: 4 +CHECK-NEXT: NumSegments: {{[0-9]+}} +CHECK-NEXT: NumMibInfo: 2 +CHECK-NEXT: NumAllocFunctions: 1 +CHECK-NEXT: NumStackOffsets: 2 +CHECK-NEXT: Segments: +CHECK-NEXT: - +CHECK-NEXT: BuildId: {{[[:xdigit:]]+}} +CHECK-NEXT: Start: 0x{{[[:xdigit:]]+}} +CHECK-NEXT: End: 0x{{[[:xdigit:]]+}} +CHECK-NEXT: Offset: 0x{{[[:xdigit:]]+}} +CHECK-NEXT: - + +CHECK: Records: +CHECK-NEXT: - +CHECK-NEXT: FunctionGUID: {{[0-9]+}} +CHECK-NEXT: AllocSites: +CHECK-NEXT: - +CHECK-NEXT: Callstack: +CHECK-NEXT: - +CHECK-NEXT: Function: {{[0-9]+}} +CHECK-NEXT: SymbolName: main +CHECK-NEXT: LineOffset: 1 +CHECK-NEXT: Column: 21 +CHECK-NEXT: Inline: 0 +CHECK-NEXT: MemInfoBlock: +CHECK-NEXT: AllocCount: 1 +CHECK-NEXT: TotalAccessCount: 2 +CHECK-NEXT: MinAccessCount: 2 +CHECK-NEXT: MaxAccessCount: 2 +CHECK-NEXT: TotalSize: 10 +CHECK-NEXT: MinSize: 10 +CHECK-NEXT: MaxSize: 10 +CHECK-NEXT: AllocTimestamp: {{[0-9]+}} +CHECK-NEXT: DeallocTimestamp: {{[0-9]+}} +CHECK-NEXT: TotalLifetime: 0 +CHECK-NEXT: MinLifetime: 0 +CHECK-NEXT: MaxLifetime: 0 +CHECK-NEXT: AllocCpuId: {{[0-9]+}} +CHECK-NEXT: DeallocCpuId: {{[0-9]+}} +CHECK-NEXT: NumMigratedCpu: 0 +CHECK-NEXT: NumLifetimeOverlaps: 0 +CHECK-NEXT: NumSameAllocCpu: 0 +CHECK-NEXT: NumSameDeallocCpu: 0 +CHECK-NEXT: DataTypeId: {{[0-9]+}} +CHECK-NEXT: TotalAccessDensity: 20 +CHECK-NEXT: MinAccessDensity: 20 +CHECK-NEXT: MaxAccessDensity: 20 +CHECK-NEXT: TotalLifetimeAccessDensity: 20000 +CHECK-NEXT: MinLifetimeAccessDensity: 20000 +CHECK-NEXT: MaxLifetimeAccessDensity: 20000 +CHECK-NEXT: AccessHistogramSize: 0 +CHECK-NEXT: AccessHistogram: 0 +CHECK-NEXT: - +CHECK-NEXT: Callstack: +CHECK-NEXT: - +CHECK-NEXT: Function: {{[0-9]+}} +CHECK-NEXT: SymbolName: main +CHECK-NEXT: LineOffset: 4 +CHECK-NEXT: Column: 15 +CHECK-NEXT: Inline: 0 +CHECK-NEXT: MemInfoBlock: +CHECK-NEXT: AllocCount: 1 +CHECK-NEXT: TotalAccessCount: 2 +CHECK-NEXT: MinAccessCount: 2 +CHECK-NEXT: MaxAccessCount: 2 +CHECK-NEXT: TotalSize: 10 +CHECK-NEXT: MinSize: 10 +CHECK-NEXT: MaxSize: 10 +CHECK-NEXT: AllocTimestamp: {{[0-9]+}} +CHECK-NEXT: DeallocTimestamp: {{[0-9]+}} +CHECK-NEXT: TotalLifetime: 0 +CHECK-NEXT: MinLifetime: 0 +CHECK-NEXT: MaxLifetime: 0 +CHECK-NEXT: AllocCpuId: {{[0-9]+}} +CHECK-NEXT: DeallocCpuId: {{[0-9]+}} +CHECK-NEXT: NumMigratedCpu: 0 +CHECK-NEXT: NumLifetimeOverlaps: 0 +CHECK-NEXT: NumSameAllocCpu: 0 +CHECK-NEXT: NumSameDeallocCpu: 0 +CHECK-NEXT: DataTypeId: {{[0-9]+}} +CHECK-NEXT: TotalAccessDensity: 20 +CHECK-NEXT: MinAccessDensity: 20 +CHECK-NEXT: MaxAccessDensity: 20 +CHECK-NEXT: TotalLifetimeAccessDensity: 20000 +CHECK-NEXT: MinLifetimeAccessDensity: 20000 +CHECK-NEXT: MaxLifetimeAccessDensity: 20000 +CHECK-NEXT: AccessHistogramSize: 0 +CHECK-NEXT: AccessHistogram: 0 diff --git a/llvm/test/tools/llvm-profdata/memprof-inline.test b/llvm/test/tools/llvm-profdata/memprof-inline.test index 79ce2ad..4a3f620 100644 --- a/llvm/test/tools/llvm-profdata/memprof-inline.test +++ b/llvm/test/tools/llvm-profdata/memprof-inline.test @@ -5,7 +5,7 @@ RUN: llvm-profdata show --memory %p/Inputs/inline.memprofraw --profiled-binary % CHECK: MemprofProfile: CHECK-NEXT: Summary: -CHECK-NEXT: Version: 4 +CHECK-NEXT: Version: 5 CHECK-NEXT: NumSegments: {{[0-9]+}} CHECK-NEXT: NumMibInfo: 2 CHECK-NEXT: NumAllocFunctions: 2 diff --git a/llvm/test/tools/llvm-profdata/memprof-multi.test b/llvm/test/tools/llvm-profdata/memprof-multi.test index 6243982..35f94df 100644 --- a/llvm/test/tools/llvm-profdata/memprof-multi.test +++ b/llvm/test/tools/llvm-profdata/memprof-multi.test @@ -7,7 +7,7 @@ We expect 2 MIB entries, 1 each for the malloc calls in the program. CHECK: MemprofProfile: CHECK-NEXT: Summary: -CHECK-NEXT: Version: 4 +CHECK-NEXT: Version: 5 CHECK-NEXT: NumSegments: {{[0-9]+}} CHECK-NEXT: NumMibInfo: 2 CHECK-NEXT: NumAllocFunctions: 1 diff --git a/llvm/test/tools/llvm-profdata/memprof-padding-histogram.test b/llvm/test/tools/llvm-profdata/memprof-padding-histogram.test index 4ba58e3..2d0346e 100644 --- a/llvm/test/tools/llvm-profdata/memprof-padding-histogram.test +++ b/llvm/test/tools/llvm-profdata/memprof-padding-histogram.test @@ -7,7 +7,7 @@ We expect 2 different MIBs with histogram values. This test is to make sure we p CHECK: MemprofProfile: CHECK-NEXT: Summary: -CHECK-NEXT: Version: 4 +CHECK-NEXT: Version: 5 CHECK-NEXT: NumSegments: {{[0-9]+}} CHECK-NEXT: NumMibInfo: 2 CHECK-NEXT: NumAllocFunctions: 1 @@ -21,79 +21,79 @@ CHECK-NEXT: Offset: 0x{{[[:xdigit:]]+}} CHECK-NEXT: - CHECK: Records: -CHEC-NEXT FunctionGUID: {{[0-9]+}} -CHEC-NEXT AllocSites: -CHEC-NEXT - -CHEC-NEXT Callstack: -CHEC-NEXT - -CHEC-NEXT Function: {{[0-9]+}} -CHEC-NEXT SymbolName: main -CHEC-NEXT LineOffset: 3 -CHEC-NEXT Column: 10 -CHEC-NEXT Inline: 0 -CHEC-NEXT MemInfoBlock: -CHEC-NEXT AllocCount: 1 -CHEC-NEXT TotalAccessCount: 5 -CHEC-NEXT MinAccessCount: 5 -CHEC-NEXT MaxAccessCount: 5 -CHEC-NEXT TotalSize: 24 -CHEC-NEXT MinSize: 24 -CHEC-NEXT MaxSize: 24 -CHEC-NEXT AllocTimestamp: {{[0-9]+}} -CHEC-NEXT DeallocTimestamp: {{[0-9]+}} -CHEC-NEXT TotalLifetime: 0 -CHEC-NEXT MinLifetime: 0 -CHEC-NEXT MaxLifetime: 0 -CHEC-NEXT AllocCpuId: 11 -CHEC-NEXT DeallocCpuId: 11 -CHEC-NEXT NumMigratedCpu: 0 -CHEC-NEXT NumLifetimeOverlaps: 0 -CHEC-NEXT NumSameAllocCpu: 0 -CHEC-NEXT NumSameDeallocCpu: 0 -CHEC-NEXT DataTypeId: 0 -CHEC-NEXT TotalAccessDensity: 20 -CHEC-NEXT MinAccessDensity: 20 -CHEC-NEXT MaxAccessDensity: 20 -CHEC-NEXT TotalLifetimeAccessDensity: 20000 -CHEC-NEXT MinLifetimeAccessDensity: 20000 -CHEC-NEXT MaxLifetimeAccessDensity: 20000 -CHEC-NEXT AccessHistogramSize: 3 -CHEC-NEXT AccessHistogram: {{[0-9]+}} -CHEC-NEXT AccessHistogramValues: -2 -1 -2 -CHEC-NEXT - -CHEC-NEXT Callstack: -CHEC-NEXT - -CHEC-NEXT Function: {{[0-9]+}} -CHEC-NEXT SymbolName: main -CHEC-NEXT LineOffset: 10 -CHEC-NEXT Column: 10 -CHEC-NEXT Inline: 0 -CHEC-NEXT MemInfoBlock: -CHEC-NEXT AllocCount: 1 -CHEC-NEXT TotalAccessCount: 4 -CHEC-NEXT MinAccessCount: 4 -CHEC-NEXT MaxAccessCount: 4 -CHEC-NEXT TotalSize: 48 -CHEC-NEXT MinSize: 48 -CHEC-NEXT MaxSize: 48 -CHEC-NEXT AllocTimestamp: {{[0-9]+}} -CHEC-NEXT DeallocTimestamp: {{[0-9]+}} -CHEC-NEXT TotalLifetime: 0 -CHEC-NEXT MinLifetime: 0 -CHEC-NEXT MaxLifetime: 0 -CHEC-NEXT AllocCpuId: 11 -CHEC-NEXT DeallocCpuId: 11 -CHEC-NEXT NumMigratedCpu: 0 -CHEC-NEXT NumLifetimeOverlaps: 0 -CHEC-NEXT NumSameAllocCpu: 0 -CHEC-NEXT NumSameDeallocCpu: 0 -CHEC-NEXT DataTypeId: 0 -CHEC-NEXT TotalAccessDensity: 8 -CHEC-NEXT MinAccessDensity: 8 -CHEC-NEXT MaxAccessDensity: 8 -CHEC-NEXT TotalLifetimeAccessDensity: 8000 -CHEC-NEXT MinLifetimeAccessDensity: 8000 -CHEC-NEXT MaxLifetimeAccessDensity: 8000 -CHEC-NEXT AccessHistogramSize: 6 -CHEC-NEXT AccessHistogram: {{[0-9]+}} -CHEC-NEXT AccessHistogramValues: -2 -0 -0 -0 -1 -1
\ No newline at end of file +CHECK-NEXT FunctionGUID: {{[0-9]+}} +CHECK-NEXT AllocSites: +CHECK-NEXT - +CHECK-NEXT Callstack: +CHECK-NEXT - +CHECK-NEXT Function: {{[0-9]+}} +CHECK-NEXT SymbolName: main +CHECK-NEXT LineOffset: 3 +CHECK-NEXT Column: 10 +CHECK-NEXT Inline: 0 +CHECK-NEXT MemInfoBlock: +CHECK-NEXT AllocCount: 1 +CHECK-NEXT TotalAccessCount: 5 +CHECK-NEXT MinAccessCount: 5 +CHECK-NEXT MaxAccessCount: 5 +CHECK-NEXT TotalSize: 24 +CHECK-NEXT MinSize: 24 +CHECK-NEXT MaxSize: 24 +CHECK-NEXT AllocTimestamp: {{[0-9]+}} +CHECK-NEXT DeallocTimestamp: {{[0-9]+}} +CHECK-NEXT TotalLifetime: 0 +CHECK-NEXT MinLifetime: 0 +CHECK-NEXT MaxLifetime: 0 +CHECK-NEXT AllocCpuId: 11 +CHECK-NEXT DeallocCpuId: 11 +CHECK-NEXT NumMigratedCpu: 0 +CHECK-NEXT NumLifetimeOverlaps: 0 +CHECK-NEXT NumSameAllocCpu: 0 +CHECK-NEXT NumSameDeallocCpu: 0 +CHECK-NEXT DataTypeId: 0 +CHECK-NEXT TotalAccessDensity: 20 +CHECK-NEXT MinAccessDensity: 20 +CHECK-NEXT MaxAccessDensity: 20 +CHECK-NEXT TotalLifetimeAccessDensity: 20000 +CHECK-NEXT MinLifetimeAccessDensity: 20000 +CHECK-NEXT MaxLifetimeAccessDensity: 20000 +CHECK-NEXT AccessHistogramSize: 3 +CHECK-NEXT AccessHistogram: {{[0-9]+}} +CHECK-NEXT AccessHistogramValues: -2 -1 -2 +CHECK-NEXT - +CHECK-NEXT Callstack: +CHECK-NEXT - +CHECK-NEXT Function: {{[0-9]+}} +CHECK-NEXT SymbolName: main +CHECK-NEXT LineOffset: 10 +CHECK-NEXT Column: 10 +CHECK-NEXT Inline: 0 +CHECK-NEXT MemInfoBlock: +CHECK-NEXT AllocCount: 1 +CHECK-NEXT TotalAccessCount: 4 +CHECK-NEXT MinAccessCount: 4 +CHECK-NEXT MaxAccessCount: 4 +CHECK-NEXT TotalSize: 48 +CHECK-NEXT MinSize: 48 +CHECK-NEXT MaxSize: 48 +CHECK-NEXT AllocTimestamp: {{[0-9]+}} +CHECK-NEXT DeallocTimestamp: {{[0-9]+}} +CHECK-NEXT TotalLifetime: 0 +CHECK-NEXT MinLifetime: 0 +CHECK-NEXT MaxLifetime: 0 +CHECK-NEXT AllocCpuId: 11 +CHECK-NEXT DeallocCpuId: 11 +CHECK-NEXT NumMigratedCpu: 0 +CHECK-NEXT NumLifetimeOverlaps: 0 +CHECK-NEXT NumSameAllocCpu: 0 +CHECK-NEXT NumSameDeallocCpu: 0 +CHECK-NEXT DataTypeId: 0 +CHECK-NEXT TotalAccessDensity: 8 +CHECK-NEXT MinAccessDensity: 8 +CHECK-NEXT MaxAccessDensity: 8 +CHECK-NEXT TotalLifetimeAccessDensity: 8000 +CHECK-NEXT MinLifetimeAccessDensity: 8000 +CHECK-NEXT MaxLifetimeAccessDensity: 8000 +CHECK-NEXT AccessHistogramSize: 6 +CHECK-NEXT AccessHistogram: {{[0-9]+}} +CHECK-NEXT AccessHistogramValues: -2 -0 -0 -0 -1 -1 diff --git a/llvm/test/tools/llvm-profdata/memprof-pic.test b/llvm/test/tools/llvm-profdata/memprof-pic.test index 78d2c5c..66203ef 100644 --- a/llvm/test/tools/llvm-profdata/memprof-pic.test +++ b/llvm/test/tools/llvm-profdata/memprof-pic.test @@ -11,7 +11,7 @@ RUN: llvm-profdata show --memory %p/Inputs/pic.memprofraw --profiled-binary %p/I CHECK: MemprofProfile: CHECK-NEXT: Summary: -CHECK-NEXT: Version: 4 +CHECK-NEXT: Version: 5 CHECK-NEXT: NumSegments: {{[0-9]+}} CHECK-NEXT: NumMibInfo: 2 CHECK-NEXT: NumAllocFunctions: 1 @@ -100,4 +100,4 @@ CHECK-NEXT: TotalLifetimeAccessDensity: 20000 CHECK-NEXT: MinLifetimeAccessDensity: 20000 CHECK-NEXT: MaxLifetimeAccessDensity: 20000 CHECK-NEXT: AccessHistogramSize: 0 -CHECK-NEXT: AccessHistogram: 0
\ No newline at end of file +CHECK-NEXT: AccessHistogram: 0 diff --git a/llvm/test/tools/llvm-profdata/show-hot.proftext b/llvm/test/tools/llvm-profdata/show-hot.proftext new file mode 100644 index 0000000..5c9bd61 --- /dev/null +++ b/llvm/test/tools/llvm-profdata/show-hot.proftext @@ -0,0 +1,35 @@ +# RUN: llvm-profdata show %s --hot-func-list | FileCheck %s + +# CHECK: # Hot count threshold: 101 +# CHECK: hot_b +# CHECK: hot_a +# CHECK: hot_c + +:ir +hot_a +# Func Hash: +0x1234 +# Num Counters: +1 +# Counter Values: +101 + +hot_b +0x5678 +1 +202 + +hot_c +0x5678 +1 +101 + +cold_d +0xabcd +1 +1 + +cold_e +0xefff +1 +0 diff --git a/llvm/test/tools/llvm-rc/windres-preproc.test b/llvm/test/tools/llvm-rc/windres-preproc.test index 423ad02..43ed0a6 100644 --- a/llvm/test/tools/llvm-rc/windres-preproc.test +++ b/llvm/test/tools/llvm-rc/windres-preproc.test @@ -4,7 +4,7 @@ ; RUN: llvm-windres -### --include-dir %p/incdir1 --include %p/incdir2 "-DFOO1=\\\"foo bar\\\"" -UFOO2 -D FOO3 --preprocessor-arg "-DFOO4=\\\"baz baz\\\"" -DFOO5=\"bar\" %p/Inputs/empty.rc %t.res | FileCheck %s --check-prefix=CHECK1 ; RUN: llvm-windres -### --include-dir %p/incdir1 --include %p/incdir2 "-DFOO1=\"foo bar\"" -UFOO2 -D FOO3 --preprocessor-arg "-DFOO4=\"baz baz\"" "-DFOO5=bar" %p/Inputs/empty.rc %t.res --use-temp-file | FileCheck %s --check-prefix=CHECK1 -; CHECK1: {{^}} "clang" "--driver-mode=gcc" "-target" "{{.*}}-{{.*}}{{mingw32|windows-gnu}}" "-E" "-xc" "-DRC_INVOKED" "-I" "{{.*}}incdir1" "-I" "{{.*}}incdir2" "-D" "FOO1=\"foo bar\"" "-U" "FOO2" "-D" "FOO3" "-DFOO4=\"baz baz\"" "-D" "FOO5=bar" "{{.*}}empty.rc" "-o" "{{.*}}preproc-{{.*}}.rc"{{$}} +; CHECK1: {{^}} "clang" "--driver-mode=gcc" "-target" "{{.*}}-{{.*}}{{mingw32|cygwin|windows-gnu|windows-cygnus}}" "-E" "-xc" "-DRC_INVOKED" "-I" "{{.*}}incdir1" "-I" "{{.*}}incdir2" "-D" "FOO1=\"foo bar\"" "-U" "FOO2" "-D" "FOO3" "-DFOO4=\"baz baz\"" "-D" "FOO5=bar" "{{.*}}empty.rc" "-o" "{{.*}}preproc-{{.*}}.rc"{{$}} ; RUN: llvm-windres -### --preprocessor "i686-w64-mingw32-gcc" --preprocessor-arg -E "-DFOO=\\\"foo bar\\\"" %p/Inputs/empty.rc %t.res | FileCheck %s --check-prefix=CHECK2 ; CHECK2: {{^}} "{{.*}}i686-w64-mingw32-gcc" "-E" "-D" "FOO=\"foo bar\"" "{{.*}}empty.rc" "-o" "{{.*}}preproc-{{.*}}.rc"{{$}} @@ -13,7 +13,7 @@ ; RUN: rm -rf %t-bin/testbin ; RUN: mkdir -p %t-bin/testbin ; RUN: ln -s llvm-windres %t-bin/testbin/i686-w64-mingw32-gcc -; RUN: env PATH=%t-bin/testbin llvm-windres -### --preprocessor i686-w64-mingw32-gcc --preprocessor-arg -E --preprocessor-arg -xc -DRC_INVOKED %p/Inputs/empty.rc %t.res | FileCheck %s --check-prefix=CHECK3 +; RUN: env PATH="%t-bin/testbin:$PATH" llvm-windres -### --preprocessor i686-w64-mingw32-gcc --preprocessor-arg -E --preprocessor-arg -xc -DRC_INVOKED %p/Inputs/empty.rc %t.res | FileCheck %s --check-prefix=CHECK3 ; CHECK3: {{^}} "{{.*}}/testbin/i686-w64-mingw32-gcc" "-E" "-xc" "-D" "RC_INVOKED" "{{.*}}empty.rc" "-o" "{{.*}}preproc-{{.*}}.rc"{{$}} diff --git a/llvm/test/tools/llvm-readobj/COFF/Inputs/has-cet.exe b/llvm/test/tools/llvm-readobj/COFF/Inputs/has-cet.exe Binary files differdeleted file mode 100644 index c77060d..0000000 --- a/llvm/test/tools/llvm-readobj/COFF/Inputs/has-cet.exe +++ /dev/null diff --git a/llvm/test/tools/llvm-readobj/COFF/Inputs/has-exdllcharacteristics.exe b/llvm/test/tools/llvm-readobj/COFF/Inputs/has-exdllcharacteristics.exe Binary files differnew file mode 100644 index 0000000..9c36817 --- /dev/null +++ b/llvm/test/tools/llvm-readobj/COFF/Inputs/has-exdllcharacteristics.exe diff --git a/llvm/test/tools/llvm-readobj/COFF/cetcompat.test b/llvm/test/tools/llvm-readobj/COFF/cetcompat.test deleted file mode 100644 index a973b5c..0000000 --- a/llvm/test/tools/llvm-readobj/COFF/cetcompat.test +++ /dev/null @@ -1,16 +0,0 @@ -# To regenerate has-cet.exe -# $ echo int main() { return 0; } > has-cet.c -# $ cl has-cet.c /link /cetcompat -RUN: llvm-readobj --coff-debug-directory %p/Inputs/has-cet.exe | FileCheck %s - -CHECK: DebugEntry { -CHECK: Characteristics: 0x0 -CHECK: Type: ExtendedDLLCharacteristics (0x14) -CHECK: ExtendedCharacteristics [ (0x1) -CHECK: IMAGE_DLL_CHARACTERISTICS_EX_CET_COMPAT (0x1) -CHECK: ] -CHECK: RawData ( -CHECK: 0000: 01000000 |....| -CHECK: ) -CHECK: } - diff --git a/llvm/test/tools/llvm-readobj/COFF/exdllcharacteristics.test b/llvm/test/tools/llvm-readobj/COFF/exdllcharacteristics.test new file mode 100644 index 0000000..ef35aea --- /dev/null +++ b/llvm/test/tools/llvm-readobj/COFF/exdllcharacteristics.test @@ -0,0 +1,22 @@ +# To regenerate has-exdllcharacteristics.exe +# $ echo int main() { return 0; } > has-exdllcharacteristics.c +# To make minimum possible stub file (to decrease the binary size) +# $ echo -n '4D5A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' | xxd -r -p > stub +# $ cl has-exdllcharacteristics.c /link /entry:main /STUB:stub /NOCOFFGRPINFO /EMITTOOLVERSIONINFO:NO /EMITPOGOPHASEINFO /NOVCFEATURE /MANIFEST:NO /cetcompat /cetcompatstrict /cetdynamicapisinproc /cetipvalidationrelaxed /hotpatchcompatible /functionpadmin:6 +RUN: llvm-readobj --coff-debug-directory %p/Inputs/has-exdllcharacteristics.exe | FileCheck %s + +CHECK: DebugEntry { +CHECK: Characteristics: 0x0 +CHECK: Type: ExtendedDLLCharacteristics (0x14) +CHECK: ExtendedCharacteristics [ (0x8F) +CHECK-DAG: IMAGE_DLL_CHARACTERISTICS_EX_CET_COMPAT (0x1) +CHECK-DAG: IMAGE_DLL_CHARACTERISTICS_EX_CET_COMPAT_STRICT_MODE (0x2) +CHECK-DAG: IMAGE_DLL_CHARACTERISTICS_EX_CET_SET_CONTEXT_IP_VALIDATION_RELAXED_MODE (0x4) +CHECK-DAG: IMAGE_DLL_CHARACTERISTICS_EX_CET_DYNAMIC_APIS_ALLOW_IN_PROC_ONLY (0x8) +CHECK-DAG: IMAGE_DLL_CHARACTERISTICS_EX_HOTPATCH_COMPATIBLE (0x80) +CHECK: ] +CHECK: RawData ( +CHECK: 0000: 8F000000 |....| +CHECK: ) +CHECK: } + diff --git a/llvm/test/tools/llvm-readobj/ELF/sframe-fde.test b/llvm/test/tools/llvm-readobj/ELF/sframe-fde.test new file mode 100644 index 0000000..dee4018 --- /dev/null +++ b/llvm/test/tools/llvm-readobj/ELF/sframe-fde.test @@ -0,0 +1,237 @@ +## Check parsing and dumping of SFrame Function Descriptor Entries. +# RUN: yaml2obj --docnum=1 %s -o %t.1 +# RUN: llvm-readobj --sframe=.sframe_short --sframe=.sframe_section_relative \ +# RUN: --sframe=.sframe_fde_relative %t.1 2>&1 | \ +# RUN: FileCheck %s --strict-whitespace --match-full-lines \ +# RUN: -DFILE=%t.1 --check-prefix=CASE1 + +## Check big-endian support. +# RUN: yaml2obj --docnum=2 %s -o %t.2 +# RUN: llvm-readobj --sframe %t.2 2>&1 | \ +# RUN: FileCheck %s --strict-whitespace --match-full-lines \ +# RUN: -DFILE=%t.2 --check-prefix=CASE2 + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2LSB + Type: ET_EXEC +Sections: + - Name: .sframe_short + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xe2, 0xde, 0x02, 0x00, # Preamble (magic, version, flags) + # Header: + 0x03, 0x42, 0x47, 0x04, # ABI, Fixed FP offset, Fixed RA Offset, AUX header length + 0x01, 0x00, 0x00, 0x00, # Number of FDEs + 0x10, 0x00, 0x00, 0x00, # Number of FREs + 0x00, 0x10, 0x00, 0x00, # FRE length + 0x00, 0x00, 0x00, 0x00, # FDE offset + 0x00, 0x01, 0x00, 0x00, # FRE offset + 0xde, 0xad, 0xbe, 0xef, # AUX header + 0x01, 0x02, 0x03, 0x04, # Short FDE + ] +# CASE1-LABEL:SFrame section '.sframe_short' { +# CASE1: Header { +# CASE1-NEXT: Magic: 0xDEE2 +# CASE1-NEXT: Version: V2 (0x2) +# CASE1-NEXT: Flags [ (0x0) +# CASE1-NEXT: ] +# CASE1-NEXT: ABI: AMD64EndianLittle (0x3) +# CASE1-NEXT: CFA fixed FP offset (unused): 66 +# CASE1-NEXT: CFA fixed RA offset: 71 +# CASE1-NEXT: Auxiliary header length: 4 +# CASE1-NEXT: Num FDEs: 1 +# CASE1-NEXT: Num FREs: 16 +# CASE1-NEXT: FRE subsection length: 4096 +# CASE1-NEXT: FDE subsection offset: 0 +# CASE1-NEXT: FRE subsection offset: 256 +# CASE1-NEXT: Auxiliary header: [0xDE, 0xAD, 0xBE, 0xEF] +# CASE1-NEXT: } +# CASE1-NEXT:{{.*}}: warning: '[[FILE]]': unexpected end of data at offset 0x24 while reading [0x20, 0x34) +# CASE1-NEXT:} + + - Name: .sframe_section_relative + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xe2, 0xde, 0x02, 0x00, # Preamble (magic, version, flags) + # Header: + 0x03, 0x42, 0x47, 0x00, # ABI, Fixed FP offset, Fixed RA Offset, AUX header length + 0x01, 0x00, 0x00, 0x00, # Number of FDEs + 0x10, 0x00, 0x00, 0x00, # Number of FREs + 0x00, 0x10, 0x00, 0x00, # FRE length + 0x04, 0x00, 0x00, 0x00, # FDE offset + 0x00, 0x01, 0x00, 0x00, # FRE offset + + 0xff, 0xff, 0xff, 0xff, # Unused data skipped due to the FDE offset field + + # FDE: + 0x00, 0xde, 0xad, 0x00, # Start Address + 0xbe, 0x01, 0x00, 0x00, # Size + 0x10, 0x00, 0x00, 0x00, # Start FRE Offset + 0x00, 0x00, 0x00, 0x00, # Number of FREs + 0x31, 0xde, 0xad, 0x00, # Info, RepSize, Padding2 + ] +## Also testing: +## - dead space between the header and the FDE subsection. +## - PCMask FDE types +## - unused PAuth key handling +# CASE1-LABEL:SFrame section '.sframe_section_relative' { +# CASE1: Header { +# CASE1-NEXT: Magic: 0xDEE2 +# CASE1-NEXT: Version: V2 (0x2) +# CASE1-NEXT: Flags [ (0x0) +# CASE1-NEXT: ] +# CASE1-NEXT: ABI: AMD64EndianLittle (0x3) +# CASE1-NEXT: CFA fixed FP offset (unused): 66 +# CASE1-NEXT: CFA fixed RA offset: 71 +# CASE1-NEXT: Auxiliary header length: 0 +# CASE1-NEXT: Num FDEs: 1 +# CASE1-NEXT: Num FREs: 16 +# CASE1-NEXT: FRE subsection length: 4096 +# CASE1-NEXT: FDE subsection offset: 4 +# CASE1-NEXT: FRE subsection offset: 256 +# CASE1-NEXT: Auxiliary header: [] +# CASE1-NEXT: } +# CASE1-NEXT: Function Index [ +# CASE1-NEXT: FuncDescEntry [0] { +# CASE1-NEXT: PC: 0xADDE24 +# CASE1-NEXT: Size: 0x1BE +# CASE1-NEXT: Start FRE Offset: 0x10 +# CASE1-NEXT: Num FREs: 0 +# CASE1-NEXT: Info { +# CASE1-NEXT: FRE Type: Addr2 (0x1) +# CASE1-NEXT: FDE Type: PCMask (0x1) +# CASE1-NEXT: Raw: 0x31 +# CASE1-NEXT: } +# CASE1-NEXT: Repetitive block size: 0xDE +# CASE1-NEXT: Padding2: 0xAD +# CASE1-NEXT: } +# CASE1-NEXT: ] +# CASE1-NEXT:} + + - Name: .sframe_fde_relative + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xe2, 0xde, 0x02, 0x04, # Preamble (magic, version, flags) + # Header: + 0x02, 0x42, 0x47, 0x00, # ABI, Fixed FP offset, Fixed RA Offset, AUX header length + 0x01, 0x00, 0x00, 0x00, # Number of FDEs + 0x10, 0x00, 0x00, 0x00, # Number of FREs + 0x00, 0x10, 0x00, 0x00, # FRE length + 0x04, 0x00, 0x00, 0x00, # FDE offset + 0x00, 0x01, 0x00, 0x00, # FRE offset + + 0xff, 0xff, 0xff, 0xff, # Unused data skipped due to the FDE offset field + + # FDE: + 0x00, 0xde, 0xad, 0x00, # Start Address + 0xbe, 0x01, 0x00, 0x00, # Size + 0x10, 0x00, 0x00, 0x00, # Start FRE Offset + 0x00, 0x00, 0x00, 0x00, # Number of FREs + 0x02, 0xde, 0xad, 0x00, # Info, RepSize, Padding2 + ] +## Also testing: +## - PCInc FDE type +## - AArch64 PAuth key handling +# CASE1-LABEL:SFrame section '.sframe_fde_relative' { +# CASE1: Header { +# CASE1-NEXT: Magic: 0xDEE2 +# CASE1-NEXT: Version: V2 (0x2) +# CASE1-NEXT: Flags [ (0x4) +# CASE1-NEXT: FDEFuncStartPCRel (0x4){{ *}} +# CASE1-NEXT: ] +# CASE1-NEXT: ABI: AArch64EndianLittle (0x2) +# CASE1-NEXT: CFA fixed FP offset (unused): 66 +# CASE1-NEXT: CFA fixed RA offset (unused): 71 +# CASE1-NEXT: Auxiliary header length: 0 +# CASE1-NEXT: Num FDEs: 1 +# CASE1-NEXT: Num FREs: 16 +# CASE1-NEXT: FRE subsection length: 4096 +# CASE1-NEXT: FDE subsection offset: 4 +# CASE1-NEXT: FRE subsection offset: 256 +# CASE1-NEXT: Auxiliary header: [] +# CASE1-NEXT: } +# CASE1-NEXT: Function Index [ +# CASE1-NEXT: FuncDescEntry [0] { +# CASE1-NEXT: PC: 0xADDE78 +# CASE1-NEXT: Size: 0x1BE +# CASE1-NEXT: Start FRE Offset: 0x10 +# CASE1-NEXT: Num FREs: 0 +# CASE1-NEXT: Info { +# CASE1-NEXT: FRE Type: Addr4 (0x2) +# CASE1-NEXT: FDE Type: PCInc (0x0) +# CASE1-NEXT: PAuth Key: A (0x0) +# CASE1-NEXT: Raw: 0x2 +# CASE1-NEXT: } +# CASE1-NEXT: Repetitive block size (unused): 0xDE +# CASE1-NEXT: Padding2: 0xAD +# CASE1-NEXT: } +# CASE1-NEXT: ] +# CASE1-NEXT:} + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2MSB + Type: ET_EXEC +Sections: + - Name: .sframe + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xde, 0xe2, 0x02, 0x05, # Preamble (magic, version, flags) + # Header: + 0x01, 0x42, 0x47, 0x00, # ABI, Fixed FP offset, Fixed RA Offset, AUX header length + 0x00, 0x00, 0x00, 0x01, # Number of FDEs + 0x00, 0x00, 0x00, 0x10, # Number of FREs + 0x00, 0x00, 0x10, 0x00, # FRE length + 0x00, 0x00, 0x00, 0x00, # FDE offset + 0x00, 0x00, 0x01, 0x00, # FRE offset + + # FDE: + 0x00, 0xde, 0xad, 0x00, # Start Address + 0x00, 0x00, 0x01, 0xbe, # Size + 0x00, 0x00, 0x00, 0x10, # Start FRE Offset + 0x00, 0x00, 0x00, 0x10, # Number of FREs + 0x02, 0xde, 0xad, 0x00, # Info, RepSize, Padding2 + ] +# CASE2-LABEL:SFrame section '.sframe' { +# CASE2: Header { +# CASE2-NEXT: Magic: 0xDEE2 +# CASE2-NEXT: Version: V2 (0x2) +# CASE2-NEXT: Flags [ (0x5) +# CASE2-NEXT: FDEFuncStartPCRel (0x4){{ *}} +# CASE2-NEXT: FDESorted (0x1){{ *}} +# CASE2-NEXT: ] +# CASE2-NEXT: ABI: AArch64EndianBig (0x1) +# CASE2-NEXT: CFA fixed FP offset (unused): 66 +# CASE2-NEXT: CFA fixed RA offset (unused): 71 +# CASE2-NEXT: Auxiliary header length: 0 +# CASE2-NEXT: Num FDEs: 1 +# CASE2-NEXT: Num FREs: 16 +# CASE2-NEXT: FRE subsection length: 4096 +# CASE2-NEXT: FDE subsection offset: 0 +# CASE2-NEXT: FRE subsection offset: 256 +# CASE2-NEXT: Auxiliary header: [] +# CASE2-NEXT: } +# CASE2-NEXT: Function Index [ +# CASE2-NEXT: FuncDescEntry [0] { +# CASE2-NEXT: PC: 0xDEAD1C +# CASE2-NEXT: Size: 0x1BE +# CASE2-NEXT: Start FRE Offset: 0x10 +# CASE2-NEXT: Num FREs: 16 +# CASE2-NEXT: Info { +# CASE2-NEXT: FRE Type: Addr4 (0x2) +# CASE2-NEXT: FDE Type: PCInc (0x0) +# CASE2-NEXT: PAuth Key: A (0x0) +# CASE2-NEXT: Raw: 0x2 +# CASE2-NEXT: } +# CASE2-NEXT: Repetitive block size (unused): 0xDE +# CASE2-NEXT: Padding2: 0xAD00 +# CASE2-NEXT: } +# CASE2-NEXT: ] +# CASE2-NEXT:} diff --git a/llvm/test/tools/llvm-readobj/ELF/sframe-header.test b/llvm/test/tools/llvm-readobj/ELF/sframe-header.test new file mode 100644 index 0000000..e7c0db0 --- /dev/null +++ b/llvm/test/tools/llvm-readobj/ELF/sframe-header.test @@ -0,0 +1,191 @@ +## Check parsing and dumping of the SFrame header. +# RUN: yaml2obj --docnum=1 %s -o %t.1 +# RUN: llvm-readobj --sframe=.sframe_bad_sh_size --sframe=.sframe_1b \ +# RUN: --sframe=.sframe_bad_magic --sframe=.sframe_bad_version \ +# RUN: --sframe=.sframe_6b --sframe=.sframe_short_auxheader \ +# RUN: --sframe=.sframe_header %t.1 2>&1 | \ +# RUN: FileCheck %s --strict-whitespace --match-full-lines \ +# RUN: -DFILE=%t.1 --check-prefix=CASE1 + +## Check big-endian support and the handling of --sframe argument default. +# RUN: yaml2obj --docnum=2 %s -o %t.2 +# RUN: llvm-readobj --sframe %t.2 2>&1 | \ +# RUN: FileCheck %s --strict-whitespace --match-full-lines \ +# RUN: -DFILE=%t.2 --check-prefix=CASE2 + +## Check handling of corrupted elf files (bad sh_name) +# RUN: yaml2obj --docnum=3 %s -o %t.3 +# RUN: not llvm-readobj --sframe %t.3 2>&1 | \ +# RUN: FileCheck %s --strict-whitespace --match-full-lines \ +# RUN: -DFILE=%t.3 --check-prefix=CASE3 + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2LSB + Type: ET_EXEC +Sections: + - Name: .sframe_bad_sh_size + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ShSize: 0xfffff +# CASE1-LABEL:SFrame section '.sframe_bad_sh_size' { +# CASE1:{{.*}}: warning: '[[FILE]]': The end of the file was unexpectedly encountered + - Name: .sframe_1b + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ 0x00 ] +# CASE1-LABEL:SFrame section '.sframe_1b' { +# CASE1:{{.*}}: warning: '[[FILE]]': invalid sframe section: unexpected end of data at offset 0x1 while reading [0x0, 0x4) + + - Name: .sframe_bad_magic + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ 0xde, 0xad, 0xbe, 0xef] +# CASE1-LABEL:SFrame section '.sframe_bad_magic' { +# CASE1:{{.*}}: warning: '[[FILE]]': invalid sframe section: invalid magic number (0xadde) + + - Name: .sframe_bad_version + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xe2, 0xde, 0x01, 0x00 # Preamble (magic, version, flags) + ] +# CASE1-LABEL:SFrame section '.sframe_bad_version' { +# CASE1:{{.*}}: warning: '[[FILE]]': invalid sframe section: invalid/unsupported version number (1) + + - Name: .sframe_6b + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xe2, 0xde, 0x02, 0x00, # Preamble (magic, version, flags) + 0x01, 0x02 + ] +# CASE1-LABEL:SFrame section '.sframe_6b' { +# CASE1:{{.*}}: warning: '[[FILE]]': invalid sframe section: unexpected end of data at offset 0x6 while reading [0x0, 0x1c) + + - Name: .sframe_short_auxheader + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xe2, 0xde, 0x02, 0x06, # Preamble (magic, version, flags) + # Header: + 0x03, 0x42, 0x47, 0x08, # ABI, Fixed FP offset, Fixed RA Offset, AUX header length + 0x01, 0x00, 0x00, 0x00, # Number of FDEs + 0x10, 0x00, 0x00, 0x00, # Number of FREs + 0x00, 0x10, 0x00, 0x00, # FRE length + 0x00, 0x00, 0x00, 0x00, # FDE offset + 0x00, 0x01, 0x00, 0x00, # FRE offset + 0xde, 0xad, 0xbe, 0xef, # AUX header + ] +# CASE1-LABEL:SFrame section '.sframe_short_auxheader' { +# CASE1: Header { +# CASE1-NEXT: Magic: 0xDEE2 +# CASE1-NEXT: Version: V2 (0x2) +# CASE1-NEXT: Flags [ (0x6) +# CASE1-NEXT: FDEFuncStartPCRel (0x4){{ *}} +# CASE1-NEXT: FramePointer (0x2){{ *}} +# CASE1-NEXT: ] +# CASE1-NEXT: ABI: AMD64EndianLittle (0x3) +# CASE1-NEXT: CFA fixed FP offset (unused): 66 +# CASE1-NEXT: CFA fixed RA offset: 71 +# CASE1-NEXT: Auxiliary header length: 8 +# CASE1-NEXT: Num FDEs: 1 +# CASE1-NEXT: Num FREs: 16 +# CASE1-NEXT: FRE subsection length: 4096 +# CASE1-NEXT: FDE subsection offset: 0 +# CASE1-NEXT: FRE subsection offset: 256 +# CASE1-NEXT:{{.*}}: warning: '[[FILE]]': unexpected end of data at offset 0x20 while reading [0x1c, 0x24) +# CASE1-NEXT: } +# CASE1-NEXT:{{.*}}: warning: '[[FILE]]': unexpected end of data at offset 0x20 while reading [0x24, 0x38) +# CASE1-NEXT:} + + - Name: .sframe_header + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xe2, 0xde, 0x02, 0x06, # Preamble (magic, version, flags) + # Header: + 0x03, 0x42, 0x47, 0x04, # ABI, Fixed FP offset, Fixed RA Offset, AUX header length + 0x00, 0x00, 0x00, 0x00, # Number of FDEs + 0x10, 0x00, 0x00, 0x00, # Number of FREs + 0x00, 0x10, 0x00, 0x00, # FRE length + 0x00, 0x00, 0x00, 0x00, # FDE offset + 0x00, 0x01, 0x00, 0x00, # FRE offset + 0xde, 0xad, 0xbe, 0xef, # AUX header + ] +# CASE1-LABEL:SFrame section '.sframe_header' { +# CASE1: Header { +# CASE1-NEXT: Magic: 0xDEE2 +# CASE1-NEXT: Version: V2 (0x2) +# CASE1-NEXT: Flags [ (0x6) +# CASE1-NEXT: FDEFuncStartPCRel (0x4){{ *}} +# CASE1-NEXT: FramePointer (0x2){{ *}} +# CASE1-NEXT: ] +# CASE1-NEXT: ABI: AMD64EndianLittle (0x3) +# CASE1-NEXT: CFA fixed FP offset (unused): 66 +# CASE1-NEXT: CFA fixed RA offset: 71 +# CASE1-NEXT: Auxiliary header length: 4 +# CASE1-NEXT: Num FDEs: 0 +# CASE1-NEXT: Num FREs: 16 +# CASE1-NEXT: FRE subsection length: 4096 +# CASE1-NEXT: FDE subsection offset: 0 +# CASE1-NEXT: FRE subsection offset: 256 +# CASE1-NEXT: Auxiliary header: [0xDE, 0xAD, 0xBE, 0xEF] +# CASE1-NEXT: } +# CASE1-NEXT: Function Index [ +# CASE1-NEXT: ] +# CASE1-NEXT:} + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2MSB + Type: ET_EXEC +Sections: + - Name: .sframe + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ContentArray: [ + 0xde, 0xe2, 0x02, 0x01, # Preamble (magic, version, flags) + # Header: + 0x01, 0x42, 0x47, 0x00, # ABI, Fixed FP offset, Fixed RA Offset, AUX header length + 0x00, 0x00, 0x00, 0x00, # Number of FDEs + 0x00, 0x00, 0x00, 0x10, # Number of FREs + 0x00, 0x00, 0x10, 0x00, # FRE length + 0x00, 0x00, 0x00, 0x00, # FDE offset + 0x00, 0x00, 0x01, 0x00, # FRE offset + ] +# CASE2-LABEL:SFrame section '.sframe' { +# CASE2: Header { +# CASE2-NEXT: Magic: 0xDEE2 +# CASE2-NEXT: Version: V2 (0x2) +# CASE2-NEXT: Flags [ (0x1) +# CASE2-NEXT: FDESorted (0x1){{ *}} +# CASE2-NEXT: ] +# CASE2-NEXT: ABI: AArch64EndianBig (0x1) +# CASE2-NEXT: CFA fixed FP offset (unused): 66 +# CASE2-NEXT: CFA fixed RA offset (unused): 71 +# CASE2-NEXT: Auxiliary header length: 0 +# CASE2-NEXT: Num FDEs: 0 +# CASE2-NEXT: Num FREs: 16 +# CASE2-NEXT: FRE subsection length: 4096 +# CASE2-NEXT: FDE subsection offset: 0 +# CASE2-NEXT: FRE subsection offset: 256 +# CASE2-NEXT: Auxiliary header: [] +# CASE2-NEXT: } +# CASE2-NEXT: Function Index [ +# CASE2-NEXT: ] +# CASE2-NEXT:} + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2MSB + Type: ET_EXEC +Sections: + - Name: .corrupted + Type: SHT_GNU_SFRAME + Flags: [ SHF_ALLOC ] + ShName: 0x10000 +# CASE3:{{.*}}: error: '[[FILE]]': a section [index 1] has an invalid sh_name (0x10000) offset which goes past the end of the section name string table diff --git a/llvm/test/tools/llvm-readtapi/many-targets.test b/llvm/test/tools/llvm-readtapi/many-targets.test new file mode 100644 index 0000000..efb44b5 --- /dev/null +++ b/llvm/test/tools/llvm-readtapi/many-targets.test @@ -0,0 +1,20 @@ +; RUN: rm -rf %t +; RUN: split-file %s %t +; +; RUN: llvm-readtapi %t/many-targets.tbd +; +; Check that tbds containing symbols with many targets parse correctly (and in +; particular parse without leaks). + +;--- many-targets.tbd +--- !tapi-tbd +tbd-version: 4 +targets: [ x86_64-macos, x86_64-maccatalyst, arm64-macos, arm64-maccatalyst, + arm64e-macos, arm64e-maccatalyst, arm64-ios, arm64e-ios ] +install-name: '/usr/lib/foo.dylib' +current-version: 1 +exports: + - targets: [ x86_64-macos, x86_64-maccatalyst, arm64-macos, arm64-maccatalyst, + arm64e-macos, arm64e-maccatalyst, arm64-ios, arm64e-ios ] + symbols: [ 'foo' ] +... diff --git a/llvm/test/tools/obj2yaml/ELF/eflags.yaml b/llvm/test/tools/obj2yaml/ELF/eflags.yaml new file mode 100644 index 0000000..da16a62 --- /dev/null +++ b/llvm/test/tools/obj2yaml/ELF/eflags.yaml @@ -0,0 +1,31 @@ +## Check how obj2yaml dumps e_flags field. + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2MSB + Type: ET_EXEC + Machine: EM_SPARC32PLUS + Flags: [ [[FLAGS]] ] + +# RUN: yaml2obj -DFLAGS="EF_SPARC_32PLUS " %s -o %t2 +# RUN: obj2yaml %t2 | FileCheck %s --check-prefix=FLAG + +# FLAG: --- !ELF +# FLAG-NEXT: FileHeader: +# FLAG-NEXT: Class: ELFCLASS64 +# FLAG-NEXT: Data: ELFDATA2MSB +# FLAG-NEXT: Type: ET_EXEC +# FLAG-NEXT: Machine: EM_SPARC32PLUS +# FLAG-NEXT: Flags: [ EF_SPARC_32PLUS ] + +# RUN: yaml2obj -DFLAGS="EF_SPARC_HAL_R1 " %s -o %t3 +# RUN: obj2yaml %t3 | FileCheck %s --check-prefix=FLAG2 + +# FLAG2: --- !ELF +# FLAG2-NEXT: FileHeader: +# FLAG2-NEXT: Class: ELFCLASS64 +# FLAG2-NEXT: Data: ELFDATA2MSB +# FLAG2-NEXT: Type: ET_EXEC +# FLAG2-NEXT: Machine: EM_SPARC32PLUS +# FLAG2-NEXT: Flags: [ EF_SPARC_HAL_R1 ] diff --git a/llvm/test/tools/yaml2obj/file-header-flags.yaml b/llvm/test/tools/yaml2obj/file-header-flags.yaml new file mode 100644 index 0000000..baa101a --- /dev/null +++ b/llvm/test/tools/yaml2obj/file-header-flags.yaml @@ -0,0 +1,25 @@ +## Test for FileHeader Flags. + +## When FLAGS variable isn't defined, the e_flags value is 0. +## Otherwise, it's the specified value. + +# RUN: yaml2obj %s -o %t +# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=NO-FLAG + +# RUN: yaml2obj %s -o %t -DFLAGS=[EF_SPARC_32PLUS] +# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=FLAG + +!ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_EXEC + Machine: EM_SPARC32PLUS + Flags: [[FLAGS=<none>]] + +# NO-FLAG: Flags [ (0x0) +# NO-FLAG-NEXT: ] + +# FLAG: Flags [ (0x100) +# FLAG-NEXT: EF_SPARC_32PLUS (0x100) +# FLAG-NEXT: ] |