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-rw-r--r--llvm/test/TableGen/CompressInstEmitter/suboperands.td16
-rw-r--r--llvm/test/TableGen/RuntimeLibcallEmitter.td6
-rw-r--r--llvm/test/TableGen/SDNodeInfoEmitter/advanced.td (renamed from llvm/test/TableGen/SDNodeInfoEmitter/basic.td)97
-rw-r--r--llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td29
-rw-r--r--llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td (renamed from llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td)37
-rw-r--r--llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td50
-rw-r--r--llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td34
7 files changed, 126 insertions, 143 deletions
diff --git a/llvm/test/TableGen/CompressInstEmitter/suboperands.td b/llvm/test/TableGen/CompressInstEmitter/suboperands.td
index d83cc04..cd724e9 100644
--- a/llvm/test/TableGen/CompressInstEmitter/suboperands.td
+++ b/llvm/test/TableGen/CompressInstEmitter/suboperands.td
@@ -161,15 +161,15 @@ def : CompressPat<(BigInst3 RegsC:$dst, RegsC:$src, simm6:$imm),
// CHECK-NEXT: } // if
// CHECK-LABEL: ArchValidateMCOperandForUncompress
-// CHECK: // simm12
-// CHECK: return isInt<12>(Imm);
+// CHECK: // simm6
+// CHECK: return isInt<6>(Imm);
// CHECK-LABEL: uncompressInst
// CHECK: case Arch::SmallInst:
// CHECK-NEXT: if (MI.getOperand(0).isReg() &&
-// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsRegClassID].contains(MI.getOperand(0).getReg()) &&
+// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsCRegClassID].contains(MI.getOperand(0).getReg()) &&
// CHECK-NEXT: MI.getOperand(1).isReg() &&
-// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsRegClassID].contains(MI.getOperand(1).getReg()) &&
+// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsCRegClassID].contains(MI.getOperand(1).getReg()) &&
// CHECK-NEXT: ArchValidateMCOperandForUncompress(MI.getOperand(2), STI, 1)) {
// CHECK-NEXT: // big $dst, $addr
// CHECK-NEXT: OutInst.setOpcode(Arch::BigInst);
@@ -183,9 +183,9 @@ def : CompressPat<(BigInst3 RegsC:$dst, RegsC:$src, simm6:$imm),
// CHECK-NEXT: } // if
// CHECK: case Arch::SmallInst2:
// CHECK-NEXT: if (MI.getOperand(0).isReg() &&
-// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsRegClassID].contains(MI.getOperand(0).getReg()) &&
+// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsCRegClassID].contains(MI.getOperand(0).getReg()) &&
// CHECK-NEXT: MI.getOperand(1).isReg() &&
-// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsRegClassID].contains(MI.getOperand(1).getReg()) &&
+// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsCRegClassID].contains(MI.getOperand(1).getReg()) &&
// CHECK-NEXT: ArchValidateMCOperandForUncompress(MI.getOperand(2), STI, 1)) {
// CHECK-NEXT: // big $dst, $addr
// CHECK-NEXT: OutInst.setOpcode(Arch::BigInst2);
@@ -199,9 +199,9 @@ def : CompressPat<(BigInst3 RegsC:$dst, RegsC:$src, simm6:$imm),
// CHECK-NEXT: } // if
// CHECK: case Arch::SmallInst3:
// CHECK-NEXT: if (MI.getOperand(0).isReg() &&
-// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsRegClassID].contains(MI.getOperand(0).getReg()) &&
+// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsCRegClassID].contains(MI.getOperand(0).getReg()) &&
// CHECK-NEXT: MI.getOperand(1).isReg() &&
-// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsRegClassID].contains(MI.getOperand(1).getReg()) &&
+// CHECK-NEXT: ArchMCRegisterClasses[Arch::RegsCRegClassID].contains(MI.getOperand(1).getReg()) &&
// CHECK-NEXT: ArchValidateMCOperandForUncompress(MI.getOperand(2), STI, 1)) {
// CHECK-NEXT: // big $dst, $src, $imm
// CHECK-NEXT: OutInst.setOpcode(Arch::BigInst3);
diff --git a/llvm/test/TableGen/RuntimeLibcallEmitter.td b/llvm/test/TableGen/RuntimeLibcallEmitter.td
index 579e3c7..783a861 100644
--- a/llvm/test/TableGen/RuntimeLibcallEmitter.td
+++ b/llvm/test/TableGen/RuntimeLibcallEmitter.td
@@ -95,8 +95,8 @@ def BlahLibrary : SystemRuntimeLibrary<isBlahArch, (add calloc, LibraryWithCondi
// CHECK-NEXT: __lshrdi3 = 4, // __lshrdi3
// CHECK-NEXT: bzero = 5, // bzero
// CHECK-NEXT: calloc = 6, // calloc
-// CHECK-NEXT: sqrtl_f80 = 7, // sqrtl
-// CHECK-NEXT: sqrtl_f128 = 8, // sqrtl
+// CHECK-NEXT: sqrtl_f128 = 7, // sqrtl
+// CHECK-NEXT: sqrtl_f80 = 8, // sqrtl
// CHECK-NEXT: NumLibcallImpls = 9
// CHECK-NEXT: };
// CHECK-NEXT: } // End namespace RTLIB
@@ -157,8 +157,8 @@ def BlahLibrary : SystemRuntimeLibrary<isBlahArch, (add calloc, LibraryWithCondi
// CHECK-NEXT: RTLIB::SRL_I64, // RTLIB::__lshrdi3
// CHECK-NEXT: RTLIB::BZERO, // RTLIB::bzero
// CHECK-NEXT: RTLIB::CALLOC, // RTLIB::calloc
-// CHECK-NEXT: RTLIB::SQRT_F80, // RTLIB::sqrtl_f80
// CHECK-NEXT: RTLIB::SQRT_F128, // RTLIB::sqrtl_f128
+// CHECK-NEXT: RTLIB::SQRT_F80, // RTLIB::sqrtl_f80
// CHECK-NEXT: };
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/basic.td b/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
index 2b4c76a..d7eeaba 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/basic.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
@@ -1,99 +1,4 @@
-// RUN: split-file %s %t
-
-//--- no-nodes.td
-// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/no-nodes.td \
-// RUN: | FileCheck %t/no-nodes.td
-
-include "llvm/Target/Target.td"
-
-def MyTarget : Target;
-
-// CHECK: #ifdef GET_SDNODE_ENUM
-// CHECK-NEXT: #undef GET_SDNODE_ENUM
-// CHECK-EMPTY:
-// CHECK-NEXT: namespace llvm::MyTargetISD {
-// CHECK-EMPTY:
-// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
-// CHECK-EMPTY:
-// CHECK-NEXT: } // namespace llvm::MyTargetISD
-// CHECK-EMPTY:
-// CHECK-NEXT: #endif // GET_SDNODE_ENUM
-// CHECK-EMPTY:
-// CHECK-NEXT: #ifdef GET_SDNODE_DESC
-// CHECK-NEXT: #undef GET_SDNODE_DESC
-// CHECK-EMPTY:
-// CHECK-NEXT: namespace llvm {
-// CHECK-EMPTY:
-// CHECK-NEXT: #ifdef __GNUC__
-// CHECK-NEXT: #pragma GCC diagnostic push
-// CHECK-NEXT: #pragma GCC diagnostic ignored "-Woverlength-strings"
-// CHECK-NEXT: #endif
-// CHECK-NEXT: static constexpr char MyTargetSDNodeNamesStorage[] =
-// CHECK-NEXT: "\0"
-// CHECK-NEXT: ;
-// CHECK-NEXT: #ifdef __GNUC__
-// CHECK-NEXT: #pragma GCC diagnostic pop
-// CHECK-NEXT: #endif
-// CHECK-EMPTY:
-// CHECK-NEXT: static constexpr llvm::StringTable
-// CHECK-NEXT: MyTargetSDNodeNames = MyTargetSDNodeNamesStorage;
-// CHECK-EMPTY:
-// CHECK-NEXT: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
-// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
-// CHECK-NEXT: };
-// CHECK-EMPTY:
-// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
-// CHECK-NEXT: };
-// CHECK-EMPTY:
-// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
-// CHECK-NEXT: /*NumOpcodes=*/0, MyTargetSDNodeDescs,
-// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
-// CHECK-EMPTY:
-// CHECK-NEXT: } // namespace llvm
-// CHECK-EMPTY:
-// CHECK-NEXT: #endif // GET_SDNODE_DESC
-
-
-//--- trivial-node.td
-// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/trivial-node.td \
-// RUN: | FileCheck %t/trivial-node.td
-
-include "llvm/Target/Target.td"
-
-def MyTarget : Target;
-
-def my_noop : SDNode<"MyTargetISD::NOOP", SDTypeProfile<0, 0, []>>;
-
-// CHECK: namespace llvm::MyTargetISD {
-// CHECK-EMPTY:
-// CHECK-NEXT: enum GenNodeType : unsigned {
-// CHECK-NEXT: NOOP = ISD::BUILTIN_OP_END,
-// CHECK-NEXT: };
-// CHECK-EMPTY:
-// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NOOP + 1;
-// CHECK-EMPTY:
-// CHECK-NEXT: } // namespace llvm::MyTargetISD
-
-// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
-// CHECK-NEXT: "\0"
-// CHECK-NEXT: "MyTargetISD::NOOP\0"
-// CHECK-NEXT: ;
-
-// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
-// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
-// CHECK-NEXT: };
-// CHECK-EMPTY:
-// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
-// CHECK-NEXT: {0, 0, 0, 0, 0, 1, 0, 0}, // NOOP
-// CHECK-NEXT: };
-// CHECK-EMPTY:
-// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
-// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
-// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
-
-//--- advanced.td
-// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/advanced.td \
-// RUN: | FileCheck %t/advanced.td
+// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s | FileCheck %s
include "llvm/Target/Target.td"
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td b/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
new file mode 100644
index 0000000..8b86f93
--- /dev/null
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
@@ -0,0 +1,29 @@
+// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s | FileCheck %s
+
+include "llvm/Target/Target.td"
+
+def MyTarget : Target;
+
+def my_node_a : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
+def my_node_b : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, f32>]>>;
+
+// CHECK: enum GenNodeType : unsigned {
+// CHECK-NEXT: NODE = ISD::BUILTIN_OP_END,
+// CHECK-NEXT: };
+
+// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
+// CHECK-NEXT: "\0"
+// CHECK-NEXT: "MyTargetISD::NODE\0"
+// CHECK-NEXT: ;
+
+// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
+// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
+// CHECK-NEXT: };
+// CHECK-EMPTY:
+// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
+// CHECK-NEXT: {1, 0, 0, 0, 0, 1, 0, 0}, // NODE
+// CHECK-NEXT: };
+// CHECK-EMPTY:
+// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
+// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
+// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td b/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
index c09e219..29429e9 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
@@ -1,39 +1,4 @@
-// RUN: split-file %s %t
-
-//--- test1.td
-// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/test1.td | FileCheck %t/test1.td
-
-include "llvm/Target/Target.td"
-
-def MyTarget : Target;
-
-def my_node_a : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
-def my_node_b : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, f32>]>>;
-
-// CHECK: enum GenNodeType : unsigned {
-// CHECK-NEXT: NODE = ISD::BUILTIN_OP_END,
-// CHECK-NEXT: };
-
-// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
-// CHECK-NEXT: "\0"
-// CHECK-NEXT: "MyTargetISD::NODE\0"
-// CHECK-NEXT: ;
-
-// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
-// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
-// CHECK-NEXT: };
-// CHECK-EMPTY:
-// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
-// CHECK-NEXT: {1, 0, 0, 0, 0, 1, 0, 0}, // NODE
-// CHECK-NEXT: };
-// CHECK-EMPTY:
-// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
-// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
-// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
-
-
-//--- test2.td
-// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/test2.td | FileCheck %t/test2.td
+// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s | FileCheck %s
include "llvm/Target/Target.td"
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td b/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
new file mode 100644
index 0000000..0c5c63d
--- /dev/null
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
@@ -0,0 +1,50 @@
+// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s | FileCheck %s
+
+include "llvm/Target/Target.td"
+
+def MyTarget : Target;
+
+// CHECK: #ifdef GET_SDNODE_ENUM
+// CHECK-NEXT: #undef GET_SDNODE_ENUM
+// CHECK-EMPTY:
+// CHECK-NEXT: namespace llvm::MyTargetISD {
+// CHECK-EMPTY:
+// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
+// CHECK-EMPTY:
+// CHECK-NEXT: } // namespace llvm::MyTargetISD
+// CHECK-EMPTY:
+// CHECK-NEXT: #endif // GET_SDNODE_ENUM
+// CHECK-EMPTY:
+// CHECK-NEXT: #ifdef GET_SDNODE_DESC
+// CHECK-NEXT: #undef GET_SDNODE_DESC
+// CHECK-EMPTY:
+// CHECK-NEXT: namespace llvm {
+// CHECK-EMPTY:
+// CHECK-NEXT: #ifdef __GNUC__
+// CHECK-NEXT: #pragma GCC diagnostic push
+// CHECK-NEXT: #pragma GCC diagnostic ignored "-Woverlength-strings"
+// CHECK-NEXT: #endif
+// CHECK-NEXT: static constexpr char MyTargetSDNodeNamesStorage[] =
+// CHECK-NEXT: "\0"
+// CHECK-NEXT: ;
+// CHECK-NEXT: #ifdef __GNUC__
+// CHECK-NEXT: #pragma GCC diagnostic pop
+// CHECK-NEXT: #endif
+// CHECK-EMPTY:
+// CHECK-NEXT: static constexpr llvm::StringTable
+// CHECK-NEXT: MyTargetSDNodeNames = MyTargetSDNodeNamesStorage;
+// CHECK-EMPTY:
+// CHECK-NEXT: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
+// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
+// CHECK-NEXT: };
+// CHECK-EMPTY:
+// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
+// CHECK-NEXT: };
+// CHECK-EMPTY:
+// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
+// CHECK-NEXT: /*NumOpcodes=*/0, MyTargetSDNodeDescs,
+// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
+// CHECK-EMPTY:
+// CHECK-NEXT: } // namespace llvm
+// CHECK-EMPTY:
+// CHECK-NEXT: #endif // GET_SDNODE_DESC
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td b/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
new file mode 100644
index 0000000..4bdc70a
--- /dev/null
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
@@ -0,0 +1,34 @@
+// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s | FileCheck %s
+
+include "llvm/Target/Target.td"
+
+def MyTarget : Target;
+
+def my_noop : SDNode<"MyTargetISD::NOOP", SDTypeProfile<0, 0, []>>;
+
+// CHECK: namespace llvm::MyTargetISD {
+// CHECK-EMPTY:
+// CHECK-NEXT: enum GenNodeType : unsigned {
+// CHECK-NEXT: NOOP = ISD::BUILTIN_OP_END,
+// CHECK-NEXT: };
+// CHECK-EMPTY:
+// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NOOP + 1;
+// CHECK-EMPTY:
+// CHECK-NEXT: } // namespace llvm::MyTargetISD
+
+// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
+// CHECK-NEXT: "\0"
+// CHECK-NEXT: "MyTargetISD::NOOP\0"
+// CHECK-NEXT: ;
+
+// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
+// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
+// CHECK-NEXT: };
+// CHECK-EMPTY:
+// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
+// CHECK-NEXT: {0, 0, 0, 0, 0, 1, 0, 0}, // NOOP
+// CHECK-NEXT: };
+// CHECK-EMPTY:
+// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
+// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
+// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
generated by cgit v1.1 at 2025-07-28 18:37:16 +0000