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-rw-r--r--llvm/test/CodeGen/NVPTX/f16x2-instructions.ll3
-rw-r--r--llvm/test/CodeGen/NVPTX/f32x2-instructions.ll6
2 files changed, 6 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/NVPTX/f16x2-instructions.ll b/llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
index a077ca1..8918fbd 100644
--- a/llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
+++ b/llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
@@ -1504,7 +1504,8 @@ define <2 x half> @test_fptrunc_2xfloat(<2 x float> %a) #0 {
; CHECK-NEXT: .reg .b64 %rd<2>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
-; CHECK-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_fptrunc_2xfloat_param_0];
+; CHECK-NEXT: ld.param.b64 %rd1, [test_fptrunc_2xfloat_param_0];
+; CHECK-NEXT: mov.b64 {%r1, %r2}, %rd1;
; CHECK-NEXT: cvt.rn.f16.f32 %rs1, %r2;
; CHECK-NEXT: cvt.rn.f16.f32 %rs2, %r1;
; CHECK-NEXT: mov.b32 %r3, {%rs2, %rs1};
diff --git a/llvm/test/CodeGen/NVPTX/f32x2-instructions.ll b/llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
index 2109449..30afd69 100644
--- a/llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
+++ b/llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
@@ -2116,7 +2116,8 @@ define void @test_trunc_to_v2bf16(<2 x float> %a, ptr %p) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd2, [test_trunc_to_v2bf16_param_1];
-; CHECK-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_trunc_to_v2bf16_param_0];
+; CHECK-NEXT: ld.param.b64 %rd1, [test_trunc_to_v2bf16_param_0];
+; CHECK-NEXT: mov.b64 {%r1, %r2}, %rd1;
; CHECK-NEXT: cvt.rn.bf16x2.f32 %r3, %r2, %r1;
; CHECK-NEXT: st.b32 [%rd2], %r3;
; CHECK-NEXT: ret;
@@ -2133,7 +2134,8 @@ define void @test_trunc_to_v2f16(<2 x float> %a, ptr %p) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd2, [test_trunc_to_v2f16_param_1];
-; CHECK-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_trunc_to_v2f16_param_0];
+; CHECK-NEXT: ld.param.b64 %rd1, [test_trunc_to_v2f16_param_0];
+; CHECK-NEXT: mov.b64 {%r1, %r2}, %rd1;
; CHECK-NEXT: cvt.rn.f16x2.f32 %r3, %r2, %r1;
; CHECK-NEXT: st.b32 [%rd2], %r3;
; CHECK-NEXT: ret;