diff options
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly')
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/libcall_vectorized.ll | 33 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/ref-test-func.ll | 146 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/removed-terminator.ll | 26 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/returned.ll | 24 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/target-features-cpus.ll | 7 |
5 files changed, 234 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/libcall_vectorized.ll b/llvm/test/CodeGen/WebAssembly/libcall_vectorized.ll new file mode 100644 index 0000000..2d1056f --- /dev/null +++ b/llvm/test/CodeGen/WebAssembly/libcall_vectorized.ll @@ -0,0 +1,33 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 + +; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+simd128 | FileCheck %s + +target triple = "wasm32-unknown-unknown" + +declare <4 x float> @llvm.exp10.v4f32(<4 x float>) + +define <4 x float> @exp10_f32v4(<4 x float> %v) { +; CHECK-LABEL: exp10_f32v4: +; CHECK: .functype exp10_f32v4 (v128) -> (v128) +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get $push12=, 0 +; CHECK-NEXT: f32x4.extract_lane $push0=, $pop12, 0 +; CHECK-NEXT: call $push1=, exp10f, $pop0 +; CHECK-NEXT: f32x4.splat $push2=, $pop1 +; CHECK-NEXT: local.get $push13=, 0 +; CHECK-NEXT: f32x4.extract_lane $push3=, $pop13, 1 +; CHECK-NEXT: call $push4=, exp10f, $pop3 +; CHECK-NEXT: f32x4.replace_lane $push5=, $pop2, 1, $pop4 +; CHECK-NEXT: local.get $push14=, 0 +; CHECK-NEXT: f32x4.extract_lane $push6=, $pop14, 2 +; CHECK-NEXT: call $push7=, exp10f, $pop6 +; CHECK-NEXT: f32x4.replace_lane $push8=, $pop5, 2, $pop7 +; CHECK-NEXT: local.get $push15=, 0 +; CHECK-NEXT: f32x4.extract_lane $push9=, $pop15, 3 +; CHECK-NEXT: call $push10=, exp10f, $pop9 +; CHECK-NEXT: f32x4.replace_lane $push11=, $pop8, 3, $pop10 +; CHECK-NEXT: return $pop11 +entry: + %r = call <4 x float> @llvm.exp10.v4f32(<4 x float> %v) + ret <4 x float> %r +} diff --git a/llvm/test/CodeGen/WebAssembly/ref-test-func.ll b/llvm/test/CodeGen/WebAssembly/ref-test-func.ll new file mode 100644 index 0000000..ea2453f --- /dev/null +++ b/llvm/test/CodeGen/WebAssembly/ref-test-func.ll @@ -0,0 +1,146 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc < %s --mtriple=wasm32-unknown-unknown -mcpu=mvp -mattr=+reference-types -mattr=+gc -verify-machineinstrs | FileCheck --check-prefixes CHECK,CHK32 %s +; RUN: llc < %s --mtriple=wasm64-unknown-unknown -mcpu=mvp -mattr=+reference-types -mattr=+gc -verify-machineinstrs | FileCheck --check-prefixes CHECK,CHK64 %s + +define void @test_fpsig_void_void(ptr noundef %func) local_unnamed_addr #0 { +; CHECK-LABEL: test_fpsig_void_void: +; CHK32: .functype test_fpsig_void_void (i32) -> () +; CHK64: .functype test_fpsig_void_void (i64) -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get 0 +; CHK64-NEXT: i32.wrap_i64 +; CHECK-NEXT: table.get __indirect_function_table +; CHECK-NEXT: ref.test () -> () +; CHECK-NEXT: call use +; CHECK-NEXT: # fallthrough-return +entry: + %res = tail call i32 (ptr, ...) @llvm.wasm.ref.test.func(ptr %func) + tail call void @use(i32 noundef %res) #3 + ret void +} + +define void @test_fpsig_return_i32(ptr noundef %func) local_unnamed_addr #0 { +; CHECK-LABEL: test_fpsig_return_i32: +; CHK32: .functype test_fpsig_return_i32 (i32) -> () +; CHK64: .functype test_fpsig_return_i32 (i64) -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get 0 +; CHK64-NEXT: i32.wrap_i64 +; CHECK-NEXT: table.get __indirect_function_table +; CHECK-NEXT: ref.test () -> (i32) +; CHECK-NEXT: call use +; CHECK-NEXT: # fallthrough-return +entry: + %res = tail call i32 (ptr, ...) @llvm.wasm.ref.test.func(ptr %func, i32 0) + tail call void @use(i32 noundef %res) #3 + ret void +} + +define void @test_fpsig_return_i64(ptr noundef %func) local_unnamed_addr #0 { +; CHECK-LABEL: test_fpsig_return_i64: +; CHK32: .functype test_fpsig_return_i64 (i32) -> () +; CHK64: .functype test_fpsig_return_i64 (i64) -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get 0 +; CHK64-NEXT: i32.wrap_i64 +; CHECK-NEXT: table.get __indirect_function_table +; CHECK-NEXT: ref.test () -> (i64) +; CHECK-NEXT: call use +; CHECK-NEXT: # fallthrough-return +entry: + %res = tail call i32 (ptr, ...) @llvm.wasm.ref.test.func(ptr %func, i64 0) + tail call void @use(i32 noundef %res) #3 + ret void +} + +define void @test_fpsig_return_f32(ptr noundef %func) local_unnamed_addr #0 { +; CHECK-LABEL: test_fpsig_return_f32: +; CHK32: .functype test_fpsig_return_f32 (i32) -> () +; CHK64: .functype test_fpsig_return_f32 (i64) -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get 0 +; CHK64-NEXT: i32.wrap_i64 +; CHECK-NEXT: table.get __indirect_function_table +; CHECK-NEXT: ref.test () -> (f32) +; CHECK-NEXT: call use +; CHECK-NEXT: # fallthrough-return +entry: + %res = tail call i32 (ptr, ...) @llvm.wasm.ref.test.func(ptr %func, float 0.) + tail call void @use(i32 noundef %res) #3 + ret void +} + +define void @test_fpsig_return_f64(ptr noundef %func) local_unnamed_addr #0 { +; CHECK-LABEL: test_fpsig_return_f64: +; CHK32: .functype test_fpsig_return_f64 (i32) -> () +; CHK64: .functype test_fpsig_return_f64 (i64) -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get 0 +; CHK64-NEXT: i32.wrap_i64 +; CHECK-NEXT: table.get __indirect_function_table +; CHECK-NEXT: ref.test () -> (f64) +; CHECK-NEXT: call use +; CHECK-NEXT: # fallthrough-return +entry: + %res = tail call i32 (ptr, ...) @llvm.wasm.ref.test.func(ptr %func, double 0.) + tail call void @use(i32 noundef %res) #3 + ret void +} + + +define void @test_fpsig_param_i32(ptr noundef %func) local_unnamed_addr #0 { +; CHECK-LABEL: test_fpsig_param_i32: +; CHK32: .functype test_fpsig_param_i32 (i32) -> () +; CHK64: .functype test_fpsig_param_i32 (i64) -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get 0 +; CHK64-NEXT: i32.wrap_i64 +; CHECK-NEXT: table.get __indirect_function_table +; CHECK-NEXT: ref.test (f64) -> () +; CHECK-NEXT: call use +; CHECK-NEXT: # fallthrough-return +entry: + %res = tail call i32 (ptr, ...) @llvm.wasm.ref.test.func(ptr %func, token poison, double 0.) + tail call void @use(i32 noundef %res) #3 + ret void +} + + +define void @test_fpsig_multiple_params_and_returns(ptr noundef %func) local_unnamed_addr #0 { +; CHECK-LABEL: test_fpsig_multiple_params_and_returns: +; CHK32: .functype test_fpsig_multiple_params_and_returns (i32) -> () +; CHK64: .functype test_fpsig_multiple_params_and_returns (i64) -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get 0 +; CHK64-NEXT: i32.wrap_i64 +; CHECK-NEXT: table.get __indirect_function_table +; CHECK-NEXT: ref.test (i64, f32, i64) -> (i32, i64, f32, f64) +; CHECK-NEXT: call use +; CHECK-NEXT: # fallthrough-return +entry: + %res = tail call i32 (ptr, ...) @llvm.wasm.ref.test.func(ptr %func, i32 0, i64 0, float 0., double 0., token poison, i64 0, float 0., i64 0) + tail call void @use(i32 noundef %res) #3 + ret void +} + + +define void @test_fpsig_ptrs(ptr noundef %func) local_unnamed_addr #0 { +; CHECK-LABEL: test_fpsig_ptrs: +; CHK32: .functype test_fpsig_ptrs (i32) -> () +; CHK64: .functype test_fpsig_ptrs (i64) -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: local.get 0 +; CHK64-NEXT: i32.wrap_i64 +; CHECK-NEXT: table.get __indirect_function_table +; CHK32-NEXT: ref.test (i32, i32) -> (i32) +; CHK64-NEXT: ref.test (i64, i64) -> (i64) +; CHECK-NEXT: call use +; CHECK-NEXT: # fallthrough-return +entry: + %res = tail call i32 (ptr, ...) @llvm.wasm.ref.test.func(ptr %func, ptr null, token poison, ptr null, ptr null) + tail call void @use(i32 noundef %res) #3 + ret void +} + + +declare void @use(i32 noundef) local_unnamed_addr #1 diff --git a/llvm/test/CodeGen/WebAssembly/removed-terminator.ll b/llvm/test/CodeGen/WebAssembly/removed-terminator.ll new file mode 100644 index 0000000..188f6f6 --- /dev/null +++ b/llvm/test/CodeGen/WebAssembly/removed-terminator.ll @@ -0,0 +1,26 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -O0 -verify-machineinstrs < %s | FileCheck %s + +target triple = "wasm32-unknown-unknown" + +define void @test(i1 %x) { +; CHECK-LABEL: test: +; CHECK: .functype test (i32) -> () +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get 0 +; CHECK-NEXT: i32.const -1 +; CHECK-NEXT: i32.xor +; CHECK-NEXT: i32.const 1 +; CHECK-NEXT: i32.and +; CHECK-NEXT: drop +; CHECK-NEXT: # %bb.1: # %exit +; CHECK-NEXT: return + %y = xor i1 %x, true + ; This br_if's operand (%y) is stackified in RegStackify. But this terminator + ; will be removed in CFGSort after that. We need to make sure we unstackify %y + ; so that it can be dropped in ExplicitLocals. + br i1 %y, label %exit, label %exit + +exit: + ret void +} diff --git a/llvm/test/CodeGen/WebAssembly/returned.ll b/llvm/test/CodeGen/WebAssembly/returned.ll index e767e29..aef75d8 100644 --- a/llvm/test/CodeGen/WebAssembly/returned.ll +++ b/llvm/test/CodeGen/WebAssembly/returned.ll @@ -80,3 +80,27 @@ define i32 @test_second_arg(i32 %a, i32 %b) { %call = call i32 @do_something_else(i32 %a, i32 %b) ret i32 %b } + +define void @test() { +; CHECK-LABEL: test: +; CHECK: .functype test () -> () +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: global.get $push0=, __stack_pointer +; CHECK-NEXT: i32.const $push1=, 16 +; CHECK-NEXT: i32.sub $push7=, $pop0, $pop1 +; CHECK-NEXT: local.tee $push6=, $0=, $pop7 +; CHECK-NEXT: global.set __stack_pointer, $pop6 +; CHECK-NEXT: i32.const $push4=, 12 +; CHECK-NEXT: i32.add $push5=, $0, $pop4 +; CHECK-NEXT: call $drop=, returns_arg, $pop5 +; CHECK-NEXT: i32.const $push2=, 16 +; CHECK-NEXT: i32.add $push3=, $0, $pop2 +; CHECK-NEXT: global.set __stack_pointer, $pop3 +; CHECK-NEXT: return +entry: + %a = alloca i32 + call void @llvm.lifetime.start.p0(i64 4, ptr %a) + %ret = call ptr @returns_arg(ptr %a) + call void @llvm.lifetime.end.p0(i64 4, ptr %a) + ret void +} diff --git a/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll b/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll index 1c77ad5..60cfc27 100644 --- a/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll +++ b/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll @@ -70,9 +70,9 @@ target triple = "wasm32-unknown-unknown" ; +call-indirect-overlong, +exception-handling, ; +extended-const, +fp16, +multimemory, +multivalue, ; +mutable-globals, +nontrapping-fptoint, +relaxed-simd, -; +reference-types, +simd128, +sign-ext, +tail-call +; +reference-types, +simd128, +sign-ext, +tail-call, +gc ; BLEEDING-EDGE-LABEL: .section .custom_section.target_features,"",@ -; BLEEDING-EDGE-NEXT: .int8 16 +; BLEEDING-EDGE-NEXT: .int8 17 ; BLEEDING-EDGE-NEXT: .int8 43 ; BLEEDING-EDGE-NEXT: .int8 7 ; BLEEDING-EDGE-NEXT: .ascii "atomics" @@ -95,6 +95,9 @@ target triple = "wasm32-unknown-unknown" ; BLEEDING-EDGE-NEXT: .int8 4 ; BLEEDING-EDGE-NEXT: .ascii "fp16" ; BLEEDING-EDGE-NEXT: .int8 43 +; BLEEDING-EDGE-NEXT: .int8 2 +; BLEEDING-EDGE-NEXT: .ascii "gc" +; BLEEDING-EDGE-NEXT: .int8 43 ; BLEEDING-EDGE-NEXT: .int8 11 ; BLEEDING-EDGE-NEXT: .ascii "multimemory" ; BLEEDING-EDGE-NEXT: .int8 43 |