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-rw-r--r--llvm/test/CodeGen/RISCV/select.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/RISCV/select.ll b/llvm/test/CodeGen/RISCV/select.ll
index 0ea80bf..2e1784d 100644
--- a/llvm/test/CodeGen/RISCV/select.ll
+++ b/llvm/test/CodeGen/RISCV/select.ll
@@ -647,7 +647,7 @@ define i32 @select_add_1(i1 zeroext %cond, i32 %a, i32 %b) {
;
; RV64IM-LABEL: select_add_1:
; RV64IM: # %bb.0: # %entry
-; RV64IM-NEXT: negw a0, a0
+; RV64IM-NEXT: neg a0, a0
; RV64IM-NEXT: and a0, a0, a1
; RV64IM-NEXT: addw a0, a2, a0
; RV64IM-NEXT: ret