diff options
Diffstat (limited to 'llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll')
-rw-r--r-- | llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll b/llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll index 183741d..b6921ab 100644 --- a/llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll +++ b/llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll @@ -1144,3 +1144,37 @@ define <vscale x 2 x double> @vpmerge_vfwsub.w_tied(<vscale x 2 x double> %passt %b = call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> %mask, <vscale x 2 x double> %a, <vscale x 2 x double> %passthru, i32 %vl) ret <vscale x 2 x double> %b } + +define <vscale x 2 x i32> @true_tied_dest_vmerge_implicit_passthru(<vscale x 2 x i32> %passthru, <vscale x 2 x i32> %x, <vscale x 2 x i32> %y, <vscale x 2 x i1> %m, i64 %avl) { +; CHECK-LABEL: true_tied_dest_vmerge_implicit_passthru: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, mu +; CHECK-NEXT: vmacc.vv v8, v9, v10, v0.t +; CHECK-NEXT: ret + %a = call <vscale x 2 x i32> @llvm.riscv.vmacc.nxv2i32.nxv2i32(<vscale x 2 x i32> %passthru, <vscale x 2 x i32> %x, <vscale x 2 x i32> %y, i64 %avl, i64 0) + %b = call <vscale x 2 x i32> @llvm.riscv.vmerge.nxv2i32.nxv2i32( + <vscale x 2 x i32> poison, + <vscale x 2 x i32> %passthru, + <vscale x 2 x i32> %a, + <vscale x 2 x i1> %m, + i64 %avl + ) + ret <vscale x 2 x i32> %b +} + +define <vscale x 2 x i32> @true_mask_vmerge_implicit_passthru(<vscale x 2 x i32> %passthru, <vscale x 2 x i32> %x, <vscale x 2 x i32> %y, <vscale x 2 x i1> %m, i64 %avl) { +; CHECK-LABEL: true_mask_vmerge_implicit_passthru: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, mu +; CHECK-NEXT: vadd.vv v8, v9, v10, v0.t +; CHECK-NEXT: ret + %a = call <vscale x 2 x i32> @llvm.riscv.vadd.mask.nxv2i32.nxv2i32(<vscale x 2 x i32> %passthru, <vscale x 2 x i32> %x, <vscale x 2 x i32> %y, <vscale x 2 x i1> %m, i64 %avl, i64 0) + %b = call <vscale x 2 x i32> @llvm.riscv.vmerge.nxv2i32.nxv2i32( + <vscale x 2 x i32> poison, + <vscale x 2 x i32> %passthru, + <vscale x 2 x i32> %a, + <vscale x 2 x i1> shufflevector(<vscale x 2 x i1> insertelement(<vscale x 2 x i1> poison, i1 true, i32 0), <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer), + i64 %avl + ) + ret <vscale x 2 x i32> %b +} |