diff options
Diffstat (limited to 'llvm/test/CodeGen/Mips')
8 files changed, 1066 insertions, 840 deletions
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir b/llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir index 3d6a243..22fd220 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir @@ -40,16 +40,17 @@ body: | ; MIPS32-LABEL: name: test_memcpy_inline ; MIPS32: liveins: $a0, $a1 - ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 - ; MIPS32: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY1]](p0) :: (load (s8) from %ir.1, align 4) - ; MIPS32: G_STORE [[LOAD]](s8), [[COPY]](p0) :: (store (s8) into %ir.0, align 4) - ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 - ; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C]](s32) - ; MIPS32: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p0) :: (load (s8) from %ir.1 + 1, basealign 4) - ; MIPS32: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32) - ; MIPS32: G_STORE [[LOAD1]](s8), [[PTR_ADD1]](p0) :: (store (s8) into %ir.0 + 1, basealign 4) - ; MIPS32: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY1]](p0) :: (load (s8) from %ir.1, align 4) + ; MIPS32-NEXT: G_STORE [[LOAD]](s8), [[COPY]](p0) :: (store (s8) into %ir.0, align 4) + ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[COPY1]], [[C]](s32) + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p0) :: (load (s8) from %ir.1 + 1, basealign 4) + ; MIPS32-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[COPY]], [[C]](s32) + ; MIPS32-NEXT: G_STORE [[LOAD1]](s8), [[PTR_ADD1]](p0) :: (store (s8) into %ir.0 + 1, basealign 4) + ; MIPS32-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(s64) = G_CONSTANT i64 2 diff --git a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir index ef607c1..f3c7208 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir @@ -21,10 +21,11 @@ body: | ; MIPS32-LABEL: name: load_i32 ; MIPS32: liveins: $a0 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.ptr) - ; MIPS32: $v0 = COPY [[LOAD]](s32) - ; MIPS32: RetRA implicit $v0 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.ptr) + ; MIPS32-NEXT: $v0 = COPY [[LOAD]](s32) + ; MIPS32-NEXT: RetRA implicit $v0 %0:_(p0) = COPY $a0 %1:_(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.ptr) $v0 = COPY %1(s32) @@ -42,14 +43,15 @@ body: | ; MIPS32-LABEL: name: load_i64 ; MIPS32: liveins: $a0 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.ptr, align 8) - ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY]], [[C]](s32) - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %ir.ptr + 4, basealign 8) - ; MIPS32: $v0 = COPY [[LOAD]](s32) - ; MIPS32: $v1 = COPY [[LOAD1]](s32) - ; MIPS32: RetRA implicit $v0, implicit $v1 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.ptr, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[COPY]], [[C]](s32) + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %ir.ptr + 4, basealign 8) + ; MIPS32-NEXT: $v0 = COPY [[LOAD]](s32) + ; MIPS32-NEXT: $v1 = COPY [[LOAD1]](s32) + ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1 %0:_(p0) = COPY $a0 %1:_(s64) = G_LOAD %0(p0) :: (load (s64) from %ir.ptr) %2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64) @@ -69,11 +71,12 @@ body: | ; MIPS32-LABEL: name: load_ambiguous_i64_in_fpr ; MIPS32: liveins: $a0, $a1 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 - ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY]](p0) :: (load (s64) from %ir.i64_ptr_a) - ; MIPS32: G_STORE [[LOAD]](s64), [[COPY1]](p0) :: (store (s64) into %ir.i64_ptr_b) - ; MIPS32: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY]](p0) :: (load (s64) from %ir.i64_ptr_a) + ; MIPS32-NEXT: G_STORE [[LOAD]](s64), [[COPY1]](p0) :: (store (s64) into %ir.i64_ptr_b) + ; MIPS32-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(s64) = G_LOAD %0(p0) :: (load (s64) from %ir.i64_ptr_a) @@ -92,10 +95,11 @@ body: | ; MIPS32-LABEL: name: load_float ; MIPS32: liveins: $a0 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 - ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.ptr) - ; MIPS32: $f0 = COPY [[LOAD]](s32) - ; MIPS32: RetRA implicit $f0 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.ptr) + ; MIPS32-NEXT: $f0 = COPY [[LOAD]](s32) + ; MIPS32-NEXT: RetRA implicit $f0 %0:_(p0) = COPY $a0 %1:_(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.ptr) $f0 = COPY %1(s32) @@ -113,11 +117,12 @@ body: | ; MIPS32-LABEL: name: load_ambiguous_float_in_gpr ; MIPS32: liveins: $a0, $a1 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.float_ptr_a) - ; MIPS32: G_STORE [[LOAD]](s32), [[COPY1]](p0) :: (store (s32) into %ir.float_ptr_b) - ; MIPS32: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.float_ptr_a) + ; MIPS32-NEXT: G_STORE [[LOAD]](s32), [[COPY1]](p0) :: (store (s32) into %ir.float_ptr_b) + ; MIPS32-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.float_ptr_a) @@ -136,10 +141,11 @@ body: | ; MIPS32-LABEL: name: load_double ; MIPS32: liveins: $a0 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 - ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY]](p0) :: (load (s64) from %ir.ptr) - ; MIPS32: $d0 = COPY [[LOAD]](s64) - ; MIPS32: RetRA implicit $d0 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY]](p0) :: (load (s64) from %ir.ptr) + ; MIPS32-NEXT: $d0 = COPY [[LOAD]](s64) + ; MIPS32-NEXT: RetRA implicit $d0 %0:_(p0) = COPY $a0 %1:_(s64) = G_LOAD %0(p0) :: (load (s64) from %ir.ptr) $d0 = COPY %1(s64) diff --git a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir index 4226f2b..c79cc00 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir @@ -251,93 +251,117 @@ fixedStack: body: | ; MIPS32-LABEL: name: long_chain_ambiguous_i64_in_fpr ; MIPS32: bb.0.entry: - ; MIPS32: successors: %bb.8(0x40000000), %bb.1(0x40000000) - ; MIPS32: liveins: $a0, $a1, $a2, $a3 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 - ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 - ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) - ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) - ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 - ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) - ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] - ; MIPS32: G_BRCOND [[AND]](s32), %bb.8 - ; MIPS32: bb.1.pre.PHI.1: - ; MIPS32: successors: %bb.4(0x40000000), %bb.2(0x40000000) - ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C1]] - ; MIPS32: G_BRCOND [[AND1]](s32), %bb.4 - ; MIPS32: bb.2.pre.PHI.1.0: - ; MIPS32: successors: %bb.5(0x40000000), %bb.3(0x40000000) - ; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C2]] - ; MIPS32: G_BRCOND [[AND2]](s32), %bb.5 - ; MIPS32: bb.3.b.PHI.1.0: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.4.b.PHI.1.1: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.5.b.PHI.1.2: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) - ; MIPS32: bb.6.b.PHI.1: - ; MIPS32: successors: %bb.7(0x40000000), %bb.13(0x40000000) - ; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 - ; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C3]] - ; MIPS32: G_BRCOND [[AND3]](s32), %bb.7 - ; MIPS32: G_BR %bb.13 - ; MIPS32: bb.7.b.PHI.1.end: - ; MIPS32: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.8.pre.PHI.2: - ; MIPS32: successors: %bb.9(0x40000000), %bb.10(0x40000000) - ; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C4]] - ; MIPS32: G_BRCOND [[AND4]](s32), %bb.9 - ; MIPS32: G_BR %bb.10 - ; MIPS32: bb.9.b.PHI.2.0: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.11 - ; MIPS32: bb.10.b.PHI.2.1: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: bb.11.b.PHI.2: - ; MIPS32: successors: %bb.13(0x40000000), %bb.12(0x40000000) - ; MIPS32: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 - ; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C5]] - ; MIPS32: G_BRCOND [[AND5]](s32), %bb.13 - ; MIPS32: bb.12.b.PHI.2.end: - ; MIPS32: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.13.b.PHI.3: - ; MIPS32: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C6]] - ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] - ; MIPS32: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C6]] - ; MIPS32: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] - ; MIPS32: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA + ; MIPS32-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) + ; MIPS32-NEXT: liveins: $a0, $a1, $a2, $a3 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 + ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 + ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) + ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) + ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 + ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] + ; MIPS32-NEXT: G_BRCOND [[AND]](s32), %bb.8 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.1.pre.PHI.1: + ; MIPS32-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C1]] + ; MIPS32-NEXT: G_BRCOND [[AND1]](s32), %bb.4 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.2.pre.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.5(0x40000000), %bb.3(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C2]] + ; MIPS32-NEXT: G_BRCOND [[AND2]](s32), %bb.5 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.3.b.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.4.b.PHI.1.1: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.5.b.PHI.1.2: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.6.b.PHI.1: + ; MIPS32-NEXT: successors: %bb.7(0x40000000), %bb.13(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 + ; MIPS32-NEXT: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C3]] + ; MIPS32-NEXT: G_BRCOND [[AND3]](s32), %bb.7 + ; MIPS32-NEXT: G_BR %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.7.b.PHI.1.end: + ; MIPS32-NEXT: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.8.pre.PHI.2: + ; MIPS32-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C4]] + ; MIPS32-NEXT: G_BRCOND [[AND4]](s32), %bb.9 + ; MIPS32-NEXT: G_BR %bb.10 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.9.b.PHI.2.0: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.11 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.10.b.PHI.2.1: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.11.b.PHI.2: + ; MIPS32-NEXT: successors: %bb.13(0x40000000), %bb.12(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 + ; MIPS32-NEXT: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C5]] + ; MIPS32-NEXT: G_BRCOND [[AND5]](s32), %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.12.b.PHI.2.end: + ; MIPS32-NEXT: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.13.b.PHI.3: + ; MIPS32-NEXT: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C6]] + ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] + ; MIPS32-NEXT: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C6]] + ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] + ; MIPS32-NEXT: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA bb.1.entry: liveins: $a0, $a1, $a2, $a3 @@ -443,127 +467,151 @@ fixedStack: body: | ; MIPS32-LABEL: name: long_chain_i64_in_gpr ; MIPS32: bb.0.entry: - ; MIPS32: successors: %bb.8(0x40000000), %bb.1(0x40000000) - ; MIPS32: liveins: $a0, $a1, $a2, $a3 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 - ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 - ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) - ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) - ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 - ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) - ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0 - ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C1]] - ; MIPS32: G_BRCOND [[AND]](s32), %bb.8 - ; MIPS32: bb.1.pre.PHI.1: - ; MIPS32: successors: %bb.4(0x40000000), %bb.2(0x40000000) - ; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C2]] - ; MIPS32: G_BRCOND [[AND1]](s32), %bb.4 - ; MIPS32: bb.2.pre.PHI.1.0: - ; MIPS32: successors: %bb.5(0x40000000), %bb.3(0x40000000) - ; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C3]] - ; MIPS32: G_BRCOND [[AND2]](s32), %bb.5 - ; MIPS32: bb.3.b.PHI.1.0: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD3:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY3]](p0) :: (load (s32) from %ir.a, align 8) - ; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY3]], [[C4]](s32) - ; MIPS32: [[LOAD4:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %ir.a + 4, basealign 8) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.4.b.PHI.1.1: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD5:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.b, align 8) - ; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD1:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD]], [[C5]](s32) - ; MIPS32: [[LOAD6:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32) from %ir.b + 4, basealign 8) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.5.b.PHI.1.2: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD7:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD1]](p0) :: (load (s32) from %ir.c, align 8) - ; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD2:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD1]], [[C6]](s32) - ; MIPS32: [[LOAD8:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from %ir.c + 4, basealign 8) - ; MIPS32: bb.6.b.PHI.1: - ; MIPS32: successors: %bb.7(0x40000000), %bb.13(0x40000000) - ; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD3]](s32), %bb.3, [[LOAD5]](s32), %bb.4, [[LOAD7]](s32), %bb.5 - ; MIPS32: [[PHI1:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD4]](s32), %bb.3, [[LOAD6]](s32), %bb.4, [[LOAD8]](s32), %bb.5 - ; MIPS32: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C7]] - ; MIPS32: G_BRCOND [[AND3]](s32), %bb.7 - ; MIPS32: G_BR %bb.13 - ; MIPS32: bb.7.b.PHI.1.end: - ; MIPS32: G_STORE [[PHI]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) - ; MIPS32: [[C8:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD3:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD2]], [[C8]](s32) - ; MIPS32: G_STORE [[PHI1]](s32), [[PTR_ADD3]](p0) :: (store (s32) into %ir.result + 4, basealign 8) - ; MIPS32: RetRA - ; MIPS32: bb.8.pre.PHI.2: - ; MIPS32: successors: %bb.9(0x40000000), %bb.10(0x40000000) - ; MIPS32: [[C9:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C9]] - ; MIPS32: G_BRCOND [[AND4]](s32), %bb.9 - ; MIPS32: G_BR %bb.10 - ; MIPS32: bb.9.b.PHI.2.0: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD9:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY3]](p0) :: (load (s32) from %ir.a, align 8) - ; MIPS32: [[C10:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD4:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY3]], [[C10]](s32) - ; MIPS32: [[LOAD10:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD4]](p0) :: (load (s32) from %ir.a + 4, basealign 8) - ; MIPS32: G_BR %bb.11 - ; MIPS32: bb.10.b.PHI.2.1: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD11:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.b, align 8) - ; MIPS32: [[C11:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD5:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD]], [[C11]](s32) - ; MIPS32: [[LOAD12:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD5]](p0) :: (load (s32) from %ir.b + 4, basealign 8) - ; MIPS32: bb.11.b.PHI.2: - ; MIPS32: successors: %bb.13(0x40000000), %bb.12(0x40000000) - ; MIPS32: [[PHI2:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD9]](s32), %bb.9, [[LOAD11]](s32), %bb.10 - ; MIPS32: [[PHI3:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD10]](s32), %bb.9, [[LOAD12]](s32), %bb.10 - ; MIPS32: [[C12:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C12]] - ; MIPS32: G_BRCOND [[AND5]](s32), %bb.13 - ; MIPS32: bb.12.b.PHI.2.end: - ; MIPS32: G_STORE [[PHI2]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) - ; MIPS32: [[C13:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD6:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD2]], [[C13]](s32) - ; MIPS32: G_STORE [[PHI3]](s32), [[PTR_ADD6]](p0) :: (store (s32) into %ir.result + 4, basealign 8) - ; MIPS32: RetRA - ; MIPS32: bb.13.b.PHI.3: - ; MIPS32: [[PHI4:%[0-9]+]]:gprb(s32) = G_PHI [[PHI2]](s32), %bb.11, [[PHI]](s32), %bb.6 - ; MIPS32: [[PHI5:%[0-9]+]]:gprb(s32) = G_PHI [[PHI3]](s32), %bb.11, [[PHI1]](s32), %bb.6 - ; MIPS32: [[PHI6:%[0-9]+]]:gprb(s32) = G_PHI [[PHI2]](s32), %bb.11, [[C]](s32), %bb.6 - ; MIPS32: [[PHI7:%[0-9]+]]:gprb(s32) = G_PHI [[PHI3]](s32), %bb.11, [[C]](s32), %bb.6 - ; MIPS32: [[C14:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C14]] - ; MIPS32: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND6]](s32), [[PHI4]], [[PHI6]] - ; MIPS32: [[SELECT1:%[0-9]+]]:gprb(s32) = G_SELECT [[AND6]](s32), [[PHI5]], [[PHI7]] - ; MIPS32: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C14]] - ; MIPS32: [[SELECT2:%[0-9]+]]:gprb(s32) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI4]] - ; MIPS32: [[SELECT3:%[0-9]+]]:gprb(s32) = G_SELECT [[AND7]](s32), [[SELECT1]], [[PHI5]] - ; MIPS32: G_STORE [[SELECT2]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) - ; MIPS32: [[C15:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD7:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD2]], [[C15]](s32) - ; MIPS32: G_STORE [[SELECT3]](s32), [[PTR_ADD7]](p0) :: (store (s32) into %ir.result + 4, basealign 8) - ; MIPS32: G_STORE [[PHI4]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) - ; MIPS32: [[C16:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD8:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD2]], [[C16]](s32) - ; MIPS32: G_STORE [[PHI5]](s32), [[PTR_ADD8]](p0) :: (store (s32) into %ir.result + 4, basealign 8) - ; MIPS32: RetRA + ; MIPS32-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) + ; MIPS32-NEXT: liveins: $a0, $a1, $a2, $a3 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 + ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 + ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) + ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) + ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 + ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0 + ; MIPS32-NEXT: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C1]] + ; MIPS32-NEXT: G_BRCOND [[AND]](s32), %bb.8 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.1.pre.PHI.1: + ; MIPS32-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C2]] + ; MIPS32-NEXT: G_BRCOND [[AND1]](s32), %bb.4 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.2.pre.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.5(0x40000000), %bb.3(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C3]] + ; MIPS32-NEXT: G_BRCOND [[AND2]](s32), %bb.5 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.3.b.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY3]](p0) :: (load (s32) from %ir.a, align 8) + ; MIPS32-NEXT: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[COPY3]], [[C4]](s32) + ; MIPS32-NEXT: [[LOAD4:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %ir.a + 4, basealign 8) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.4.b.PHI.1.1: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD5:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.b, align 8) + ; MIPS32-NEXT: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD1:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD]], [[C5]](s32) + ; MIPS32-NEXT: [[LOAD6:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32) from %ir.b + 4, basealign 8) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.5.b.PHI.1.2: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD7:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD1]](p0) :: (load (s32) from %ir.c, align 8) + ; MIPS32-NEXT: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD2:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD1]], [[C6]](s32) + ; MIPS32-NEXT: [[LOAD8:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from %ir.c + 4, basealign 8) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.6.b.PHI.1: + ; MIPS32-NEXT: successors: %bb.7(0x40000000), %bb.13(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD3]](s32), %bb.3, [[LOAD5]](s32), %bb.4, [[LOAD7]](s32), %bb.5 + ; MIPS32-NEXT: [[PHI1:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD4]](s32), %bb.3, [[LOAD6]](s32), %bb.4, [[LOAD8]](s32), %bb.5 + ; MIPS32-NEXT: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C7]] + ; MIPS32-NEXT: G_BRCOND [[AND3]](s32), %bb.7 + ; MIPS32-NEXT: G_BR %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.7.b.PHI.1.end: + ; MIPS32-NEXT: G_STORE [[PHI]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) + ; MIPS32-NEXT: [[C8:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD3:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD2]], [[C8]](s32) + ; MIPS32-NEXT: G_STORE [[PHI1]](s32), [[PTR_ADD3]](p0) :: (store (s32) into %ir.result + 4, basealign 8) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.8.pre.PHI.2: + ; MIPS32-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C9:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C9]] + ; MIPS32-NEXT: G_BRCOND [[AND4]](s32), %bb.9 + ; MIPS32-NEXT: G_BR %bb.10 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.9.b.PHI.2.0: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD9:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY3]](p0) :: (load (s32) from %ir.a, align 8) + ; MIPS32-NEXT: [[C10:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD4:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[COPY3]], [[C10]](s32) + ; MIPS32-NEXT: [[LOAD10:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD4]](p0) :: (load (s32) from %ir.a + 4, basealign 8) + ; MIPS32-NEXT: G_BR %bb.11 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.10.b.PHI.2.1: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD11:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.b, align 8) + ; MIPS32-NEXT: [[C11:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD5:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD]], [[C11]](s32) + ; MIPS32-NEXT: [[LOAD12:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD5]](p0) :: (load (s32) from %ir.b + 4, basealign 8) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.11.b.PHI.2: + ; MIPS32-NEXT: successors: %bb.13(0x40000000), %bb.12(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI2:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD9]](s32), %bb.9, [[LOAD11]](s32), %bb.10 + ; MIPS32-NEXT: [[PHI3:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD10]](s32), %bb.9, [[LOAD12]](s32), %bb.10 + ; MIPS32-NEXT: [[C12:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C12]] + ; MIPS32-NEXT: G_BRCOND [[AND5]](s32), %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.12.b.PHI.2.end: + ; MIPS32-NEXT: G_STORE [[PHI2]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) + ; MIPS32-NEXT: [[C13:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD6:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD2]], [[C13]](s32) + ; MIPS32-NEXT: G_STORE [[PHI3]](s32), [[PTR_ADD6]](p0) :: (store (s32) into %ir.result + 4, basealign 8) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.13.b.PHI.3: + ; MIPS32-NEXT: [[PHI4:%[0-9]+]]:gprb(s32) = G_PHI [[PHI2]](s32), %bb.11, [[PHI]](s32), %bb.6 + ; MIPS32-NEXT: [[PHI5:%[0-9]+]]:gprb(s32) = G_PHI [[PHI3]](s32), %bb.11, [[PHI1]](s32), %bb.6 + ; MIPS32-NEXT: [[PHI6:%[0-9]+]]:gprb(s32) = G_PHI [[PHI2]](s32), %bb.11, [[C]](s32), %bb.6 + ; MIPS32-NEXT: [[PHI7:%[0-9]+]]:gprb(s32) = G_PHI [[PHI3]](s32), %bb.11, [[C]](s32), %bb.6 + ; MIPS32-NEXT: [[C14:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C14]] + ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND6]](s32), [[PHI4]], [[PHI6]] + ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:gprb(s32) = G_SELECT [[AND6]](s32), [[PHI5]], [[PHI7]] + ; MIPS32-NEXT: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C14]] + ; MIPS32-NEXT: [[SELECT2:%[0-9]+]]:gprb(s32) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI4]] + ; MIPS32-NEXT: [[SELECT3:%[0-9]+]]:gprb(s32) = G_SELECT [[AND7]](s32), [[SELECT1]], [[PHI5]] + ; MIPS32-NEXT: G_STORE [[SELECT2]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) + ; MIPS32-NEXT: [[C15:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD7:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD2]], [[C15]](s32) + ; MIPS32-NEXT: G_STORE [[SELECT3]](s32), [[PTR_ADD7]](p0) :: (store (s32) into %ir.result + 4, basealign 8) + ; MIPS32-NEXT: G_STORE [[PHI4]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) + ; MIPS32-NEXT: [[C16:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD8:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD2]], [[C16]](s32) + ; MIPS32-NEXT: G_STORE [[PHI5]](s32), [[PTR_ADD8]](p0) :: (store (s32) into %ir.result + 4, basealign 8) + ; MIPS32-NEXT: RetRA bb.1.entry: liveins: $a0, $a1, $a2, $a3 @@ -671,93 +719,117 @@ fixedStack: body: | ; MIPS32-LABEL: name: long_chain_ambiguous_double_in_fpr ; MIPS32: bb.0.entry: - ; MIPS32: successors: %bb.8(0x40000000), %bb.1(0x40000000) - ; MIPS32: liveins: $a0, $a1, $a2, $a3 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 - ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 - ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) - ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) - ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 - ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) - ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] - ; MIPS32: G_BRCOND [[AND]](s32), %bb.8 - ; MIPS32: bb.1.pre.PHI.1: - ; MIPS32: successors: %bb.4(0x40000000), %bb.2(0x40000000) - ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C1]] - ; MIPS32: G_BRCOND [[AND1]](s32), %bb.4 - ; MIPS32: bb.2.pre.PHI.1.0: - ; MIPS32: successors: %bb.5(0x40000000), %bb.3(0x40000000) - ; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C2]] - ; MIPS32: G_BRCOND [[AND2]](s32), %bb.5 - ; MIPS32: bb.3.b.PHI.1.0: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.4.b.PHI.1.1: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.5.b.PHI.1.2: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) - ; MIPS32: bb.6.b.PHI.1: - ; MIPS32: successors: %bb.7(0x40000000), %bb.13(0x40000000) - ; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 - ; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C3]] - ; MIPS32: G_BRCOND [[AND3]](s32), %bb.7 - ; MIPS32: G_BR %bb.13 - ; MIPS32: bb.7.b.PHI.1.end: - ; MIPS32: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.8.pre.PHI.2: - ; MIPS32: successors: %bb.9(0x40000000), %bb.10(0x40000000) - ; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C4]] - ; MIPS32: G_BRCOND [[AND4]](s32), %bb.9 - ; MIPS32: G_BR %bb.10 - ; MIPS32: bb.9.b.PHI.2.0: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.11 - ; MIPS32: bb.10.b.PHI.2.1: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: bb.11.b.PHI.2: - ; MIPS32: successors: %bb.13(0x40000000), %bb.12(0x40000000) - ; MIPS32: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 - ; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C5]] - ; MIPS32: G_BRCOND [[AND5]](s32), %bb.13 - ; MIPS32: bb.12.b.PHI.2.end: - ; MIPS32: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.13.b.PHI.3: - ; MIPS32: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C6]] - ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] - ; MIPS32: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C6]] - ; MIPS32: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] - ; MIPS32: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA + ; MIPS32-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) + ; MIPS32-NEXT: liveins: $a0, $a1, $a2, $a3 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 + ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 + ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) + ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) + ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 + ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] + ; MIPS32-NEXT: G_BRCOND [[AND]](s32), %bb.8 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.1.pre.PHI.1: + ; MIPS32-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C1]] + ; MIPS32-NEXT: G_BRCOND [[AND1]](s32), %bb.4 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.2.pre.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.5(0x40000000), %bb.3(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C2]] + ; MIPS32-NEXT: G_BRCOND [[AND2]](s32), %bb.5 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.3.b.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.4.b.PHI.1.1: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.5.b.PHI.1.2: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.6.b.PHI.1: + ; MIPS32-NEXT: successors: %bb.7(0x40000000), %bb.13(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 + ; MIPS32-NEXT: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C3]] + ; MIPS32-NEXT: G_BRCOND [[AND3]](s32), %bb.7 + ; MIPS32-NEXT: G_BR %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.7.b.PHI.1.end: + ; MIPS32-NEXT: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.8.pre.PHI.2: + ; MIPS32-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C4]] + ; MIPS32-NEXT: G_BRCOND [[AND4]](s32), %bb.9 + ; MIPS32-NEXT: G_BR %bb.10 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.9.b.PHI.2.0: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.11 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.10.b.PHI.2.1: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.11.b.PHI.2: + ; MIPS32-NEXT: successors: %bb.13(0x40000000), %bb.12(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 + ; MIPS32-NEXT: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C5]] + ; MIPS32-NEXT: G_BRCOND [[AND5]](s32), %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.12.b.PHI.2.end: + ; MIPS32-NEXT: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.13.b.PHI.3: + ; MIPS32-NEXT: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C6]] + ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] + ; MIPS32-NEXT: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C6]] + ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] + ; MIPS32-NEXT: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA bb.1.entry: liveins: $a0, $a1, $a2, $a3 @@ -863,94 +935,118 @@ fixedStack: body: | ; MIPS32-LABEL: name: long_chain_double_in_fpr ; MIPS32: bb.0.entry: - ; MIPS32: successors: %bb.8(0x40000000), %bb.1(0x40000000) - ; MIPS32: liveins: $a0, $a1, $a2, $a3 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 - ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 - ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) - ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) - ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 - ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) - ; MIPS32: [[C:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0.000000e+00 - ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C1]] - ; MIPS32: G_BRCOND [[AND]](s32), %bb.8 - ; MIPS32: bb.1.pre.PHI.1: - ; MIPS32: successors: %bb.4(0x40000000), %bb.2(0x40000000) - ; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C2]] - ; MIPS32: G_BRCOND [[AND1]](s32), %bb.4 - ; MIPS32: bb.2.pre.PHI.1.0: - ; MIPS32: successors: %bb.5(0x40000000), %bb.3(0x40000000) - ; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C3]] - ; MIPS32: G_BRCOND [[AND2]](s32), %bb.5 - ; MIPS32: bb.3.b.PHI.1.0: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.4.b.PHI.1.1: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.5.b.PHI.1.2: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) - ; MIPS32: bb.6.b.PHI.1: - ; MIPS32: successors: %bb.7(0x40000000), %bb.13(0x40000000) - ; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 - ; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C4]] - ; MIPS32: G_BRCOND [[AND3]](s32), %bb.7 - ; MIPS32: G_BR %bb.13 - ; MIPS32: bb.7.b.PHI.1.end: - ; MIPS32: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.8.pre.PHI.2: - ; MIPS32: successors: %bb.9(0x40000000), %bb.10(0x40000000) - ; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C5]] - ; MIPS32: G_BRCOND [[AND4]](s32), %bb.9 - ; MIPS32: G_BR %bb.10 - ; MIPS32: bb.9.b.PHI.2.0: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.11 - ; MIPS32: bb.10.b.PHI.2.1: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: bb.11.b.PHI.2: - ; MIPS32: successors: %bb.13(0x40000000), %bb.12(0x40000000) - ; MIPS32: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 - ; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C6]] - ; MIPS32: G_BRCOND [[AND5]](s32), %bb.13 - ; MIPS32: bb.12.b.PHI.2.end: - ; MIPS32: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.13.b.PHI.3: - ; MIPS32: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[C]](s64), %bb.6 - ; MIPS32: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C7]] - ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] - ; MIPS32: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C7]] - ; MIPS32: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] - ; MIPS32: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA + ; MIPS32-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) + ; MIPS32-NEXT: liveins: $a0, $a1, $a2, $a3 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 + ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 + ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) + ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) + ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 + ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0.000000e+00 + ; MIPS32-NEXT: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C1]] + ; MIPS32-NEXT: G_BRCOND [[AND]](s32), %bb.8 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.1.pre.PHI.1: + ; MIPS32-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C2]] + ; MIPS32-NEXT: G_BRCOND [[AND1]](s32), %bb.4 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.2.pre.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.5(0x40000000), %bb.3(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C3]] + ; MIPS32-NEXT: G_BRCOND [[AND2]](s32), %bb.5 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.3.b.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.4.b.PHI.1.1: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.5.b.PHI.1.2: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.6.b.PHI.1: + ; MIPS32-NEXT: successors: %bb.7(0x40000000), %bb.13(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 + ; MIPS32-NEXT: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C4]] + ; MIPS32-NEXT: G_BRCOND [[AND3]](s32), %bb.7 + ; MIPS32-NEXT: G_BR %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.7.b.PHI.1.end: + ; MIPS32-NEXT: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.8.pre.PHI.2: + ; MIPS32-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C5]] + ; MIPS32-NEXT: G_BRCOND [[AND4]](s32), %bb.9 + ; MIPS32-NEXT: G_BR %bb.10 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.9.b.PHI.2.0: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.11 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.10.b.PHI.2.1: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.11.b.PHI.2: + ; MIPS32-NEXT: successors: %bb.13(0x40000000), %bb.12(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 + ; MIPS32-NEXT: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C6]] + ; MIPS32-NEXT: G_BRCOND [[AND5]](s32), %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.12.b.PHI.2.end: + ; MIPS32-NEXT: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.13.b.PHI.3: + ; MIPS32-NEXT: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[C]](s64), %bb.6 + ; MIPS32-NEXT: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C7]] + ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] + ; MIPS32-NEXT: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C7]] + ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] + ; MIPS32-NEXT: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA bb.1.entry: liveins: $a0, $a1, $a2, $a3 diff --git a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir index 4226f2b..c79cc00 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir @@ -251,93 +251,117 @@ fixedStack: body: | ; MIPS32-LABEL: name: long_chain_ambiguous_i64_in_fpr ; MIPS32: bb.0.entry: - ; MIPS32: successors: %bb.8(0x40000000), %bb.1(0x40000000) - ; MIPS32: liveins: $a0, $a1, $a2, $a3 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 - ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 - ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) - ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) - ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 - ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) - ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] - ; MIPS32: G_BRCOND [[AND]](s32), %bb.8 - ; MIPS32: bb.1.pre.PHI.1: - ; MIPS32: successors: %bb.4(0x40000000), %bb.2(0x40000000) - ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C1]] - ; MIPS32: G_BRCOND [[AND1]](s32), %bb.4 - ; MIPS32: bb.2.pre.PHI.1.0: - ; MIPS32: successors: %bb.5(0x40000000), %bb.3(0x40000000) - ; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C2]] - ; MIPS32: G_BRCOND [[AND2]](s32), %bb.5 - ; MIPS32: bb.3.b.PHI.1.0: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.4.b.PHI.1.1: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.5.b.PHI.1.2: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) - ; MIPS32: bb.6.b.PHI.1: - ; MIPS32: successors: %bb.7(0x40000000), %bb.13(0x40000000) - ; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 - ; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C3]] - ; MIPS32: G_BRCOND [[AND3]](s32), %bb.7 - ; MIPS32: G_BR %bb.13 - ; MIPS32: bb.7.b.PHI.1.end: - ; MIPS32: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.8.pre.PHI.2: - ; MIPS32: successors: %bb.9(0x40000000), %bb.10(0x40000000) - ; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C4]] - ; MIPS32: G_BRCOND [[AND4]](s32), %bb.9 - ; MIPS32: G_BR %bb.10 - ; MIPS32: bb.9.b.PHI.2.0: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.11 - ; MIPS32: bb.10.b.PHI.2.1: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: bb.11.b.PHI.2: - ; MIPS32: successors: %bb.13(0x40000000), %bb.12(0x40000000) - ; MIPS32: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 - ; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C5]] - ; MIPS32: G_BRCOND [[AND5]](s32), %bb.13 - ; MIPS32: bb.12.b.PHI.2.end: - ; MIPS32: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.13.b.PHI.3: - ; MIPS32: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C6]] - ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] - ; MIPS32: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C6]] - ; MIPS32: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] - ; MIPS32: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA + ; MIPS32-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) + ; MIPS32-NEXT: liveins: $a0, $a1, $a2, $a3 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 + ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 + ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) + ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) + ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 + ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] + ; MIPS32-NEXT: G_BRCOND [[AND]](s32), %bb.8 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.1.pre.PHI.1: + ; MIPS32-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C1]] + ; MIPS32-NEXT: G_BRCOND [[AND1]](s32), %bb.4 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.2.pre.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.5(0x40000000), %bb.3(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C2]] + ; MIPS32-NEXT: G_BRCOND [[AND2]](s32), %bb.5 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.3.b.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.4.b.PHI.1.1: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.5.b.PHI.1.2: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.6.b.PHI.1: + ; MIPS32-NEXT: successors: %bb.7(0x40000000), %bb.13(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 + ; MIPS32-NEXT: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C3]] + ; MIPS32-NEXT: G_BRCOND [[AND3]](s32), %bb.7 + ; MIPS32-NEXT: G_BR %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.7.b.PHI.1.end: + ; MIPS32-NEXT: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.8.pre.PHI.2: + ; MIPS32-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C4]] + ; MIPS32-NEXT: G_BRCOND [[AND4]](s32), %bb.9 + ; MIPS32-NEXT: G_BR %bb.10 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.9.b.PHI.2.0: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.11 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.10.b.PHI.2.1: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.11.b.PHI.2: + ; MIPS32-NEXT: successors: %bb.13(0x40000000), %bb.12(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 + ; MIPS32-NEXT: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C5]] + ; MIPS32-NEXT: G_BRCOND [[AND5]](s32), %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.12.b.PHI.2.end: + ; MIPS32-NEXT: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.13.b.PHI.3: + ; MIPS32-NEXT: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C6]] + ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] + ; MIPS32-NEXT: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C6]] + ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] + ; MIPS32-NEXT: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA bb.1.entry: liveins: $a0, $a1, $a2, $a3 @@ -443,127 +467,151 @@ fixedStack: body: | ; MIPS32-LABEL: name: long_chain_i64_in_gpr ; MIPS32: bb.0.entry: - ; MIPS32: successors: %bb.8(0x40000000), %bb.1(0x40000000) - ; MIPS32: liveins: $a0, $a1, $a2, $a3 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 - ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 - ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) - ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) - ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 - ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) - ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0 - ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C1]] - ; MIPS32: G_BRCOND [[AND]](s32), %bb.8 - ; MIPS32: bb.1.pre.PHI.1: - ; MIPS32: successors: %bb.4(0x40000000), %bb.2(0x40000000) - ; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C2]] - ; MIPS32: G_BRCOND [[AND1]](s32), %bb.4 - ; MIPS32: bb.2.pre.PHI.1.0: - ; MIPS32: successors: %bb.5(0x40000000), %bb.3(0x40000000) - ; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C3]] - ; MIPS32: G_BRCOND [[AND2]](s32), %bb.5 - ; MIPS32: bb.3.b.PHI.1.0: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD3:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY3]](p0) :: (load (s32) from %ir.a, align 8) - ; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY3]], [[C4]](s32) - ; MIPS32: [[LOAD4:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %ir.a + 4, basealign 8) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.4.b.PHI.1.1: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD5:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.b, align 8) - ; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD1:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD]], [[C5]](s32) - ; MIPS32: [[LOAD6:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32) from %ir.b + 4, basealign 8) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.5.b.PHI.1.2: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD7:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD1]](p0) :: (load (s32) from %ir.c, align 8) - ; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD2:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD1]], [[C6]](s32) - ; MIPS32: [[LOAD8:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from %ir.c + 4, basealign 8) - ; MIPS32: bb.6.b.PHI.1: - ; MIPS32: successors: %bb.7(0x40000000), %bb.13(0x40000000) - ; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD3]](s32), %bb.3, [[LOAD5]](s32), %bb.4, [[LOAD7]](s32), %bb.5 - ; MIPS32: [[PHI1:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD4]](s32), %bb.3, [[LOAD6]](s32), %bb.4, [[LOAD8]](s32), %bb.5 - ; MIPS32: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C7]] - ; MIPS32: G_BRCOND [[AND3]](s32), %bb.7 - ; MIPS32: G_BR %bb.13 - ; MIPS32: bb.7.b.PHI.1.end: - ; MIPS32: G_STORE [[PHI]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) - ; MIPS32: [[C8:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD3:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD2]], [[C8]](s32) - ; MIPS32: G_STORE [[PHI1]](s32), [[PTR_ADD3]](p0) :: (store (s32) into %ir.result + 4, basealign 8) - ; MIPS32: RetRA - ; MIPS32: bb.8.pre.PHI.2: - ; MIPS32: successors: %bb.9(0x40000000), %bb.10(0x40000000) - ; MIPS32: [[C9:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C9]] - ; MIPS32: G_BRCOND [[AND4]](s32), %bb.9 - ; MIPS32: G_BR %bb.10 - ; MIPS32: bb.9.b.PHI.2.0: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD9:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY3]](p0) :: (load (s32) from %ir.a, align 8) - ; MIPS32: [[C10:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD4:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY3]], [[C10]](s32) - ; MIPS32: [[LOAD10:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD4]](p0) :: (load (s32) from %ir.a + 4, basealign 8) - ; MIPS32: G_BR %bb.11 - ; MIPS32: bb.10.b.PHI.2.1: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD11:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.b, align 8) - ; MIPS32: [[C11:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD5:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD]], [[C11]](s32) - ; MIPS32: [[LOAD12:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD5]](p0) :: (load (s32) from %ir.b + 4, basealign 8) - ; MIPS32: bb.11.b.PHI.2: - ; MIPS32: successors: %bb.13(0x40000000), %bb.12(0x40000000) - ; MIPS32: [[PHI2:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD9]](s32), %bb.9, [[LOAD11]](s32), %bb.10 - ; MIPS32: [[PHI3:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD10]](s32), %bb.9, [[LOAD12]](s32), %bb.10 - ; MIPS32: [[C12:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C12]] - ; MIPS32: G_BRCOND [[AND5]](s32), %bb.13 - ; MIPS32: bb.12.b.PHI.2.end: - ; MIPS32: G_STORE [[PHI2]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) - ; MIPS32: [[C13:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD6:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD2]], [[C13]](s32) - ; MIPS32: G_STORE [[PHI3]](s32), [[PTR_ADD6]](p0) :: (store (s32) into %ir.result + 4, basealign 8) - ; MIPS32: RetRA - ; MIPS32: bb.13.b.PHI.3: - ; MIPS32: [[PHI4:%[0-9]+]]:gprb(s32) = G_PHI [[PHI2]](s32), %bb.11, [[PHI]](s32), %bb.6 - ; MIPS32: [[PHI5:%[0-9]+]]:gprb(s32) = G_PHI [[PHI3]](s32), %bb.11, [[PHI1]](s32), %bb.6 - ; MIPS32: [[PHI6:%[0-9]+]]:gprb(s32) = G_PHI [[PHI2]](s32), %bb.11, [[C]](s32), %bb.6 - ; MIPS32: [[PHI7:%[0-9]+]]:gprb(s32) = G_PHI [[PHI3]](s32), %bb.11, [[C]](s32), %bb.6 - ; MIPS32: [[C14:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C14]] - ; MIPS32: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND6]](s32), [[PHI4]], [[PHI6]] - ; MIPS32: [[SELECT1:%[0-9]+]]:gprb(s32) = G_SELECT [[AND6]](s32), [[PHI5]], [[PHI7]] - ; MIPS32: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C14]] - ; MIPS32: [[SELECT2:%[0-9]+]]:gprb(s32) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI4]] - ; MIPS32: [[SELECT3:%[0-9]+]]:gprb(s32) = G_SELECT [[AND7]](s32), [[SELECT1]], [[PHI5]] - ; MIPS32: G_STORE [[SELECT2]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) - ; MIPS32: [[C15:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD7:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD2]], [[C15]](s32) - ; MIPS32: G_STORE [[SELECT3]](s32), [[PTR_ADD7]](p0) :: (store (s32) into %ir.result + 4, basealign 8) - ; MIPS32: G_STORE [[PHI4]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) - ; MIPS32: [[C16:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD8:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD2]], [[C16]](s32) - ; MIPS32: G_STORE [[PHI5]](s32), [[PTR_ADD8]](p0) :: (store (s32) into %ir.result + 4, basealign 8) - ; MIPS32: RetRA + ; MIPS32-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) + ; MIPS32-NEXT: liveins: $a0, $a1, $a2, $a3 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 + ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 + ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) + ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) + ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 + ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0 + ; MIPS32-NEXT: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C1]] + ; MIPS32-NEXT: G_BRCOND [[AND]](s32), %bb.8 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.1.pre.PHI.1: + ; MIPS32-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C2]] + ; MIPS32-NEXT: G_BRCOND [[AND1]](s32), %bb.4 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.2.pre.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.5(0x40000000), %bb.3(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C3]] + ; MIPS32-NEXT: G_BRCOND [[AND2]](s32), %bb.5 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.3.b.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY3]](p0) :: (load (s32) from %ir.a, align 8) + ; MIPS32-NEXT: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[COPY3]], [[C4]](s32) + ; MIPS32-NEXT: [[LOAD4:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %ir.a + 4, basealign 8) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.4.b.PHI.1.1: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD5:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.b, align 8) + ; MIPS32-NEXT: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD1:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD]], [[C5]](s32) + ; MIPS32-NEXT: [[LOAD6:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32) from %ir.b + 4, basealign 8) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.5.b.PHI.1.2: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD7:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD1]](p0) :: (load (s32) from %ir.c, align 8) + ; MIPS32-NEXT: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD2:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD1]], [[C6]](s32) + ; MIPS32-NEXT: [[LOAD8:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from %ir.c + 4, basealign 8) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.6.b.PHI.1: + ; MIPS32-NEXT: successors: %bb.7(0x40000000), %bb.13(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD3]](s32), %bb.3, [[LOAD5]](s32), %bb.4, [[LOAD7]](s32), %bb.5 + ; MIPS32-NEXT: [[PHI1:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD4]](s32), %bb.3, [[LOAD6]](s32), %bb.4, [[LOAD8]](s32), %bb.5 + ; MIPS32-NEXT: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C7]] + ; MIPS32-NEXT: G_BRCOND [[AND3]](s32), %bb.7 + ; MIPS32-NEXT: G_BR %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.7.b.PHI.1.end: + ; MIPS32-NEXT: G_STORE [[PHI]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) + ; MIPS32-NEXT: [[C8:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD3:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD2]], [[C8]](s32) + ; MIPS32-NEXT: G_STORE [[PHI1]](s32), [[PTR_ADD3]](p0) :: (store (s32) into %ir.result + 4, basealign 8) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.8.pre.PHI.2: + ; MIPS32-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C9:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C9]] + ; MIPS32-NEXT: G_BRCOND [[AND4]](s32), %bb.9 + ; MIPS32-NEXT: G_BR %bb.10 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.9.b.PHI.2.0: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD9:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY3]](p0) :: (load (s32) from %ir.a, align 8) + ; MIPS32-NEXT: [[C10:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD4:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[COPY3]], [[C10]](s32) + ; MIPS32-NEXT: [[LOAD10:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD4]](p0) :: (load (s32) from %ir.a + 4, basealign 8) + ; MIPS32-NEXT: G_BR %bb.11 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.10.b.PHI.2.1: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD11:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load (s32) from %ir.b, align 8) + ; MIPS32-NEXT: [[C11:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD5:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD]], [[C11]](s32) + ; MIPS32-NEXT: [[LOAD12:%[0-9]+]]:gprb(s32) = G_LOAD [[PTR_ADD5]](p0) :: (load (s32) from %ir.b + 4, basealign 8) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.11.b.PHI.2: + ; MIPS32-NEXT: successors: %bb.13(0x40000000), %bb.12(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI2:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD9]](s32), %bb.9, [[LOAD11]](s32), %bb.10 + ; MIPS32-NEXT: [[PHI3:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD10]](s32), %bb.9, [[LOAD12]](s32), %bb.10 + ; MIPS32-NEXT: [[C12:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C12]] + ; MIPS32-NEXT: G_BRCOND [[AND5]](s32), %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.12.b.PHI.2.end: + ; MIPS32-NEXT: G_STORE [[PHI2]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) + ; MIPS32-NEXT: [[C13:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD6:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD2]], [[C13]](s32) + ; MIPS32-NEXT: G_STORE [[PHI3]](s32), [[PTR_ADD6]](p0) :: (store (s32) into %ir.result + 4, basealign 8) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.13.b.PHI.3: + ; MIPS32-NEXT: [[PHI4:%[0-9]+]]:gprb(s32) = G_PHI [[PHI2]](s32), %bb.11, [[PHI]](s32), %bb.6 + ; MIPS32-NEXT: [[PHI5:%[0-9]+]]:gprb(s32) = G_PHI [[PHI3]](s32), %bb.11, [[PHI1]](s32), %bb.6 + ; MIPS32-NEXT: [[PHI6:%[0-9]+]]:gprb(s32) = G_PHI [[PHI2]](s32), %bb.11, [[C]](s32), %bb.6 + ; MIPS32-NEXT: [[PHI7:%[0-9]+]]:gprb(s32) = G_PHI [[PHI3]](s32), %bb.11, [[C]](s32), %bb.6 + ; MIPS32-NEXT: [[C14:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C14]] + ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND6]](s32), [[PHI4]], [[PHI6]] + ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:gprb(s32) = G_SELECT [[AND6]](s32), [[PHI5]], [[PHI7]] + ; MIPS32-NEXT: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C14]] + ; MIPS32-NEXT: [[SELECT2:%[0-9]+]]:gprb(s32) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI4]] + ; MIPS32-NEXT: [[SELECT3:%[0-9]+]]:gprb(s32) = G_SELECT [[AND7]](s32), [[SELECT1]], [[PHI5]] + ; MIPS32-NEXT: G_STORE [[SELECT2]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) + ; MIPS32-NEXT: [[C15:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD7:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD2]], [[C15]](s32) + ; MIPS32-NEXT: G_STORE [[SELECT3]](s32), [[PTR_ADD7]](p0) :: (store (s32) into %ir.result + 4, basealign 8) + ; MIPS32-NEXT: G_STORE [[PHI4]](s32), [[LOAD2]](p0) :: (store (s32) into %ir.result, align 8) + ; MIPS32-NEXT: [[C16:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD8:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[LOAD2]], [[C16]](s32) + ; MIPS32-NEXT: G_STORE [[PHI5]](s32), [[PTR_ADD8]](p0) :: (store (s32) into %ir.result + 4, basealign 8) + ; MIPS32-NEXT: RetRA bb.1.entry: liveins: $a0, $a1, $a2, $a3 @@ -671,93 +719,117 @@ fixedStack: body: | ; MIPS32-LABEL: name: long_chain_ambiguous_double_in_fpr ; MIPS32: bb.0.entry: - ; MIPS32: successors: %bb.8(0x40000000), %bb.1(0x40000000) - ; MIPS32: liveins: $a0, $a1, $a2, $a3 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 - ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 - ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) - ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) - ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 - ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) - ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] - ; MIPS32: G_BRCOND [[AND]](s32), %bb.8 - ; MIPS32: bb.1.pre.PHI.1: - ; MIPS32: successors: %bb.4(0x40000000), %bb.2(0x40000000) - ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C1]] - ; MIPS32: G_BRCOND [[AND1]](s32), %bb.4 - ; MIPS32: bb.2.pre.PHI.1.0: - ; MIPS32: successors: %bb.5(0x40000000), %bb.3(0x40000000) - ; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C2]] - ; MIPS32: G_BRCOND [[AND2]](s32), %bb.5 - ; MIPS32: bb.3.b.PHI.1.0: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.4.b.PHI.1.1: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.5.b.PHI.1.2: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) - ; MIPS32: bb.6.b.PHI.1: - ; MIPS32: successors: %bb.7(0x40000000), %bb.13(0x40000000) - ; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 - ; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C3]] - ; MIPS32: G_BRCOND [[AND3]](s32), %bb.7 - ; MIPS32: G_BR %bb.13 - ; MIPS32: bb.7.b.PHI.1.end: - ; MIPS32: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.8.pre.PHI.2: - ; MIPS32: successors: %bb.9(0x40000000), %bb.10(0x40000000) - ; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C4]] - ; MIPS32: G_BRCOND [[AND4]](s32), %bb.9 - ; MIPS32: G_BR %bb.10 - ; MIPS32: bb.9.b.PHI.2.0: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.11 - ; MIPS32: bb.10.b.PHI.2.1: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: bb.11.b.PHI.2: - ; MIPS32: successors: %bb.13(0x40000000), %bb.12(0x40000000) - ; MIPS32: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 - ; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C5]] - ; MIPS32: G_BRCOND [[AND5]](s32), %bb.13 - ; MIPS32: bb.12.b.PHI.2.end: - ; MIPS32: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.13.b.PHI.3: - ; MIPS32: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C6]] - ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] - ; MIPS32: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C6]] - ; MIPS32: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] - ; MIPS32: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA + ; MIPS32-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) + ; MIPS32-NEXT: liveins: $a0, $a1, $a2, $a3 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 + ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 + ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) + ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) + ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 + ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] + ; MIPS32-NEXT: G_BRCOND [[AND]](s32), %bb.8 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.1.pre.PHI.1: + ; MIPS32-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C1]] + ; MIPS32-NEXT: G_BRCOND [[AND1]](s32), %bb.4 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.2.pre.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.5(0x40000000), %bb.3(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C2]] + ; MIPS32-NEXT: G_BRCOND [[AND2]](s32), %bb.5 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.3.b.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.4.b.PHI.1.1: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.5.b.PHI.1.2: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.6.b.PHI.1: + ; MIPS32-NEXT: successors: %bb.7(0x40000000), %bb.13(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 + ; MIPS32-NEXT: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C3]] + ; MIPS32-NEXT: G_BRCOND [[AND3]](s32), %bb.7 + ; MIPS32-NEXT: G_BR %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.7.b.PHI.1.end: + ; MIPS32-NEXT: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.8.pre.PHI.2: + ; MIPS32-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C4]] + ; MIPS32-NEXT: G_BRCOND [[AND4]](s32), %bb.9 + ; MIPS32-NEXT: G_BR %bb.10 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.9.b.PHI.2.0: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.11 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.10.b.PHI.2.1: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.11.b.PHI.2: + ; MIPS32-NEXT: successors: %bb.13(0x40000000), %bb.12(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 + ; MIPS32-NEXT: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C5]] + ; MIPS32-NEXT: G_BRCOND [[AND5]](s32), %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.12.b.PHI.2.end: + ; MIPS32-NEXT: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.13.b.PHI.3: + ; MIPS32-NEXT: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C6]] + ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] + ; MIPS32-NEXT: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C6]] + ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] + ; MIPS32-NEXT: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA bb.1.entry: liveins: $a0, $a1, $a2, $a3 @@ -863,94 +935,118 @@ fixedStack: body: | ; MIPS32-LABEL: name: long_chain_double_in_fpr ; MIPS32: bb.0.entry: - ; MIPS32: successors: %bb.8(0x40000000), %bb.1(0x40000000) - ; MIPS32: liveins: $a0, $a1, $a2, $a3 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 - ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 - ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 - ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) - ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 - ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) - ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 - ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) - ; MIPS32: [[C:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0.000000e+00 - ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C1]] - ; MIPS32: G_BRCOND [[AND]](s32), %bb.8 - ; MIPS32: bb.1.pre.PHI.1: - ; MIPS32: successors: %bb.4(0x40000000), %bb.2(0x40000000) - ; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C2]] - ; MIPS32: G_BRCOND [[AND1]](s32), %bb.4 - ; MIPS32: bb.2.pre.PHI.1.0: - ; MIPS32: successors: %bb.5(0x40000000), %bb.3(0x40000000) - ; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C3]] - ; MIPS32: G_BRCOND [[AND2]](s32), %bb.5 - ; MIPS32: bb.3.b.PHI.1.0: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.4.b.PHI.1.1: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: G_BR %bb.6 - ; MIPS32: bb.5.b.PHI.1.2: - ; MIPS32: successors: %bb.6(0x80000000) - ; MIPS32: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) - ; MIPS32: bb.6.b.PHI.1: - ; MIPS32: successors: %bb.7(0x40000000), %bb.13(0x40000000) - ; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 - ; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C4]] - ; MIPS32: G_BRCOND [[AND3]](s32), %bb.7 - ; MIPS32: G_BR %bb.13 - ; MIPS32: bb.7.b.PHI.1.end: - ; MIPS32: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.8.pre.PHI.2: - ; MIPS32: successors: %bb.9(0x40000000), %bb.10(0x40000000) - ; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) - ; MIPS32: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C5]] - ; MIPS32: G_BRCOND [[AND4]](s32), %bb.9 - ; MIPS32: G_BR %bb.10 - ; MIPS32: bb.9.b.PHI.2.0: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) - ; MIPS32: G_BR %bb.11 - ; MIPS32: bb.10.b.PHI.2.1: - ; MIPS32: successors: %bb.11(0x80000000) - ; MIPS32: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) - ; MIPS32: bb.11.b.PHI.2: - ; MIPS32: successors: %bb.13(0x40000000), %bb.12(0x40000000) - ; MIPS32: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 - ; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C6]] - ; MIPS32: G_BRCOND [[AND5]](s32), %bb.13 - ; MIPS32: bb.12.b.PHI.2.end: - ; MIPS32: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA - ; MIPS32: bb.13.b.PHI.3: - ; MIPS32: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 - ; MIPS32: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[C]](s64), %bb.6 - ; MIPS32: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 - ; MIPS32: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) - ; MIPS32: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C7]] - ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] - ; MIPS32: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) - ; MIPS32: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C7]] - ; MIPS32: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] - ; MIPS32: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) - ; MIPS32: RetRA + ; MIPS32-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) + ; MIPS32-NEXT: liveins: $a0, $a1, $a2, $a3 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 + ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 + ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 + ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.0, align 8) + ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 + ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1) + ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 + ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (p0) from %fixed-stack.2, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0.000000e+00 + ; MIPS32-NEXT: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C1]] + ; MIPS32-NEXT: G_BRCOND [[AND]](s32), %bb.8 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.1.pre.PHI.1: + ; MIPS32-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C2]] + ; MIPS32-NEXT: G_BRCOND [[AND1]](s32), %bb.4 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.2.pre.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.5(0x40000000), %bb.3(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND2:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C3]] + ; MIPS32-NEXT: G_BRCOND [[AND2]](s32), %bb.5 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.3.b.PHI.1.0: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.4.b.PHI.1.1: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD4:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: G_BR %bb.6 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.5.b.PHI.1.2: + ; MIPS32-NEXT: successors: %bb.6(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD5:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD1]](p0) :: (load (s64) from %ir.c) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.6.b.PHI.1: + ; MIPS32-NEXT: successors: %bb.7(0x40000000), %bb.13(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD3]](s64), %bb.3, [[LOAD4]](s64), %bb.4, [[LOAD5]](s64), %bb.5 + ; MIPS32-NEXT: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY7:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND3:%[0-9]+]]:gprb(s32) = G_AND [[COPY7]], [[C4]] + ; MIPS32-NEXT: G_BRCOND [[AND3]](s32), %bb.7 + ; MIPS32-NEXT: G_BR %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.7.b.PHI.1.end: + ; MIPS32-NEXT: G_STORE [[PHI]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.8.pre.PHI.2: + ; MIPS32-NEXT: successors: %bb.9(0x40000000), %bb.10(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY8:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) + ; MIPS32-NEXT: [[AND4:%[0-9]+]]:gprb(s32) = G_AND [[COPY8]], [[C5]] + ; MIPS32-NEXT: G_BRCOND [[AND4]](s32), %bb.9 + ; MIPS32-NEXT: G_BR %bb.10 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.9.b.PHI.2.0: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD6:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY3]](p0) :: (load (s64) from %ir.a) + ; MIPS32-NEXT: G_BR %bb.11 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.10.b.PHI.2.1: + ; MIPS32-NEXT: successors: %bb.11(0x80000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[LOAD7:%[0-9]+]]:fprb(s64) = G_LOAD [[LOAD]](p0) :: (load (s64) from %ir.b) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.11.b.PHI.2: + ; MIPS32-NEXT: successors: %bb.13(0x40000000), %bb.12(0x40000000) + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[PHI1:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD6]](s64), %bb.9, [[LOAD7]](s64), %bb.10 + ; MIPS32-NEXT: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY9:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND5:%[0-9]+]]:gprb(s32) = G_AND [[COPY9]], [[C6]] + ; MIPS32-NEXT: G_BRCOND [[AND5]](s32), %bb.13 + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.12.b.PHI.2.end: + ; MIPS32-NEXT: G_STORE [[PHI1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: bb.13.b.PHI.3: + ; MIPS32-NEXT: [[PHI2:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[PHI]](s64), %bb.6 + ; MIPS32-NEXT: [[PHI3:%[0-9]+]]:fprb(s64) = G_PHI [[PHI1]](s64), %bb.11, [[C]](s64), %bb.6 + ; MIPS32-NEXT: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 + ; MIPS32-NEXT: [[COPY10:%[0-9]+]]:gprb(s32) = COPY [[COPY2]](s32) + ; MIPS32-NEXT: [[AND6:%[0-9]+]]:gprb(s32) = G_AND [[COPY10]], [[C7]] + ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND6]](s32), [[PHI2]], [[PHI3]] + ; MIPS32-NEXT: [[COPY11:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32) + ; MIPS32-NEXT: [[AND7:%[0-9]+]]:gprb(s32) = G_AND [[COPY11]], [[C7]] + ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:fprb(s64) = G_SELECT [[AND7]](s32), [[SELECT]], [[PHI2]] + ; MIPS32-NEXT: G_STORE [[SELECT1]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: G_STORE [[PHI2]](s64), [[LOAD2]](p0) :: (store (s64) into %ir.result) + ; MIPS32-NEXT: RetRA bb.1.entry: liveins: $a0, $a1, $a2, $a3 diff --git a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir index 80bf04a..e48e8e2 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir @@ -19,10 +19,11 @@ body: | ; MIPS32-LABEL: name: store_i32 ; MIPS32: liveins: $a0, $a1 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 - ; MIPS32: G_STORE [[COPY]](s32), [[COPY1]](p0) :: (store (s32) into %ir.ptr) - ; MIPS32: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 + ; MIPS32-NEXT: G_STORE [[COPY]](s32), [[COPY1]](p0) :: (store (s32) into %ir.ptr) + ; MIPS32-NEXT: RetRA %0:_(s32) = COPY $a0 %1:_(p0) = COPY $a1 G_STORE %0(s32), %1(p0) :: (store (s32) into %ir.ptr) @@ -40,14 +41,15 @@ body: | ; MIPS32-LABEL: name: store_i64 ; MIPS32: liveins: $a0, $a1, $a2 - ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 - ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 - ; MIPS32: G_STORE [[COPY]](s32), [[COPY2]](p0) :: (store (s32) into %ir.ptr, align 8) - ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 - ; MIPS32: [[PTR_ADD:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY2]], [[C]](s32) - ; MIPS32: G_STORE [[COPY1]](s32), [[PTR_ADD]](p0) :: (store (s32) into %ir.ptr + 4, basealign 8) - ; MIPS32: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 + ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 + ; MIPS32-NEXT: G_STORE [[COPY]](s32), [[COPY2]](p0) :: (store (s32) into %ir.ptr, align 8) + ; MIPS32-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 + ; MIPS32-NEXT: [[PTR_ADD:%[0-9]+]]:gprb(p0) = nuw G_PTR_ADD [[COPY2]], [[C]](s32) + ; MIPS32-NEXT: G_STORE [[COPY1]](s32), [[PTR_ADD]](p0) :: (store (s32) into %ir.ptr + 4, basealign 8) + ; MIPS32-NEXT: RetRA %2:_(s32) = COPY $a0 %3:_(s32) = COPY $a1 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) @@ -67,10 +69,11 @@ body: | ; MIPS32-LABEL: name: store_float ; MIPS32: liveins: $a1, $f12 - ; MIPS32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 - ; MIPS32: G_STORE [[COPY]](s32), [[COPY1]](p0) :: (store (s32) into %ir.ptr) - ; MIPS32: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 + ; MIPS32-NEXT: G_STORE [[COPY]](s32), [[COPY1]](p0) :: (store (s32) into %ir.ptr) + ; MIPS32-NEXT: RetRA %0:_(s32) = COPY $f12 %1:_(p0) = COPY $a1 G_STORE %0(s32), %1(p0) :: (store (s32) into %ir.ptr) @@ -88,10 +91,11 @@ body: | ; MIPS32-LABEL: name: store_double ; MIPS32: liveins: $a2, $d6 - ; MIPS32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6 - ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a2 - ; MIPS32: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store (s64) into %ir.ptr) - ; MIPS32: RetRA + ; MIPS32-NEXT: {{ $}} + ; MIPS32-NEXT: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6 + ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a2 + ; MIPS32-NEXT: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store (s64) into %ir.ptr) + ; MIPS32-NEXT: RetRA %0:_(s64) = COPY $d6 %1:_(p0) = COPY $a2 G_STORE %0(s64), %1(p0) :: (store (s64) into %ir.ptr) diff --git a/llvm/test/CodeGen/Mips/abiflags-soft-float.ll b/llvm/test/CodeGen/Mips/abiflags-soft-float.ll new file mode 100644 index 0000000..01821f2 --- /dev/null +++ b/llvm/test/CodeGen/Mips/abiflags-soft-float.ll @@ -0,0 +1,12 @@ +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o tmp.o +; RUN: llvm-readobj -A tmp.o | FileCheck %s -check-prefix=OBJ +; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | \ +; RUN: FileCheck %s -check-prefix=ASM + +; OBJ: FP ABI: Soft float +; ASM: .module softfloat + +define dso_local void @asm_is_null() "use-soft-float"="true" { + call void asm sideeffect "", ""() + ret void +} diff --git a/llvm/test/CodeGen/Mips/nan_lowering.ll b/llvm/test/CodeGen/Mips/nan_lowering.ll new file mode 100644 index 0000000..2a11278 --- /dev/null +++ b/llvm/test/CodeGen/Mips/nan_lowering.ll @@ -0,0 +1,25 @@ +; RUN: llc -mtriple=mips-linux-gnu -mattr=-nan2008 < %s | FileCheck %s +; RUN: llc -mtriple=mips-linux-gnu -mattr=+nan2008 < %s | FileCheck %s + +; Make sure that lowering does not corrupt the value of NaN values, +; regardless of what the NaN mode is. + +define float @test1() { +; CHECK: .4byte 0x7fc00000 + ret float bitcast (i32 u0x7fc00000 to float) +} + +define float @test2() { +; CHECK: .4byte 0x7fc00001 + ret float bitcast (i32 u0x7fc00001 to float) +} + +define float @test3() { +; CHECK: .4byte 0x7f800000 + ret float bitcast (i32 u0x7f800000 to float) +} + +define float @test4() { +; CHECK: .4byte 0x7f800001 + ret float bitcast (i32 u0x7f800001 to float) +} diff --git a/llvm/test/CodeGen/Mips/qnan.ll b/llvm/test/CodeGen/Mips/qnan.ll deleted file mode 100644 index e5b4aa1..0000000 --- a/llvm/test/CodeGen/Mips/qnan.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: llc -O3 -mcpu=mips32r2 -mtriple=mips-linux-gnu < %s -o - | FileCheck %s -check-prefixes=MIPS_Legacy -; RUN: llc -O3 -mcpu=mips32r2 -mtriple=mips-linux-gnu -mattr=+nan2008 < %s -o - | FileCheck %s -check-prefixes=MIPS_NaN2008 - -define dso_local float @nan(float noundef %a, float noundef %b) local_unnamed_addr #0 { -; MIPS_Legacy: $CPI0_0: -; MIPS_Legacy-NEXT: .4byte 0x7fa00000 # float NaN - -; MIPS_NaN2008: $CPI0_0: -; MIPS_NaN2008-NEXT: .4byte 0x7fc00000 # float NaN - -entry: - %0 = tail call float @llvm.minimum.f32(float %a, float %b) - ret float %0 -} |