diff options
Diffstat (limited to 'llvm/test/CodeGen/DirectX')
109 files changed, 1140 insertions, 405 deletions
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll index 9f87f5b..261bbe1 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll @@ -13,7 +13,7 @@ define void @test_overlapping() { entry: - %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, i1 false, ptr @A.str) - %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 10, i32 4, i1 false, ptr @B.str) + %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, ptr @A.str) + %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 10, i32 4, ptr @B.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll index dd50428..f4242f8 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll @@ -13,7 +13,7 @@ define void @test_overlapping() { entry: - %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, i1 false, ptr @R.str) - %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, i1 false, ptr @S.str) + %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, ptr @R.str) + %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, ptr @S.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll index 31b1dbf..67365ee 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll @@ -30,16 +30,16 @@ target triple = "dxil-pc-shadermodel6.3-library" define void @test_overlapping() "hlsl.export" { entry: - %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @A.str) + %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @A.str) store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4 - %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, i1 false, ptr @B.str) + %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, ptr @B.str) store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4 - %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, i1 false, ptr @C.str) + %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, ptr @C.str) store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4 - %h4 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @S.str) + %h4 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @S.str) store target("dx.TypedBuffer", float, 1, 0, 0) %h4, ptr @Four, align 4 ret void diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll index 8ca8708..bd8dda7 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll @@ -28,13 +28,13 @@ target triple = "dxil-pc-shadermodel6.3-library" define void @test_overlapping() "hlsl.export" { entry: - %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 5, i32 0, i1 false, ptr @A.str) + %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 5, i32 0, ptr @A.str) store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4 - %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 2, i32 0, i1 false, ptr @B.str) + %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 2, i32 0, ptr @B.str) store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4 - %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 3, i32 4, i1 false, ptr @C.str) + %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 3, i32 4, ptr @C.str) store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4 ret void diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll index 7f16317..b047a22 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll @@ -26,13 +26,13 @@ target triple = "dxil-pc-shadermodel6.3-library" define void @test_overlapping() "hlsl.export" { entry: - %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 1, i32 5, i32 0, i1 false, ptr @A.str) + %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 1, i32 5, i32 0, ptr @A.str) store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4 - %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 2, i32 6, i32 0, i1 false, ptr @B.str) + %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 2, i32 6, i32 0, ptr @B.str) store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4 - %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 6, i32 3, i32 4, i1 false, ptr @C.str) + %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 6, i32 3, i32 4, ptr @C.str) store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4 ret void diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll index 3c37e63..a58e85b 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll @@ -17,8 +17,8 @@ target triple = "dxil-pc-shadermodel6.3-library" define void @test_overlapping() { entry: - %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 3, i32 0, i1 false, ptr @A.str) - %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 4, i32 -1, i32 0, i1 false, ptr @B.str) - %h3 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 17, i32 1, i32 0, i1 false, ptr @C.str) + %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 3, i32 0, ptr @A.str) + %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 4, i32 -1, i32 0, ptr @B.str) + %h3 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 17, i32 1, i32 0, ptr @C.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll new file mode 100644 index 0000000..9c52d6e --- /dev/null +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll @@ -0,0 +1,35 @@ +; Use llc for this test so that we don't abort after the first error. +; RUN: not llc %s -o /dev/null 2>&1 | FileCheck %s + +; Check that there is no overlap with unbounded array in different space + + ; Buffer<double> A[2] : register(t2, space4); + ; Buffer<double> B : register(t20, space5); // does not overlap + ; Buffer<double> C[] : register(t2, space4); // overlaps with A + +; CHECK: error: resource A at register 2 overlaps with resource C at register 2 in space 4 +; CHECK-NOT: error: resource C at register 2 overlaps with resource B at register 20 in space 5 + +target triple = "dxil-pc-shadermodel6.3-library" + +@A.str = private unnamed_addr constant [2 x i8] c"A\00", align 1 +@B.str = private unnamed_addr constant [2 x i8] c"B\00", align 1 +@C.str = private unnamed_addr constant [2 x i8] c"C\00", align 1 + +define void @test_not_overlapping_in_different_spaces() { +entry: + + ; Buffer<double> A[2] : register(t2, space4); + %h0 = call target("dx.TypedBuffer", double, 0, 0, 0) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 2, i32 10, ptr @A.str) + + ; Buffer<double> B : register(t20, space5); + %h1 = call target("dx.TypedBuffer", i64, 0, 0, 0) + @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, ptr @B.str) + + ; Buffer<double> C[] : register(t2, space4); + %h2 = call target("dx.TypedBuffer", double, 0, 0, 0) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @C.str) + + ret void +} diff --git a/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll b/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll index 6f0ef29..b433bce 100644 --- a/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll +++ b/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll @@ -7,7 +7,7 @@ target triple = "dxil-pc-shadermodel6.1-compute" define void @loadf32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", float, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle %{{.*}}, i32 %index, i32 0) %load = call {float, i1} @@ -23,7 +23,7 @@ define void @loadf32_struct(i32 %index) { define void @loadv4f32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle %{{.*}}, i32 %offset, i32 0) %load = call {<4 x float>, i1} @@ -39,7 +39,7 @@ define void @loadv4f32_byte(i32 %offset) { define void @loadnested(i32 %index) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATAI32:%.*]] = call %dx.types.ResRet.i32 @dx.op.bufferLoad.i32(i32 68, %dx.types.Handle %{{.*}}, i32 %index, i32 0) %loadi32 = call {i32, i1} @llvm.dx.resource.load.rawbuffer.i32( diff --git a/llvm/test/CodeGen/DirectX/BufferLoad.ll b/llvm/test/CodeGen/DirectX/BufferLoad.ll index 589d551..77f56a0 100644 --- a/llvm/test/CodeGen/DirectX/BufferLoad.ll +++ b/llvm/test/CodeGen/DirectX/BufferLoad.ll @@ -11,7 +11,7 @@ define void @loadv4f32() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -70,7 +70,7 @@ define void @index_dynamic(i32 %bufindex, i32 %elemindex) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[LOAD:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 %bufindex, i32 undef) #[[#ATTR]] %load = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer( @@ -106,7 +106,7 @@ define void @loadf32() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", float, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %load0 = call {float, i1} @llvm.dx.resource.load.typedbuffer( @@ -125,7 +125,7 @@ define void @loadv2f32() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <2 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<2 x float>, i1} @llvm.dx.resource.load.typedbuffer( @@ -139,7 +139,7 @@ define void @loadv4f32_checkbit() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer.f32( @@ -160,7 +160,7 @@ define void @loadv4i32() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.i32 @dx.op.bufferLoad.i32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<4 x i32>, i1} @llvm.dx.resource.load.typedbuffer( @@ -174,7 +174,7 @@ define void @loadv4f16() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x half>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f16 @dx.op.bufferLoad.f16(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<4 x half>, i1} @llvm.dx.resource.load.typedbuffer( @@ -188,7 +188,7 @@ define void @loadv4i16() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x i16>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i16_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.i16 @dx.op.bufferLoad.i16(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<4 x i16>, i1} @llvm.dx.resource.load.typedbuffer( @@ -202,7 +202,7 @@ define void @loadf64() { ; CHECK: [[B1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 1, i32 1, i32 0, i8 1 }, i32 1, i1 false) #0 %buffer = call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; CHECK: [[BA:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[B1]], %dx.types.ResourceProperties { i32 4106, i32 266 }) #0 %load = call { <2 x i32>, i1 } @llvm.dx.resource.load.typedbuffer( @@ -218,7 +218,7 @@ define void @loadv2f64() { ; CHECK: [[B1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 1, i32 1, i32 0, i8 1 }, i32 1, i1 false) #0 %buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; CHECK: [[BA:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[B1]], %dx.types.ResourceProperties { i32 4106, i32 522 }) #0 %load = call { <4 x i32>, i1 } @llvm.dx.resource.load.typedbuffer( diff --git a/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll b/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll index 25abf21..fb81f5e 100644 --- a/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll +++ b/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll @@ -6,10 +6,10 @@ define void @loadf64() { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", double, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we load an <2 x i32> instead of a double ; CHECK-NOT: call {double, i1} @llvm.dx.resource.load.typedbuffer @@ -33,10 +33,10 @@ define void @loadv2f64() { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we load an <4 x i32> instead of a double2 ; CHECK: [[L0:%.*]] = call { <4 x i32>, i1 } @@ -65,10 +65,10 @@ define void @loadf64WithCheckBit() { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", double, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we load an <2 x i32> instead of a double ; CHECK-NOT: call {double, i1} @llvm.dx.resource.load.typedbuffer diff --git a/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll b/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll index 42c0012..3107d7e 100644 --- a/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll +++ b/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll @@ -5,7 +5,7 @@ target triple = "dxil-pc-shadermodel6.2-compute" define void @loadi64() { ; CHECK-LABEL: define void @loadi64() { -; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[TMP1:%.*]] = call { <2 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v2i32.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) [[BUFFER]], i32 0) ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <2 x i32>, i1 } [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[TMP2]], i32 0 @@ -16,14 +16,14 @@ define void @loadi64() { ; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]] ; CHECK-NEXT: ret void ; - %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %result = call { i64, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0) ret void } define void @loadv2i64() { ; CHECK-LABEL: define void @loadv2i64() { -; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[TMP1:%.*]] = call { <4 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v4i32.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) [[BUFFER]], i32 0) ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <4 x i32>, i1 } [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP2]], i32 0 @@ -42,7 +42,7 @@ define void @loadv2i64() { ; CHECK-NEXT: [[TMP16:%.*]] = insertelement <2 x i64> [[TMP11]], i64 [[TMP15]], i32 1 ; CHECK-NEXT: ret void ; - %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %result = call { <2 x i64>, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0) ret void } diff --git a/llvm/test/CodeGen/DirectX/BufferStore-errors.ll b/llvm/test/CodeGen/DirectX/BufferStore-errors.ll index 663de83..e8aadbb 100644 --- a/llvm/test/CodeGen/DirectX/BufferStore-errors.ll +++ b/llvm/test/CodeGen/DirectX/BufferStore-errors.ll @@ -9,7 +9,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @storetoomany(<5 x float> %data, i32 %index) "hlsl.export" { %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v4f32_1_0_0t.v5f32( target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %buffer, diff --git a/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll b/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll index dff28db..188ac75 100644 --- a/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll +++ b/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll @@ -7,7 +7,7 @@ target triple = "dxil-pc-shadermodel6.1-compute" define void @storef32_struct(i32 %index, float %data) { %buffer = call target("dx.RawBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %{{.*}}, i32 %index, i32 0, float %data, float undef, float undef, float undef, i8 1) call void @llvm.dx.resource.store.rawbuffer.f32( @@ -21,7 +21,7 @@ define void @storef32_struct(i32 %index, float %data) { define void @storef32_byte(i32 %offset, float %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, float %data, float undef, float undef, float undef, i8 1) call void @llvm.dx.resource.store.rawbuffer.f32( @@ -35,7 +35,7 @@ define void @storef32_byte(i32 %offset, float %data) { define void @storev4f32_struct(i32 %index, <4 x float> %data) { %buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1 @@ -53,7 +53,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) { define void @storev4f32_byte(i32 %offset, <4 x float> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1 @@ -71,7 +71,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) { define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0_0:%.*]] = extractelement <4 x float> %data0, i32 0 ; CHECK: [[DATA0_1:%.*]] = extractelement <4 x float> %data0, i32 1 @@ -98,7 +98,7 @@ define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) { define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half> %data2) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.bufferStore.i32(i32 69, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i32 %data0, i32 undef, i32 undef, i32 undef, i8 1) call void @llvm.dx.resource.store.rawbuffer.i32( diff --git a/llvm/test/CodeGen/DirectX/BufferStore.ll b/llvm/test/CodeGen/DirectX/BufferStore.ll index 39d578e..bd22568 100644 --- a/llvm/test/CodeGen/DirectX/BufferStore.ll +++ b/llvm/test/CodeGen/DirectX/BufferStore.ll @@ -9,7 +9,7 @@ define void @storefloats(<4 x float> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -33,7 +33,7 @@ define void @storeonefloat(float %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -53,7 +53,7 @@ define void @storetwofloat(<2 x float> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <2 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -75,7 +75,7 @@ define void @storeint(<4 x i32> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x i32>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0_0:%.*]] = extractelement <4 x i32> %data, i32 0 ; CHECK: [[DATA0_1:%.*]] = extractelement <4 x i32> %data, i32 1 @@ -96,7 +96,7 @@ define void @storehalf(<4 x half> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -120,7 +120,7 @@ define void @storei16(<4 x i16> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x i16>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i16_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -144,7 +144,7 @@ define void @store_scalarized_floats(float %data0, float %data1, float %data2, f ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; We shouldn't end up with any inserts/extracts. ; CHECK-NOT: insertelement @@ -168,7 +168,7 @@ define void @storef64(<2 x i32> %0) { %buffer = tail call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -187,7 +187,7 @@ define void @storev2f64(<4 x i32> %0) { %buffer = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle diff --git a/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll b/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll index 9c3dab0..35c6f7e 100644 --- a/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll +++ b/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll @@ -5,10 +5,10 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @storef64(double %0) { ; CHECK: [[B:%.*]] = tail call target("dx.TypedBuffer", double, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we split the double and store the lo and hi bits ; CHECK: [[SD:%.*]] = call { i32, i32 } @llvm.dx.splitdouble.i32(double %0) @@ -28,10 +28,10 @@ define void @storef64(double %0) { define void @storev2f64(<2 x double> %0) { ; CHECK: [[B:%.*]] = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[SD:%.*]] = call { <2 x i32>, <2 x i32> } ; CHECK-SAME: @llvm.dx.splitdouble.v2i32(<2 x double> %0) diff --git a/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll b/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll index c97a02d..1241701 100644 --- a/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll +++ b/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll @@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @storei64(i64 %0) { ; CHECK-LABEL: define void @storei64( ; CHECK-SAME: i64 [[TMP0:%.*]]) { -; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP0]] to i32 ; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP0]], 32 ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32 @@ -15,7 +15,7 @@ define void @storei64(i64 %0) { ; CHECK-NEXT: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_i64_1_0_0t.v2i32(target("dx.TypedBuffer", i64, 1, 0, 0) [[BUFFER]], i32 0, <2 x i32> [[TMP6]]) ; CHECK-NEXT: ret void ; - %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0,i64 %0) ret void } @@ -24,7 +24,7 @@ define void @storei64(i64 %0) { define void @storev2i64(<2 x i64> %0) { ; CHECK-LABEL: define void @storev2i64( ; CHECK-SAME: <2 x i64> [[TMP0:%.*]]) { -; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i64> [[TMP0]] to <2 x i32> ; CHECK-NEXT: [[TMP3:%.*]] = lshr <2 x i64> [[TMP0]], splat (i64 32) ; CHECK-NEXT: [[TMP4:%.*]] = trunc <2 x i64> [[TMP3]] to <2 x i32> @@ -32,7 +32,7 @@ define void @storev2i64(<2 x i64> %0) { ; CHECK-NEXT: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t.v4i32(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) [[BUFFER]], i32 0, <4 x i32> [[TMP13]]) ; CHECK-NEXT: ret void ; - %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0, <2 x i64> %0) ret void } diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll index bb0bcc52..52ad0f3 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll @@ -13,7 +13,7 @@ ; CHECK: define void @f define void @f(ptr %dst) { entry: - %CB.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_36_0tt(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_36_0tt(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) %CB.cb_h, ptr @CB.cb, align 4 ; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll index b4493bb..db4e14c 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll @@ -27,7 +27,7 @@ ; CHECK: define void @f define void @f(ptr %dst) { entry: - %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) %CB.cb_h.i.i, ptr @CB.cb, align 4 ; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll index 001f332..a78fdd5 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll @@ -25,7 +25,7 @@ ; CHECK: define void @f( define void @f(ptr %dst) { entry: - %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) %CB.cb_h.i.i, ptr @CB.cb, align 4 %a1.copy = alloca [3 x float], align 4 diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll index f062b3e..7857c25 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll @@ -25,7 +25,7 @@ ; CHECK: define void @f define void @f(ptr %dst) { entry: - %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) %CB.cb_h.i.i, ptr @CB.cb, align 4 ; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll index f46c91f..4160008 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll @@ -23,7 +23,7 @@ ; CHECK: define void @f define void @f(ptr %dst) { entry: - %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) %CB.cb_h.i.i, ptr @CB.cb, align 4 ; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb diff --git a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll index 7fe6e03..71dcf11 100644 --- a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll +++ b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll @@ -12,7 +12,7 @@ declare void @f16_user(half) ; CHECK-SAME: Type mismatch between intrinsic and DXIL op define void @four64() "hlsl.export" { %buffer = call target("dx.CBuffer", target("dx.Layout", {double}, 8, 0)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {double, double, double, double} @llvm.dx.resource.load.cbufferrow.4( target("dx.CBuffer", target("dx.Layout", {double}, 8, 0)) %buffer, @@ -29,7 +29,7 @@ define void @four64() "hlsl.export" { ; CHECK-SAME: Type mismatch between intrinsic and DXIL op define void @two32() "hlsl.export" { %buffer = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, float} @llvm.dx.resource.load.cbufferrow.2( target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) %buffer, diff --git a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll index c2df5ef..d690651 100644 --- a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll +++ b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll @@ -9,7 +9,7 @@ declare void @f16_user(half) ; CHECK-LABEL: define void @loadf32 define void @loadf32() { %buffer = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f32 @dx.op.cbufferLoadLegacy.f32(i32 59, %dx.types.Handle %{{.*}}, i32 0) %load = call {float, float, float, float} @llvm.dx.resource.load.cbufferrow.4( @@ -28,7 +28,7 @@ define void @loadf32() { define void @loadf64() { %buffer = call target("dx.CBuffer", target("dx.Layout", {double, double, double, double}, 64, 0, 8, 16, 24)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f64 @dx.op.cbufferLoadLegacy.f64(i32 59, %dx.types.Handle %{{.*}}, i32 1) %load = call {double, double} @llvm.dx.resource.load.cbufferrow.2( @@ -47,7 +47,7 @@ define void @loadf64() { define void @loadf16() { %buffer = call target("dx.CBuffer", target("dx.Layout", {half}, 2, 0)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f16.8 @dx.op.cbufferLoadLegacy.f16(i32 59, %dx.types.Handle %{{.*}}, i32 0) %load = call {half, half, half, half, half, half, half, half} @llvm.dx.resource.load.cbufferrow.8( diff --git a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll index aad1f92..bcf82a6 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll @@ -14,12 +14,12 @@ target triple = "dxil-unknown-shadermodel6.0-compute" define void @main() #0 { %uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0t( - i32 2, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 2, i32 7, i32 1, i32 0, ptr null) %srv0 = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) %cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll index 8533ab2..bea0310 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll @@ -15,7 +15,7 @@ define void @main() #0 { ; CHECK: Flags: ; CHECK: UsedByAtomic64: false %cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, ptr null) ; ByteAddressBuffer Buf : register(t8, space1) ; CHECK: - Type: SRVRaw @@ -27,7 +27,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %srv0 = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) ; struct S { float4 a; uint4 b; }; ; StructuredBuffer<S> Buf : register(t2, space4) @@ -40,7 +40,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %srv1 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t( - i32 4, i32 2, i32 1, i32 0, i1 false, ptr null) + i32 4, i32 2, i32 1, i32 0, ptr null) ; Buffer<uint4> Buf[24] : register(t3, space5) ; CHECK: - Type: SRVTyped @@ -52,7 +52,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %srv2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0t( - i32 5, i32 3, i32 24, i32 0, i1 false, ptr null) + i32 5, i32 3, i32 24, i32 0, ptr null) ; RWBuffer<int> Buf : register(u7, space2) ; CHECK: - Type: UAVTyped @@ -64,7 +64,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0t( - i32 2, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 2, i32 7, i32 1, i32 0, ptr null) ; RWBuffer<float4> Buf : register(u5, space3) ; CHECK: - Type: UAVTyped @@ -76,7 +76,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %uav1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( - i32 3, i32 5, i32 1, i32 0, i1 false, ptr null) + i32 3, i32 5, i32 1, i32 0, ptr null) ; RWBuffer<float4> BufferArray[10] : register(u0, space4) ; CHECK: - Type: UAVTyped @@ -89,11 +89,11 @@ define void @main() #0 { ; RWBuffer<float4> Buf = BufferArray[0] %uav2_1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( - i32 4, i32 0, i32 10, i32 0, i1 false, ptr null) + i32 4, i32 0, i32 10, i32 0, ptr null) ; RWBuffer<float4> Buf = BufferArray[5] %uav2_2 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( - i32 4, i32 0, i32 10, i32 5, i1 false, ptr null) + i32 4, i32 0, i32 10, i32 5, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll index 8eb7f90..1bc9b85 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll @@ -59,7 +59,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ;DXC-NEXT: NumRootParameters: 1 ;DXC-NEXT: RootParametersOffset: 24 ;DXC-NEXT: NumStaticSamplers: 0 -;DXC-NEXT: StaticSamplersOffset: 0 +;DXC-NEXT: StaticSamplersOffset: 380 ;DXC-NEXT: Parameters: ;DXC-NEXT: - ParameterType: 0 ;DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll index 053721d..fec6c4c 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll @@ -24,7 +24,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 84 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 0 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable.ll index 8e9b4b4..4f6f0d0 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable.ll @@ -26,7 +26,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 92 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 0 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll index 10235b7..165e480 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll @@ -25,6 +25,6 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 0 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 24 ; DXC-NEXT: Parameters: [] ; DXC-NEXT: AllowInputAssemblerInputLayout: true diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll index 6477ad3..742fea1 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll @@ -25,18 +25,18 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ;CHECK-NEXT: Version: 2 ;CHECK-NEXT: RootParametersOffset: 24 ;CHECK-NEXT: NumParameters: 3 -;CHECK-NEXT: - Parameter Type: 1 -;CHECK-NEXT: Shader Visibility: 0 +;CHECK-NEXT: - Parameter Type: Constants32Bit +;CHECK-NEXT: Shader Visibility: All ;CHECK-NEXT: Register Space: 2 ;CHECK-NEXT: Shader Register: 1 ;CHECK-NEXT: Num 32 Bit Values: 3 -;CHECK-NEXT: - Parameter Type: 3 -;CHECK-NEXT: Shader Visibility: 1 +;CHECK-NEXT: - Parameter Type: SRV +;CHECK-NEXT: Shader Visibility: Vertex ;CHECK-NEXT: Register Space: 5 ;CHECK-NEXT: Shader Register: 4 ;CHECK-NEXT: Flags: 4 -;CHECK-NEXT: - Parameter Type: 0 -;CHECK-NEXT: Shader Visibility: 0 +;CHECK-NEXT: - Parameter Type: DescriptorTable +;CHECK-NEXT: Shader Visibility: All ;CHECK-NEXT: NumRanges: 2 ;CHECK-NEXT: - Range Type: 0 ;CHECK-NEXT: Register Space: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll index 964554f..d217f39 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll @@ -24,7 +24,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 48 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 1 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor.ll index f77bb96..54292bb 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor.ll @@ -24,7 +24,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 48 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 2 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor_V1.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor_V1.ll index ddf556e..891a03b 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor_V1.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor_V1.ll @@ -24,7 +24,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 44 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 2 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/CreateHandle.ll b/llvm/test/CodeGen/DirectX/CreateHandle.ll index c471fb0..6cca501 100644 --- a/llvm/test/CodeGen/DirectX/CreateHandle.ll +++ b/llvm/test/CodeGen/DirectX/CreateHandle.ll @@ -25,14 +25,14 @@ define void @test_buffers() { ; RWBuffer<float4> Buf : register(u5, space3) %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 3, i32 5, i32 1, i32 0, i1 false, ptr @BufA.str) + i32 3, i32 5, i32 1, i32 0, ptr @BufA.str) ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 1, i32 5, i1 false) #[[#ATTR:]] ; CHECK-NOT: @llvm.dx.cast.handle ; RWBuffer<int> Buf : register(u7, space2) %typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_1t( - i32 2, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 2, i32 7, i32 1, i32 0, ptr null) ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 0, i32 7, i1 false) #[[#ATTR]] ; Buffer<uint4> Buf[24] : register(t3, space5) @@ -40,20 +40,20 @@ define void @test_buffers() { ; Note that the index below is 3 + 4 = 7 %typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0_0t( - i32 5, i32 3, i32 24, i32 4, i1 false, ptr @BufB.str) + i32 5, i32 3, i32 24, i32 4, ptr @BufB.str) ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 3, i32 7, i1 false) #[[#ATTR]] ; struct S { float4 a; uint4 b; }; ; StructuredBuffer<S> Buf : register(t2, space4) %struct0 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t( - i32 4, i32 2, i32 1, i32 0, i1 true, ptr null) - ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 2, i32 2, i1 true) #[[#ATTR]] + i32 4, i32 2, i32 1, i32 0, ptr null) + ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 2, i32 2, i1 false) #[[#ATTR]] ; ByteAddressBuffer Buf : register(t8, space1) %byteaddr0 = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 1, i32 8, i1 false) #[[#ATTR]] ; Buffer<float4> Buf[] : register(t7) @@ -61,7 +61,7 @@ define void @test_buffers() { %typed3_ix = call i32 @some_val() %typed3 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0t( - i32 0, i32 7, i32 -1, i32 %typed3_ix, i1 false, ptr null) + i32 0, i32 7, i32 -1, i32 %typed3_ix, ptr null) ; CHECK: %[[IX:.*]] = add i32 %typed3_ix, 7 ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 0, i32 %[[IX]], i1 false) #[[#ATTR]] diff --git a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll index 4af5d418..38f2de2 100644 --- a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll +++ b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll @@ -26,14 +26,14 @@ define void @test_bindings() { ; RWBuffer<float4> Buf : register(u5, space3) %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 3, i32 5, i32 1, i32 0, i1 false, ptr @BufA.str) + i32 3, i32 5, i32 1, i32 0, ptr @BufA.str) ; CHECK: [[BUF0:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 5, i32 5, i32 3, i8 1 }, i32 5, i1 false) #[[#ATTR:]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF0]], %dx.types.ResourceProperties { i32 4106, i32 1033 }) #[[#ATTR]] ; RWBuffer<int> Buf : register(u7, space2) %typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t( - i32 2, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 2, i32 7, i32 1, i32 0, ptr null) ; CHECK: [[BUF1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 7, i32 7, i32 2, i8 1 }, i32 7, i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF1]], %dx.types.ResourceProperties { i32 4106, i32 260 }) #[[#ATTR]] @@ -42,7 +42,7 @@ define void @test_bindings() { ; Note that the index below is 3 + 4 = 7 %typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0_0t( - i32 5, i32 3, i32 24, i32 4, i1 false, ptr @BufB.str) + i32 5, i32 3, i32 24, i32 4, ptr @BufB.str) ; CHECK: [[BUF2:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 3, i32 26, i32 5, i8 0 }, i32 7, i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF2]], %dx.types.ResourceProperties { i32 10, i32 1029 }) #[[#ATTR]] @@ -50,14 +50,14 @@ define void @test_bindings() { ; StructuredBuffer<S> Buf : register(t2, space4) %struct0 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t( - i32 4, i32 2, i32 1, i32 0, i1 true, ptr null) - ; CHECK: [[BUF3:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 2, i32 2, i32 4, i8 0 }, i32 2, i1 true) #[[#ATTR]] + i32 4, i32 2, i32 1, i32 0, ptr null) + ; CHECK: [[BUF3:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 2, i32 2, i32 4, i8 0 }, i32 2, i1 false) #[[#ATTR]] ; CHECK: = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF3]], %dx.types.ResourceProperties { i32 1036, i32 32 }) #[[#ATTR]] ; ByteAddressBuffer Buf : register(t8, space1) %byteaddr0 = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) ; CHECK: [[BUF4:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 8, i32 8, i32 1, i8 0 }, i32 8, i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF4]], %dx.types.ResourceProperties { i32 11, i32 0 }) #[[#ATTR]] @@ -66,14 +66,14 @@ define void @test_bindings() { %typed3_ix = call i32 @some_val() %typed3 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0t( - i32 0, i32 7, i32 -1, i32 %typed3_ix, i1 false, ptr null) + i32 0, i32 7, i32 -1, i32 %typed3_ix, ptr null) ; CHECK: %[[IX:.*]] = add i32 %typed3_ix, 7 ; CHECK: [[BUF5:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 7, i32 -1, i32 0, i8 0 }, i32 %[[IX]], i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF5]], %dx.types.ResourceProperties { i32 10, i32 1033 }) #[[#ATTR]] ; cbuffer cb0 : register(b0) { int4 i; float4 f; } %cb0 = call target("dx.CBuffer", target("dx.Layout", {<4 x i32>, <4 x float>}, 32, 0, 16)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[BUF6:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 0, i32 0, i32 0, i8 2 }, i32 0, i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF6]], %dx.types.ResourceProperties { i32 13, i32 32 }) #[[#ATTR]] diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll index 9ff4b6f..61d346c 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll @@ -8,7 +8,7 @@ define float @f() { entry: %buf = alloca target("dx.RawBuffer", <4 x float>, 1, 0), align 4 - %h = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %h = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %h, ptr %buf, align 4 %b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr %buf, align 4 diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll index e8cfa5a..326d3ad 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll @@ -7,9 +7,9 @@ define float @f() { entry: - %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %h1, ptr @Buf, align 4 - %h2 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + %h2 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %h2, ptr @Buf, align 4 %b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr @Buf, align 4 diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll index a7c5362..2c6e5ae 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll @@ -13,13 +13,13 @@ entry: %Index.addr.i2 = alloca i32, align 4 %this.addr.i = alloca ptr, align 4 %Index.addr.i = alloca i32, align 4 - ; CHECK: [[IN:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) - %_ZL2In_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK: [[IN:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, ptr null) + %_ZL2In_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %_ZL2In_h.i.i, ptr @_ZL2In, align 4 store ptr @_ZL2In, ptr %this.addr.i.i, align 4 %this1.i.i = load ptr, ptr %this.addr.i.i, align 4 - ; CHECK: [[OUT:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null) - %_ZL3Out_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK: [[OUT:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, ptr null) + %_ZL3Out_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %_ZL3Out_h.i.i, ptr @_ZL3Out, align 4 store ptr @_ZL3Out, ptr %this.addr.i.i.i, align 4 %this1.i.i.i = load ptr, ptr %this.addr.i.i.i, align 4 diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll index c0db80c..26b157f 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll @@ -10,9 +10,9 @@ define void @main() local_unnamed_addr #1 { entry: ; CHECK: [[CB:%.*]] = tail call target({{.*}}) @llvm.dx.resource.handlefrombinding - %h = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %h = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) %h, ptr @CB.cb, align 4 - %_ZL3Out_h.i.i = tail call target("dx.RawBuffer", %struct.Scalars, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %_ZL3Out_h.i.i = tail call target("dx.RawBuffer", %struct.Scalars, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: load target({{.*}}), ptr @CB.cb %cb = load target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)), ptr @CB.cb, align 4 ; CHECK: call { float, float, float, float } @llvm.dx.resource.load.cbufferrow.4.{{.*}}(target({{.*}}) [[CB]], i32 0) @@ -21,7 +21,7 @@ entry: call void @llvm.dx.resource.store.rawbuffer(target("dx.RawBuffer", %struct.Scalars, 1, 0) %_ZL3Out_h.i.i, i32 0, i32 0, float %1) ; CHECK: [[CB2:%.*]] = tail call target({{.*}}) @llvm.dx.resource.handlefromimplicitbinding - %h2 = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null) + %h2 = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) %h2, ptr @CB2.cb, align 4 ; CHECK-NOT: load target({{.*}}), ptr @CB2.cb %cb2 = load target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)), ptr @CB2.cb, align 4 @@ -29,4 +29,4 @@ entry: ret void } -attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, argmem: write, inaccessiblemem: none) "approx-func-fp-math"="false" "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, argmem: write, inaccessiblemem: none) "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll index 6bfe28c..32c59e7 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll @@ -9,7 +9,7 @@ define void @f() { entry: %b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr @Buf, align 4 - %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %h1, ptr @Buf, align 4 ret void diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll index 13ab035..3775491 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll @@ -12,34 +12,34 @@ define void @test_arrays() { ; RWBuffer<float> A : register(u2); %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 1, i32 0, ptr null) ; RWBuffer<float> E[2]; %bufE = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 30, i32 0, i32 5, i32 4, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 30, i32 0, i32 5, i32 4, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 7, i32 5, i32 4, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 7, i32 5, i32 4, ptr null) ; RWBuffer<float> B[4]; %bufB = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 2, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 2, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 2, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 2, ptr null) ; RWBuffer<int> C[2]; %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 20, i32 0, i32 2, i32 1, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 20, i32 0, i32 2, i32 1, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 0, i32 2, i32 1, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 0, i32 2, i32 1, ptr null) ; another access to resource array B to make sure it gets the same binding %bufB2 = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding ret void diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll index 2403561..33a967e 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll @@ -14,40 +14,40 @@ define void @test_many_spaces() { ; RWBuffer<float> A : register(u5); %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 5, i32 1, i32 0, ptr null) ; RWBuffer<int> B[]; %bufB = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, ptr null) ; RWBuffer<float> C[4] : register(space5); %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 5, i32 4, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 5, i32 4, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 0, i32 4, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 0, i32 4, i32 0, ptr null) ; RWBuffer<int> D[] : register(space5); %bufD = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 102, i32 5, i32 -1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 102, i32 5, i32 -1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 4, i32 -1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 4, i32 -1, i32 0, ptr null) ; RWBuffer<float> E[3] : register(space10); // gets u0, space10 %bufE = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 103, i32 10, i32 4, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 103, i32 10, i32 4, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 10, i32 0, i32 4, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 10, i32 0, i32 4, i32 0, ptr null) ; StructuredBuffer<int> F : register(space3); // gets t0 in space3 %bufF = call target("dx.RawBuffer", i32, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 104, i32 3, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 104, i32 3, i32 1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.RawBuffer", i32, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 3, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 3, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding ret void diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll index a05680f..1137a11 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll @@ -6,22 +6,22 @@ define void @test_simple_binding() { ; StructuredBuffer<float> A : register(t1); %bufA = call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufA = call target("dx.RawBuffer", float, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 1, i32 1, i32 0, ptr null) ; StructuredBuffer<float> B; // gets register(t0, space0) %bufB = call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 5, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 5, i32 0, i32 1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.RawBuffer", float, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; StructuredBuffer<float> C; // gets register(t2, space0) %bufC = call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 6, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 6, i32 0, i32 1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.RawBuffer", float, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 2, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll index 0db47b2..f023025 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll @@ -15,19 +15,19 @@ define void @test_many_spaces() { ; RWBuffer<float> A : register(u1); %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) ; RWBuffer<float> B[]; %bufB = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null) ; RWBuffer<int> C : register(u5); %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null) ; RWBuffer<float> D[4]; %bufD = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 4, i32 1, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 4, i32 1, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll index b6ab3fd..8838f30 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll @@ -12,29 +12,29 @@ define void @test_unbounded_arrays() { ; RWBuffer<float> A : register(u1); %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 1, i32 1, i32 0, ptr null) ; RWBuffer<float> B[]; %bufB = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, ptr null) ; RWBuffer<int> C : register(u5); %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 5, i32 1, i32 0, ptr null) ; ; RWBuffer<float> D[3]; %bufD = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 3, i32 1, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 3, i32 1, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 3, i32 1, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 3, i32 1, ptr null) ; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding ret void diff --git a/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll b/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll index b88ac11..e2a1c09 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll @@ -8,7 +8,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @cbuffer_is_only_binding() { %cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, ptr null) ; CHECK: %CBuffer = type { float } ret void diff --git a/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll index 2699d9ae..45fc0d9 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll @@ -34,7 +34,7 @@ define void @test() #0 { ; int2 d;
; }
%CB1.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB1, 24, 0, 4, 8, 16))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @CB1.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @CB1.str)
; cbuffer CB2 : register(b0) {
; float a;
; double b;
@@ -46,7 +46,7 @@ define void @test() #0 { ;}
%CB2.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 36, 0, 8, 16, 20, 22, 24, 32))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @CB2.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @CB2.str)
; cbuffer CB3 : register(b5) {
; double B0;
; float3 B1;
@@ -59,7 +59,7 @@ define void @test() #0 { ; half3 B8;
; }
%CB3.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_MyConstants, 96, 0, 16, 28, 32, 56, 64, 80, 84, 90))
- @llvm.dx.resource.handlefrombinding(i32 15, i32 5, i32 1, i32 0, i1 false, ptr @MyConstants.str)
+ @llvm.dx.resource.handlefrombinding(i32 15, i32 5, i32 1, i32 0, ptr @MyConstants.str)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll b/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll index 440457b..4f13f47 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll @@ -10,27 +10,27 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @test() { ; Buffer<float4> %float4 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @A.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @A.str) ; CHECK: %"Buffer<float4>" = type { <4 x float> } ; Buffer<int> %int = call target("dx.TypedBuffer", i32, 0, 0, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) ; CHECK: %"Buffer<int32_t>" = type { i32 } ; Buffer<uint3> %uint3 = call target("dx.TypedBuffer", <3 x i32>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null) ; CHECK: %"Buffer<uint32_t3>" = type { <3 x i32> } ; StructuredBuffer<S> %struct0 = call target("dx.RawBuffer", %struct.S, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 10, i32 1, i32 0, i1 true, ptr @SB.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 10, i32 1, i32 0, ptr @SB.str) ; CHECK: %"StructuredBuffer<struct.S>" = type { %struct.S } ; ByteAddressBuffer %byteaddr = call target("dx.RawBuffer", i8, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 20, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 20, i32 1, i32 0, ptr null) ; CHECK: %ByteAddressBuffer = type { i32 } ret void diff --git a/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll index abab5c9..a2059be 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll @@ -1,6 +1,6 @@ ; RUN: opt -S -dxil-translate-metadata < %s | FileCheck %s ; RUN: opt -S --passes="dxil-pretty-printer" < %s 2>&1 | FileCheck %s --check-prefix=PRINT -; RUN: llc %s --filetype=asm -o - < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,PRINT +; RUN: llc %s --filetype=asm -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,PRINT target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64" target triple = "dxil-pc-shadermodel6.6-compute" @@ -14,64 +14,75 @@ target triple = "dxil-pc-shadermodel6.6-compute" @Six.str = private unnamed_addr constant [4 x i8] c"Six\00", align 1 @Seven.str = private unnamed_addr constant [6 x i8] c"Seven\00", align 1 @Array.str = private unnamed_addr constant [6 x i8] c"Array\00", align 1 +@Array2.str = private unnamed_addr constant [7 x i8] c"Array2\00", align 1 ; PRINT:; Resource Bindings: ; PRINT-NEXT:; -; PRINT-NEXT:; Name Type Format Dim ID HLSL Bind Count -; PRINT-NEXT:; ------------------------------ ---------- ------- ----------- ------- -------------- ------ -; PRINT-NEXT:; Zero texture f16 buf T0 t0 1 -; PRINT-NEXT:; One texture f32 buf T1 t1 1 -; PRINT-NEXT:; Two texture f64 buf T2 t2 1 -; PRINT-NEXT:; Three texture i32 buf T3 t3 1 -; PRINT-NEXT:; Four texture byte r/o T4 t5 1 -; PRINT-NEXT:; Five texture struct r/o T5 t6 1 -; PRINT-NEXT:; Six texture u64 buf T6 t10,space2 1 -; PRINT-NEXT:; Array texture f32 buf T7 t4,space3 100 -; PRINT-NEXT:; Seven texture u64 buf T8 t20,space5 1 +; PRINT-NEXT:; Name Type Format Dim ID HLSL Bind Count +; PRINT-NEXT:; ------------------------------ ---------- ------- ----------- ------- -------------- --------- +; PRINT-NEXT:; Zero texture f16 buf T0 t0 1 +; PRINT-NEXT:; One texture f32 buf T1 t1 1 +; PRINT-NEXT:; Two texture f64 buf T2 t2 1 +; PRINT-NEXT:; Three texture i32 buf T3 t3 1 +; PRINT-NEXT:; Four texture byte r/o T4 t5 1 +; PRINT-NEXT:; Five texture struct r/o T5 t6 1 +; PRINT-NEXT:; Six texture u64 buf T6 t10,space2 1 +; PRINT-NEXT:; Array texture f32 buf T7 t4,space3 100 +; PRINT-NEXT:; Array2 texture f64 buf T8 t2,space4 unbounded +; PRINT-NEXT:; Seven texture u64 buf T9 t20,space5 1 ; define void @test() #0 { ; Buffer<half4> Zero : register(t0) %Zero_h = call target("dx.TypedBuffer", <4 x half>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @Zero.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @Zero.str) ; Buffer<float4> One : register(t1) %One_h = call target("dx.TypedBuffer", <2 x float>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @One.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @One.str) ; Buffer<double> Two : register(t2); %Two_h = call target("dx.TypedBuffer", double, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr @Two.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr @Two.str) ; Buffer<int4> Three : register(t3); %Three_h = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, i1 false, ptr @Three.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, ptr @Three.str) ; ByteAddressBuffer Four : register(t4) %Four_h = call target("dx.RawBuffer", i8, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @Four.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @Four.str) ; StructuredBuffer<int16_t> Five : register(t6); %Five_h = call target("dx.RawBuffer", i16, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, i1 false, ptr @Five.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, ptr @Five.str) ; Buffer<double> Six : register(t10, space2); %Six_h = call target("dx.TypedBuffer", i64, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, i1 false, ptr @Six.str) + @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, ptr @Six.str) ; Same buffer type as Six - should have the same type in metadata - ; Buffer<double> Seven : register(t10, space2); + ; Buffer<double> Seven : register(t20, space5); %Seven_h = call target("dx.TypedBuffer", i64, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, i1 false, ptr @Seven.str) + @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, ptr @Seven.str) ; Buffer<float4> Array[100] : register(t4, space3); ; Buffer<float4> B1 = Array[30]; - ; Buffer<float4> B1 = Array[42]; + ; Buffer<float4> B2 = Array[42]; ; resource array accesses should produce one metadata entry %Array_30_h = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, i1 false, ptr @Array.str) + @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, ptr @Array.str) %Array_42_h = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, i1 false, ptr @Array.str) + @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, ptr @Array.str) + + ; test unbounded resource array + ; Buffer<double> Array2[] : register(t2, space4); + ; Buffer<double> C1 = Array[10]; + ; Buffer<double> C2 = Array[20]; + %Array2_10_h = call target("dx.TypedBuffer", double, 0, 0, 0) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @Array2.str) + %Array2_20_h = call target("dx.TypedBuffer", double, 0, 0, 0) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, ptr @Array2.str) ret void } @@ -94,7 +105,8 @@ attributes #0 = { noinline nounwind "hlsl.shader"="compute" } ; CHECK: @Four = external constant %ByteAddressBuffer ; CHECK: @Five = external constant %"StructuredBuffer<int16_t>" ; CHECK: @Six = external constant %"Buffer<uint32_t>" -; CHECK: @Array = external constant %"Buffer<float4>" +; CHECK: @Array = external constant [100 x %"Buffer<float4>"] +; CHECK: @Array2 = external constant [0 x %"Buffer<double>"] ; CHECK: @Seven = external constant %"Buffer<uint32_t>" ; CHECK: !dx.resources = !{[[ResList:[!][0-9]+]]} @@ -102,7 +114,7 @@ attributes #0 = { noinline nounwind "hlsl.shader"="compute" } ; CHECK: [[ResList]] = !{[[SRVList:[!][0-9]+]], null, null, null} ; CHECK: [[SRVList]] = !{![[Zero:[0-9]+]], ![[One:[0-9]+]], ![[Two:[0-9]+]], ; CHECK-SAME: ![[Three:[0-9]+]], ![[Four:[0-9]+]], ![[Five:[0-9]+]], -; CHECK-SAME: ![[Six:[0-9]+]], ![[Array:[0-9]+]], ![[Seven:[0-9]+]]} +; CHECK-SAME: ![[Six:[0-9]+]], ![[Array:[0-9]+]], ![[Array2:[0-9]+]], ![[Seven:[0-9]+]]} ; CHECK: ![[Zero]] = !{i32 0, ptr @Zero, !"Zero", i32 0, i32 0, i32 1, i32 10, i32 0, ![[Half:[0-9]+]]} ; CHECK: ![[Half]] = !{i32 0, i32 8} @@ -118,4 +130,5 @@ attributes #0 = { noinline nounwind "hlsl.shader"="compute" } ; CHECK: ![[Six]] = !{i32 6, ptr @Six, !"Six", i32 2, i32 10, i32 1, i32 10, i32 0, ![[U64:[0-9]+]]} ; CHECK: ![[U64]] = !{i32 0, i32 7} ; CHECK: ![[Array]] = !{i32 7, ptr @Array, !"Array", i32 3, i32 4, i32 100, i32 10, i32 0, ![[Float]]} -; CHECK: ![[Seven]] = !{i32 8, ptr @Seven, !"Seven", i32 5, i32 20, i32 1, i32 10, i32 0, ![[U64]]} +; CHECK: ![[Array2]] = !{i32 8, ptr @Array2, !"Array2", i32 4, i32 2, i32 -1, i32 10, i32 0, ![[Double]]} +; CHECK: ![[Seven]] = !{i32 9, ptr @Seven, !"Seven", i32 5, i32 20, i32 1, i32 10, i32 0, ![[U64]]} diff --git a/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll index 9893f8b..5b2b3ef 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll @@ -1,6 +1,6 @@ ; RUN: opt -S -dxil-translate-metadata < %s | FileCheck %s ; RUN: opt -S --passes="dxil-pretty-printer" < %s 2>&1 | FileCheck %s --check-prefix=PRINT -; RUN: llc %s --filetype=asm -o - < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,PRINT +; RUN: llc %s --filetype=asm -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,PRINT target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64" target triple = "dxil-pc-shadermodel6.6-compute" @@ -17,78 +17,89 @@ target triple = "dxil-pc-shadermodel6.6-compute" @Nine.str = private unnamed_addr constant [5 x i8] c"Nine\00", align 1 @Ten.str = private unnamed_addr constant [4 x i8] c"Ten\00", align 1 @Array.str = private unnamed_addr constant [6 x i8] c"Array\00", align 1 +@Array2.str = private unnamed_addr constant [7 x i8] c"Array2\00", align 1 ; PRINT:; Resource Bindings: ; PRINT-NEXT:; -; PRINT-NEXT:; Name Type Format Dim ID HLSL Bind Count -; PRINT-NEXT:; ------------------------------ ---------- ------- ----------- ------- -------------- ------ -; PRINT-NEXT:; Zero UAV f16 buf U0 u0 1 -; PRINT-NEXT:; One UAV f32 buf U1 u1 1 -; PRINT-NEXT:; Two UAV f64 buf U2 u2 1 -; PRINT-NEXT:; Three UAV i32 buf U3 u3 1 -; PRINT-NEXT:; Four UAV byte r/w U4 u5 1 -; PRINT-NEXT:; Five UAV struct r/w U5 u6 1 -; PRINT-NEXT:; Six UAV i32 buf U6 u7 1 -; PRINT-NEXT:; Seven UAV struct r/w U7 u8 1 -; PRINT-NEXT:; Eight UAV byte r/w U8 u9 1 -; PRINT-NEXT:; Nine UAV u64 buf U9 u10,space2 1 -; PRINT-NEXT:; Array UAV f32 buf U10 u4,space3 100 -; PRINT-NEXT:; Ten UAV u64 buf U11 u22,space5 1 +; PRINT-NEXT:; Name Type Format Dim ID HLSL Bind Count +; PRINT-NEXT:; ------------------------------ ---------- ------- ----------- ------- -------------- --------- +; PRINT-NEXT:; Zero UAV f16 buf U0 u0 1 +; PRINT-NEXT:; One UAV f32 buf U1 u1 1 +; PRINT-NEXT:; Two UAV f64 buf U2 u2 1 +; PRINT-NEXT:; Three UAV i32 buf U3 u3 1 +; PRINT-NEXT:; Four UAV byte r/w U4 u5 1 +; PRINT-NEXT:; Five UAV struct r/w U5 u6 1 +; PRINT-NEXT:; Six UAV i32 buf U6 u7 1 +; PRINT-NEXT:; Seven UAV struct r/w U7 u8 1 +; PRINT-NEXT:; Eight UAV byte r/w U8 u9 1 +; PRINT-NEXT:; Nine UAV u64 buf U9 u10,space2 1 +; PRINT-NEXT:; Array UAV f32 buf U10 u4,space3 100 +; PRINT-NEXT:; Array2 UAV f64 buf U11 u2,space4 unbounded +; PRINT-NEXT:; Ten UAV u64 buf U12 u22,space5 1 define void @test() #0 { ; RWBuffer<half4> Zero : register(u0) %Zero_h = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @Zero.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @Zero.str) ; RWBuffer<float4> One : register(u1) %One_h = call target("dx.TypedBuffer", <2 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @One.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @One.str) ; RWBuffer<double> Two : register(u2); %Two_h = call target("dx.TypedBuffer", double, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr @Two.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr @Two.str) ; RWBuffer<int4> Three : register(u3); %Three_h = call target("dx.TypedBuffer", <4 x i32>, 1, 0, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, i1 false, ptr @Three.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, ptr @Three.str) ; ByteAddressBuffer Four : register(u5) %Four_h = call target("dx.RawBuffer", i8, 1, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @Four.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @Four.str) ; RWStructuredBuffer<int16_t> Five : register(u6); %Five_h = call target("dx.RawBuffer", i16, 1, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, i1 false, ptr @Five.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, ptr @Five.str) ; RasterizerOrderedBuffer<int4> Six : register(u7); %Six_h = call target("dx.TypedBuffer", <4 x i32>, 1, 1, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 7, i32 1, i32 0, i1 false, ptr @Six.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 7, i32 1, i32 0, ptr @Six.str) ; RasterizerOrderedStructuredBuffer<uint4> Seven : register(u3, space10); %Seven_h = call target("dx.RawBuffer", <4 x i32>, 1, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 8, i32 1, i32 0, i1 false, ptr @Seven.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 8, i32 1, i32 0, ptr @Seven.str) ; RasterizerOrderedByteAddressBuffer Eight : register(u9); %Eight_h = call target("dx.RawBuffer", i8, 1, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, i1 false, ptr @Eight.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, ptr @Eight.str) ; RWBuffer<double> Nine : register(u2); %Nine_h = call target("dx.TypedBuffer", i64, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, i1 false, ptr @Nine.str) + @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, ptr @Nine.str) ; RWBuffer<float4> Array[100] : register(u4, space3); ; RWBuffer<float4> B1 = Array[30]; - ; RWBuffer<float4> B1 = Array[42]; + ; RWBuffer<float4> B2 = Array[42]; ; resource array accesses should produce one metadata entry %Array_30_h = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, i1 false, ptr @Array.str) + @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, ptr @Array.str) %Array_42_h = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, i1 false, ptr @Array.str) + @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, ptr @Array.str) + + ; test unbounded resource array + ; RWBuffer<double> Array2[] : register(u2, space4); + ; RWBuffer<double> C1 = Array[10]; + ; RWBuffer<double> C2 = Array[20]; + %Array2_10_h = call target("dx.TypedBuffer", double, 1, 0, 0) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @Array2.str) + %Array2_20_h = call target("dx.TypedBuffer", double, 1, 0, 0) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, ptr @Array2.str) ; Same buffer type as Nine - should have the same type in metadata ; RWBuffer<double> Ten : register(u2); %Ten_h = call target("dx.TypedBuffer", i64, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 5, i32 22, i32 1, i32 0, i1 false, ptr @Ten.str) + @llvm.dx.resource.handlefrombinding(i32 5, i32 22, i32 1, i32 0, ptr @Ten.str) ret void } @@ -117,7 +128,8 @@ attributes #0 = { noinline nounwind "hlsl.shader"="compute" } ; CHECK: @Seven = external constant %"RasterizerOrderedStructuredBuffer<int32_t4>" ; CHECK: @Eight = external constant %RasterizerOrderedByteAddressBuffer ; CHECK: @Nine = external constant %"RWBuffer<uint32_t>" -; CHECK: @Array = external constant %"RWBuffer<float4>" +; CHECK: @Array = external constant [100 x %"RWBuffer<float4>"] +; CHECK: @Array2 = external constant [0 x %"RWBuffer<double>"] ; CHECK: @Ten = external constant %"RWBuffer<uint32_t>" ; CHECK: !dx.resources = !{[[ResList:[!][0-9]+]]} @@ -126,7 +138,7 @@ attributes #0 = { noinline nounwind "hlsl.shader"="compute" } ; CHECK: [[UAVList]] = !{![[Zero:[0-9]+]], ![[One:[0-9]+]], ![[Two:[0-9]+]], ; CHECK-SAME: ![[Three:[0-9]+]], ![[Four:[0-9]+]], ![[Five:[0-9]+]], ; CHECK-SAME: ![[Six:[0-9]+]], ![[Seven:[0-9]+]], ![[Eight:[0-9]+]], -; CHECK-SAME: ![[Nine:[0-9]+]], ![[Array:[0-9]+]], ![[Ten:[0-9]+]]} +; CHECK-SAME: ![[Nine:[0-9]+]], ![[Array:[0-9]+]], ![[Array2:[0-9]+]], ![[Ten:[0-9]+]]} ; CHECK: ![[Zero]] = !{i32 0, ptr @Zero, !"Zero", i32 0, i32 0, i32 1, i32 10, i1 false, i1 false, i1 false, ![[Half:[0-9]+]]} ; CHECK: ![[Half]] = !{i32 0, i32 8} @@ -146,4 +158,5 @@ attributes #0 = { noinline nounwind "hlsl.shader"="compute" } ; CHECK: ![[Nine]] = !{i32 9, ptr @Nine, !"Nine", i32 2, i32 10, i32 1, i32 10, i1 false, i1 false, i1 false, ![[U64:[0-9]+]]} ; CHECK: ![[U64]] = !{i32 0, i32 7} ; CHECK: ![[Array]] = !{i32 10, ptr @Array, !"Array", i32 3, i32 4, i32 100, i32 10, i1 false, i1 false, i1 false, ![[Float]]} -; CHECK: ![[Ten]] = !{i32 11, ptr @Ten, !"Ten", i32 5, i32 22, i32 1, i32 10, i1 false, i1 false, i1 false, ![[U64:[0-9]+]]} +; CHECK: ![[Array2]] = !{i32 11, ptr @Array2, !"Array2", i32 4, i32 2, i32 -1, i32 10, i1 false, i1 false, i1 false, ![[Double]]} +; CHECK: ![[Ten]] = !{i32 12, ptr @Ten, !"Ten", i32 5, i32 22, i32 1, i32 10, i1 false, i1 false, i1 false, ![[U64:[0-9]+]]} diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoad.ll b/llvm/test/CodeGen/DirectX/RawBufferLoad.ll index 869a5b1..3726032 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferLoad.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferLoad.ll @@ -13,7 +13,7 @@ declare void @v4f64_user(<4 x double>) define void @loadf32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", float, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 1, i32 4) %load = call {float, i1} @@ -34,7 +34,7 @@ define void @loadf32_struct(i32 %index) { define void @loadf32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 1, i32 4) %load = call {float, i1} @@ -55,7 +55,7 @@ define void @loadf32_byte(i32 %offset) { define void @loadv4f32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 15, i32 4) %load = call {<4 x float>, i1} @@ -83,7 +83,7 @@ define void @loadv4f32_struct(i32 %index) { define void @loadv4f32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 15, i32 4) %load = call {<4 x float>, i1} @@ -111,7 +111,7 @@ define void @loadv4f32_byte(i32 %offset) { define void @loadelements(i32 %index) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATAF32:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 15, i32 4) %loadf32 = call {<4 x float>, i1} @@ -158,7 +158,7 @@ define void @loadelements(i32 %index) { define void @loadnested(i32 %index) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATAI32:%.*]] = call %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 1, i32 4) %loadi32 = call {i32, i1} @llvm.dx.resource.load.rawbuffer.i32( @@ -210,7 +210,7 @@ define void @loadnested(i32 %index) { define void @loadv4f64_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f64 @dx.op.rawBufferLoad.f64(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 15, i32 8) %load = call {<4 x double>, i1} @llvm.dx.resource.load.rawbuffer.v4i64( diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll b/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll index 9213d60..6c7d8c2 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll @@ -5,10 +5,10 @@ define void @loadf64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", double, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", double, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { double, i1 } @llvm.dx.resource.load.rawbuffer @@ -38,10 +38,10 @@ define void @loadv2f64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <2 x double>, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2f64_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <2 x double>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <2 x double>, i1 } @llvm.dx.resource.load.rawbuffer @@ -76,10 +76,10 @@ define void @loadf64WithCheckBit(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", double, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", double, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { double, i1 } @llvm.dx.resource.load.rawbuffer @@ -116,10 +116,10 @@ define void @loadv3f64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <3 x double>, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3f64_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <3 x double>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3f64_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <3 x double>, i1 } @llvm.dx.resource.load.rawbuffer @@ -172,10 +172,10 @@ define void @loadv4f64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <4 x double>, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4f64_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <4 x double>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4f64_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <4 x double>, i1 } @llvm.dx.resource.load.rawbuffer diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll b/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll index a1c153f..310283f 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll @@ -5,10 +5,10 @@ define void @loadi64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", i64, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { i64, i1 } @llvm.dx.resource.load.rawbuffer @@ -41,10 +41,10 @@ define void @loadv2i64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <2 x i64>, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2i64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2i64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <2 x i64>, i1 } @llvm.dx.resource.load.rawbuffer @@ -85,10 +85,10 @@ define void @loadi64WithCheckBit(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", i64, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { i64, i1 } @llvm.dx.resource.load.rawbuffer @@ -128,10 +128,10 @@ define void @loadv3i64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[Buf:%.*]] = call target("dx.Rawbuffer", <3 x i64>, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3i64_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <3 x i64>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3i64_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <3 x i64>, i1 } @llvm.dx.resource.load.rawbuffer @@ -193,10 +193,10 @@ define void @loadv4i64(i32 %index) { ; check the handle from binding is unchanged ; CHECK62: [[Buf:%.*]] = call target("dx.Rawbuffer", <4 x i64>, 0, 0) ; CHECK62-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4i64_0_0t( - ; CHECK62-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK62-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <4 x i64>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4i64_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <4 x i64>, i1 } @llvm.dx.resource.load.rawbuffer diff --git a/llvm/test/CodeGen/DirectX/RawBufferStore.ll b/llvm/test/CodeGen/DirectX/RawBufferStore.ll index 3d03418..856f9d1 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferStore.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferStore.ll @@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @storef32_struct(i32 %index, float %data) { %buffer = call target("dx.RawBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %buffer_annot, i32 %index, i32 0, float %data, float undef, float undef, float undef, i8 1, i32 4) call void @llvm.dx.resource.store.rawbuffer.f32( @@ -20,7 +20,7 @@ define void @storef32_struct(i32 %index, float %data) { define void @storef32_byte(i32 %offset, float %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %buffer_annot, i32 %offset, i32 0, float %data, float undef, float undef, float undef, i8 1, i32 4) call void @llvm.dx.resource.store.rawbuffer.f32( @@ -34,7 +34,7 @@ define void @storef32_byte(i32 %offset, float %data) { define void @storev4f32_struct(i32 %index, <4 x float> %data) { %buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1 @@ -52,7 +52,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) { define void @storev4f32_byte(i32 %offset, <4 x float> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1 @@ -70,7 +70,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) { define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0_0:%.*]] = extractelement <4 x float> %data0, i32 0 ; CHECK: [[DATA0_1:%.*]] = extractelement <4 x float> %data0, i32 1 @@ -97,7 +97,7 @@ define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) { define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half> %data2) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.rawBufferStore.i32(i32 140, %dx.types.Handle %buffer_annot, i32 %index, i32 0, i32 %data0, i32 undef, i32 undef, i32 undef, i8 1, i32 4) call void @llvm.dx.resource.store.rawbuffer.i32( @@ -129,7 +129,7 @@ define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half> define void @storev4f64_byte(i32 %offset, <4 x double> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x double> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x double> %data, i32 1 diff --git a/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll b/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll index ddcd761..30a8039 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll @@ -4,10 +4,10 @@ define void @storef64(double %0, i32 %index) { ; CHECK: [[B:%.*]] = tail call target("dx.RawBuffer", double, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", double, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -30,10 +30,10 @@ define void @storef64(double %0, i32 %index) { define void @storev2f64(<2 x double> %0, i32 %index) { ; CHECK: [[B:%.*]] = tail call target("dx.RawBuffer", <2 x double>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2f64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <2 x double>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2f64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -55,10 +55,10 @@ define void @storev2f64(<2 x double> %0, i32 %index) { define void @storev3f64(<3 x double> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <3 x double>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3f64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <3 x double>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3f64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -81,10 +81,10 @@ define void @storev3f64(<3 x double> %0, i32 %index) { define void @storev4f64(<4 x double> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <4 x double>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <4 x double>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer diff --git a/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll b/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll index 54ec4d2..559b9ac 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll @@ -4,10 +4,10 @@ define void @storei64(i64 %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", i64, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", i64, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -30,10 +30,10 @@ define void @storei64(i64 %0, i32 %index) { define void @storev2i64(<2 x i64> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <2 x i64>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2i64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <2 x i64>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2i64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -54,10 +54,10 @@ define void @storev2i64(<2 x i64> %0, i32 %index) { define void @storev3i64(<3 x i64> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <3 x i64>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3i64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <3 x i64>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3i64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -80,10 +80,10 @@ define void @storev3i64(<3 x i64> %0, i32 %index) { define void @storev4i64(<4 x i64> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <4 x i64>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <4 x i64>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer ; CHECK63-SAME: target("dx.RawBuffer", <4 x i64>, 1, 0) [[Buf]], i32 %index, i32 0, <4 x i64> %0) diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll index 7ea9795..ae5e992 100644 --- a/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll +++ b/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll @@ -13,7 +13,7 @@ declare void @v4f64_user(<4 x double>) define void @loadf32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", float, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -32,7 +32,7 @@ define void @loadf32_struct(i32 %index) { define void @loadf32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -51,7 +51,7 @@ define void @loadf32_byte(i32 %offset) { define void @loadv4f32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -70,7 +70,7 @@ define void @loadv4f32_struct(i32 %index) { define void @loadv4f32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -89,7 +89,7 @@ define void @loadv4f32_byte(i32 %offset) { define void @loadelements(i32 %index) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -116,7 +116,7 @@ define void @loadelements(i32 %index) { define void @loadnested(i32 %index) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -151,7 +151,7 @@ define void @loadnested(i32 %index) { define void @loadv4f64_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll index 2a557c7..d2e5584 100644 --- a/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll +++ b/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll @@ -10,7 +10,7 @@ declare void @use_float1(<1 x float>) define void @load_float4(i32 %index, i32 %elemindex) { %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -40,7 +40,7 @@ define void @load_float4(i32 %index, i32 %elemindex) { ; CHECK-LABEL: define void @load_float( define void @load_float(i32 %index) { %buffer = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -65,7 +65,7 @@ define void @load_float(i32 %index) { ; CHECK-LABEL: define void @load_float1( define void @load_float1(i32 %index) { %buffer = call target("dx.TypedBuffer", <1 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll index ed41d8b..2ddf615 100644 --- a/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll +++ b/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll @@ -5,7 +5,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" ; CHECK-LABEL: define void @storef32_struct define void @storef32_struct(i32 %index, float %data) { %buffer = call target("dx.RawBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -20,7 +20,7 @@ define void @storef32_struct(i32 %index, float %data) { ; CHECK-LABEL: define void @storef32_byte define void @storef32_byte(i32 %offset, float %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -35,7 +35,7 @@ define void @storef32_byte(i32 %offset, float %data) { ; CHECK-LABEL: define void @storev4f32_struct define void @storev4f32_struct(i32 %index, <4 x float> %data) { %buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -50,7 +50,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) { ; CHECK-LABEL: define void @storev4f32_byte define void @storev4f32_byte(i32 %offset, <4 x float> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -65,7 +65,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) { ; CHECK-LABEL: define void @storeelements define void @storeelements(i32 %index, <4 x float> %dataf32, <4 x i32> %datai32) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -86,7 +86,7 @@ define void @storeelements(i32 %index, <4 x float> %dataf32, <4 x i32> %datai32) define void @storenested(i32 %index, i32 %datai32, <4 x float> %dataf32, <3 x half> %dataf16) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -111,7 +111,7 @@ define void @storenested(i32 %index, i32 %datai32, <4 x float> %dataf32, <3 x ha ; CHECK-LABEL: define void @storev4f64_byte define void @storev4f64_byte(i32 %offset, <4 x double> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll index 54aa254..f27fa65 100644 --- a/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll +++ b/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll @@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @store_float4(<4 x float> %data, i32 %index, i32 %elemindex) { %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -47,7 +47,7 @@ define void @store_float4(<4 x float> %data, i32 %index, i32 %elemindex) { define void @store_half4(<4 x half> %data, i32 %index) { %buffer = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -80,7 +80,7 @@ define void @store_half4(<4 x half> %data, i32 %index) { define void @store_double2(<2 x double> %data, i32 %index) { %buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( diff --git a/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll b/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll index 8bec56e..34eb555 100644 --- a/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll +++ b/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll @@ -21,9 +21,9 @@ define void @main() local_unnamed_addr #0 { entry: ; DXOP: [[In_h_i:%.*]] = call %dx.types.Handle @dx.op.createHandle ; DXOP: [[Out_h_i:%.*]] = call %dx.types.Handle @dx.op.createHandle - %In_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %In_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %In_h.i, ptr @In, align 4 - %Out_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 4, i32 1, i32 1, i32 0, i1 false, ptr null) + %Out_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 4, i32 1, i32 1, i32 0, ptr null) store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %Out_h.i, ptr @Out, align 4 ; CSE: call i32 @llvm.dx.flattened.thread.id.in.group() %0 = call i32 @llvm.dx.flattened.thread.id.in.group() diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll index 3f2ec9a..4bdb7ec5 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll @@ -30,5 +30,5 @@ entry: ret i32 0 } -attributes #0 = { convergent noinline norecurse optnone "approx-func-fp-math"="true" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } -attributes #1 = { alwaysinline convergent mustprogress norecurse nounwind "approx-func-fp-math"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #0 = { convergent noinline norecurse optnone "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #1 = { alwaysinline convergent mustprogress norecurse nounwind "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll index c6e3cc9..0375671 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll @@ -40,5 +40,5 @@ entry: ret i32 0 } -attributes #0 = { convergent mustprogress noinline norecurse nounwind optnone "approx-func-fp-math"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } -attributes #1 = { convergent noinline norecurse optnone "approx-func-fp-math"="true" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #0 = { convergent mustprogress noinline norecurse nounwind optnone "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #1 = { convergent noinline norecurse optnone "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/lib-entry-attr-error.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/lib-entry-attr-error.ll index 74d5fd0..ce35c03 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/lib-entry-attr-error.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/lib-entry-attr-error.ll @@ -19,8 +19,8 @@ entry: ret void } -attributes #0 = { convergent noinline norecurse optnone "approx-func-fp-math"="true" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } -attributes #1 = { convergent noinline norecurse "approx-func-fp-math"="true" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #0 = { convergent noinline norecurse optnone "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #1 = { convergent noinline norecurse "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } !llvm.module.flags = !{!0, !1} !dx.valver = !{!2} diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/lifetimes-noint64op.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/lifetimes-noint64op.ll index 736c86e..5cf4fe8 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/lifetimes-noint64op.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/lifetimes-noint64op.ll @@ -15,16 +15,16 @@ target triple = "dxil-pc-shadermodel6.7-library" define void @lifetimes() #0 { %a = alloca [4 x i32], align 8 - call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %a) - call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %a) + call void @llvm.lifetime.start.p0(ptr nonnull %a) + call void @llvm.lifetime.end.p0(ptr nonnull %a) ret void } ; Function Attrs: nounwind memory(argmem: readwrite) -declare void @llvm.lifetime.start.p0(i64, ptr) #1 +declare void @llvm.lifetime.start.p0(ptr) #1 ; Function Attrs: nounwind memory(argmem: readwrite) -declare void @llvm.lifetime.end.p0(i64, ptr) #1 +declare void @llvm.lifetime.end.p0(ptr) #1 attributes #0 = { convergent norecurse nounwind "hlsl.export"} attributes #1 = { nounwind memory(argmem: readwrite) } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll index dd5f098..e83ea60 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll @@ -18,12 +18,12 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf[8] : register(u1, space0) %buf1 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 1, i32 8, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 8, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll index 6e965d9..a397074 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll @@ -19,12 +19,12 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf[8] : register(u1, space0) %buf1 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 1, i32 8, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 8, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll index 0f8674d..6ed267d 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll @@ -18,39 +18,39 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u1, space0) %buf1 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u2, space0) %buf2 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 2, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u3, space0) %buf3 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 3, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 3, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u4, space0) %buf4 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 4, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 4, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u5, space0) %buf5 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 5, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u6, space0) %buf6 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 6, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 6, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u7, space0) %buf7 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 7, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u8, space0) %buf8 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 8, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll index 9680193..e3bd584 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll @@ -14,7 +14,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function rawbuf : 0x00000010 define float @rawbuf() "hlsl.export" { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer.f32( target("dx.RawBuffer", i8, 0, 0, 0) %buffer, i32 0, i32 0) %data = extractvalue {float, i1} %load, 0 @@ -24,7 +24,7 @@ define float @rawbuf() "hlsl.export" { ; CHECK: Function structbuf : 0x00000010 define float @structbuf() "hlsl.export" { %buffer = call target("dx.RawBuffer", float, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer.f32( target("dx.RawBuffer", float, 0, 0, 0) %buffer, i32 0, i32 0) %data = extractvalue {float, i1} %load, 0 @@ -34,7 +34,7 @@ define float @structbuf() "hlsl.export" { ; CHECK: Function typedbuf : 0x00000000 define float @typedbuf(<4 x float> %val) "hlsl.export" { %buffer = call target("dx.TypedBuffer", float, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 0, 0, 0) %buffer, i32 0) %data = extractvalue {float, i1} %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll index 5e44b93..9d570fe 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll @@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function rawbuf : 0x00000014 define void @rawbuf() "hlsl.export" { %rb = tail call target("dx.RawBuffer", <4 x double>, 0, 0) - @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call { <4 x double>, i1 } @llvm.dx.resource.load.rawbuffer.v4double.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x double>, 0, 0) %rb, i32 0, i32 0) %extract = extractvalue { <4 x double>, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll index 517147a..48ce42c 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll @@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function rawbuf : 0x00100010 define void @rawbuf() "hlsl.export" { %rb = tail call target("dx.RawBuffer", <4 x i64>, 0, 0) - @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call { <4 x i64>, i1 } @llvm.dx.resource.load.rawbuffer.v4i64.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x i64>, 0, 0) %rb, i32 0, i32 0) %extract = extractvalue { <4 x i64>, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll index cb4a3e9..5e5cf0c 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll @@ -18,9 +18,9 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function rawbuf : 0x00800030 define void @rawbuf() "hlsl.export" { %halfrb = tail call target("dx.RawBuffer", <4 x half>, 0, 0) - @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %i16rb = tail call target("dx.RawBuffer", <4 x i16>, 1, 0) - @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i16_1_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i16_1_0t(i32 0, i32 1, i32 1, i32 0, ptr null) %loadhalfrb = call { <4 x i16>, i1 } @llvm.dx.resource.load.rawbuffer.v4i16.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x half>, 0, 0) %halfrb, i32 0, i32 0) %extracti16vec = extractvalue { <4 x i16>, i1 } %loadhalfrb, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll index 1bac7ea..4d30fa7 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll @@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.8-library" ; CHECK: Function loadUAV : 0x20000000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -27,7 +27,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x00000010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll index 115585d..9351401 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll @@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.8-library" ; CHECK: Function loadUAV : 0x00000000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -27,7 +27,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x00000010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll index 97494ae..ba03d39 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll @@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.6-library" ; CHECK: Function loadUAV : 0x00000000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -27,7 +27,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x00000010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll index 1a5cba4..d91d6fe 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll @@ -22,7 +22,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function loadUAV : 0x200010000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -32,7 +32,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x200010010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll index 242faa2..08a9d94 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll @@ -18,7 +18,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function loadUAV : 0x20000000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -28,7 +28,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x00000010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll index b0a5d5d..8717233 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll @@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function multicomponent : 0x00002000 define <4 x float> @multicomponent() #0 { %res = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %res, i32 0) %val = extractvalue {<4 x float>, i1} %load, 0 @@ -26,7 +26,7 @@ define <4 x float> @multicomponent() #0 { ; CHECK: Function onecomponent : 0x00000000 define float @onecomponent() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -36,7 +36,7 @@ define float @onecomponent() #0 { ; CHECK: Function noload : 0x00000000 define void @noload(<4 x float> %val) #0 { %res = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null) call void @llvm.dx.resource.store.typedbuffer( target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %res, i32 0, <4 x float> %val) diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll index dc9d2cf..ae2b35f 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll @@ -17,7 +17,7 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll index 2248b9f..a7e8e7f 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll @@ -16,7 +16,7 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll index 60ecc8f..da47bb1 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll @@ -18,7 +18,7 @@ define void @VSMain() { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll b/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll index c73a31d..bd0582c 100644 --- a/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll +++ b/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll @@ -8,7 +8,7 @@ define void @update_counter_decrement_vector() { ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] ; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 -1){{$}} @@ -21,7 +21,7 @@ define void @update_counter_increment_vector() { ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] ; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 1){{$}} %1 = call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 0, 0, 0) %buffer, i8 1) @@ -33,7 +33,7 @@ define void @update_counter_decrement_scalar() { ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %buffer = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] ; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 -1){{$}} %1 = call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", i8, 0, 0) %buffer, i8 -1) diff --git a/llvm/test/CodeGen/DirectX/dot2add.ll b/llvm/test/CodeGen/DirectX/dot2add.ll index 3a2bbcc..5e1cf40 100644 --- a/llvm/test/CodeGen/DirectX/dot2add.ll +++ b/llvm/test/CodeGen/DirectX/dot2add.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s | FileCheck %s
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.4-compute %s | FileCheck %s
define noundef float @dot2add_simple(<2 x half> noundef %a, <2 x half> noundef %b, float %acc) {
entry:
@@ -7,7 +7,7 @@ entry: %bx = extractelement <2 x half> %b, i32 0
%by = extractelement <2 x half> %b, i32 1
-; CHECK: call float @dx.op.dot2AddHalf(i32 162, float %acc, half %ax, half %ay, half %bx, half %by)
+; CHECK: call float @dx.op.dot2AddHalf.f32(i32 162, float %acc, half %ax, half %ay, half %bx, half %by)
%ret = call float @llvm.dx.dot2add(float %acc, half %ax, half %ay, half %bx, half %by)
ret float %ret
}
diff --git a/llvm/test/CodeGen/DirectX/dot2add_error.ll b/llvm/test/CodeGen/DirectX/dot2add_error.ll new file mode 100644 index 0000000..c45133c --- /dev/null +++ b/llvm/test/CodeGen/DirectX/dot2add_error.ll @@ -0,0 +1,15 @@ +; RUN: not opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s 2>&1 | FileCheck %s
+
+; CHECK: in function f
+; CHECK-SAME: Cannot create Dot2AddHalf operation: No valid overloads for DXIL version 1.3
+
+define noundef float @f(<2 x half> noundef %a, <2 x half> noundef %b, float %acc) {
+entry:
+ %ax = extractelement <2 x half> %a, i32 0
+ %ay = extractelement <2 x half> %a, i32 1
+ %bx = extractelement <2 x half> %b, i32 0
+ %by = extractelement <2 x half> %b, i32 1
+
+ %ret = call float @llvm.dx.dot2add(float %acc, half %ax, half %ay, half %bx, half %by)
+ ret float %ret
+}
diff --git a/llvm/test/CodeGen/DirectX/finalize_linkage.ll b/llvm/test/CodeGen/DirectX/finalize_linkage.ll index dc1140f..f6e54cf 100644 --- a/llvm/test/CodeGen/DirectX/finalize_linkage.ll +++ b/llvm/test/CodeGen/DirectX/finalize_linkage.ll @@ -4,7 +4,8 @@ target triple = "dxilv1.5-pc-shadermodel6.5-compute" ; DXILFinalizeLinkage changes linkage of all functions that are hidden to -; internal, and converts private global variables to internal linkage. +; internal, converts private globals to internal linkage, and converts external globals +; with no usage to internal linkage. ; CHECK: @switch.table = internal unnamed_addr constant [4 x i32] @switch.table = private unnamed_addr constant [4 x i32] [i32 1, i32 257, i32 65793, i32 16843009], align 4 @@ -27,6 +28,27 @@ target triple = "dxilv1.5-pc-shadermodel6.5-compute" ; CHECK: @hidden_var = hidden global i32 @hidden_var = hidden global i32 1, align 4 +; Running the whole pipeline should remove unused global variables + +; CHECK: @aTile = internal addrspace(3) global +; CHECK-LLC-NOT: @aTile +@aTile = hidden addrspace(3) global [4 x [1 x i32]] zeroinitializer, align 4 + +; CHECK: @bTile = internal addrspace(3) global +; CHECK-LLC-NOT: @bTile +@bTile = hidden addrspace(3) global [1 x [1 x i32]] zeroinitializer, align 4 + +define void @anchor_function() #0 { +entry: + %0 = load i32, ptr @switch.table, align 4 + %1 = load [3 x float], ptr @private_array, align 4 + %2 = load i32, ptr @private_var, align 4 + %3 = load i32, ptr @internal_var, align 4 + %4 = load i32, ptr @external_var, align 4 + %5 = load i32, ptr @hidden_var, align 4 + ret void +} + ; CHECK-NOT: define internal void @"?f1@@YAXXZ"() define void @"?f1@@YAXXZ"() #0 { entry: diff --git a/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll b/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll new file mode 100644 index 0000000..4f28713 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll @@ -0,0 +1,37 @@ +; RUN: opt -S -dxil-forward-handle-accesses %s | FileCheck %s --check-prefixes=CHECK,FHCHECK +; RUN: opt -S -mtriple=dxil--shadermodel6.3-compute -passes='function(dxil-forward-handle-accesses),dse' %s | FileCheck %s --check-prefix=CHECK + +; Note: test to confirm fix for issues: 140819 & 151764 + +%"class.hlsl::RWStructuredBuffer" = type { target("dx.RawBuffer", i32, 1, 0) } +@global = internal unnamed_addr global %"class.hlsl::RWStructuredBuffer" poison, align 4 +@name = private unnamed_addr constant [5 x i8] c"dest\00", align 1 + + +; NOTE: intent of this test is to confirm load target("dx.RawBuffer", i32, 1, 0) +; is replaced with call @llvm.dx.resource.getpointer +define void @CSMain() local_unnamed_addr { +; CHECK-LABEL: define void @CSMain() local_unnamed_addr { +; CHECK-NEXT: [[ENTRY:.*:]] +; FHCHECK-NEXT: [[AGG_TMP_I1_SROA_0:%.*]] = alloca target("dx.RawBuffer", i32, 1, 0), align 8 +; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, ptr nonnull @name) +; CHECK-NEXT: store target("dx.RawBuffer", i32, 1, 0) [[TMP0]], ptr @global, align 4 +; FHCHECK-NEXT: [[TMP2:%.*]] = load i32, ptr @global, align 4 +; FHCHECK-NEXT: store i32 [[TMP2]], ptr [[AGG_TMP_I1_SROA_0]], align 8 +; CHECK-NEXT: [[TMP3:%.*]] = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i32_1_0t(target("dx.RawBuffer", i32, 1, 0) [[TMP0]], i32 0) +; CHECK-NEXT: store i32 0, ptr [[TMP3]], align 4 +; CHECK-NEXT: ret void +; +entry: + %alloca = alloca target("dx.RawBuffer", i32, 1, 0), align 8 + %handle = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, ptr nonnull @name) + store target("dx.RawBuffer", i32, 1, 0) %handle , ptr @global, align 4 + %val = load i32, ptr @global, align 4 + call void @llvm.lifetime.start.p0(ptr nonnull %alloca) + store i32 %val , ptr %alloca, align 8 + %indirect = load target("dx.RawBuffer", i32, 1, 0), ptr %alloca, align 8 + %buff = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i32_1_0t(target("dx.RawBuffer", i32, 1, 0) %indirect, i32 0) + store i32 0, ptr %buff, align 4 + call void @llvm.lifetime.end.p0(ptr nonnull %alloca) + ret void +} diff --git a/llvm/test/CodeGen/DirectX/imad.ll b/llvm/test/CodeGen/DirectX/imad.ll index 5d9463d..2e612f0 100644 --- a/llvm/test/CodeGen/DirectX/imad.ll +++ b/llvm/test/CodeGen/DirectX/imad.ll @@ -1,17 +1,13 @@ -; RUN: opt -S -dxil-op-lower < %s | FileCheck %s +; RUN: opt -S -scalarizer -dxil-op-lower < %s | FileCheck %s ; Make sure dxil operation function calls for round are generated for float and half. -; CHECK:call i16 @dx.op.tertiary.i16(i32 48, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR:]] -; CHECK:call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] -; CHECK:call i64 @dx.op.tertiary.i64(i32 48, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] - -; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}} target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64" target triple = "dxil-pc-shadermodel6.7-library" ; Function Attrs: noinline nounwind optnone define noundef i16 @imad_short(i16 noundef %p0, i16 noundef %p1, i16 noundef %p2) #0 { entry: + ; CHECK: call i16 @dx.op.tertiary.i16(i32 48, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR:]] %p2.addr = alloca i16, align 2 %p1.addr = alloca i16, align 2 %p0.addr = alloca i16, align 2 @@ -31,6 +27,7 @@ declare i16 @llvm.dx.imad.i16(i16, i16, i16) #1 ; Function Attrs: noinline nounwind optnone define noundef i32 @imad_int(i32 noundef %p0, i32 noundef %p1, i32 noundef %p2) #0 { entry: + ; CHECK: call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] %p2.addr = alloca i32, align 4 %p1.addr = alloca i32, align 4 %p0.addr = alloca i32, align 4 @@ -50,6 +47,7 @@ declare i32 @llvm.dx.imad.i32(i32, i32, i32) #1 ; Function Attrs: noinline nounwind optnone define noundef i64 @imad_int64(i64 noundef %p0, i64 noundef %p1, i64 noundef %p2) #0 { entry: + ; CHECK: call i64 @dx.op.tertiary.i64(i32 48, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] %p2.addr = alloca i64, align 8 %p1.addr = alloca i64, align 8 %p0.addr = alloca i64, align 8 @@ -65,3 +63,95 @@ entry: ; Function Attrs: nocallback nofree nosync nounwind willreturn declare i64 @llvm.dx.imad.i64(i64, i64, i64) #1 + +; Function Attrs: noinline nounwind optnone +define noundef <4 x i16> @imad_int16_t4(<4 x i16> noundef %p0, <4 x i16> noundef %p1, <4 x i16> noundef %p2) #0 { +entry: + ; CHECK: extractelement <4 x i16> %p0, i64 0 + ; CHECK: extractelement <4 x i16> %p1, i64 0 + ; CHECK: extractelement <4 x i16> %p2, i64 0 + ; CHECK: call i16 @dx.op.tertiary.i16(i32 48, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i16> %p0, i64 1 + ; CHECK: extractelement <4 x i16> %p1, i64 1 + ; CHECK: extractelement <4 x i16> %p2, i64 1 + ; CHECK: call i16 @dx.op.tertiary.i16(i32 48, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i16> %p0, i64 2 + ; CHECK: extractelement <4 x i16> %p1, i64 2 + ; CHECK: extractelement <4 x i16> %p2, i64 2 + ; CHECK: call i16 @dx.op.tertiary.i16(i32 48, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i16> %p0, i64 3 + ; CHECK: extractelement <4 x i16> %p1, i64 3 + ; CHECK: extractelement <4 x i16> %p2, i64 3 + ; CHECK: call i16 @dx.op.tertiary.i16(i32 48, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR]] + ; CHECK: insertelement <4 x i16> poison, i16 %{{.*}}, i64 0 + ; CHECK: insertelement <4 x i16> %{{.*}}, i16 %{{.*}}, i64 1 + ; CHECK: insertelement <4 x i16> %{{.*}}, i16 %{{.*}}, i64 2 + ; CHECK: insertelement <4 x i16> %{{.*}}, i16 %{{.*}}, i64 3 + %dx.imad = call <4 x i16> @llvm.dx.imad.v4i16(<4 x i16> %p0, <4 x i16> %p1, <4 x i16> %p2) + ret <4 x i16> %dx.imad +} + +; Function Attrs: nocallback nofree nosync nounwind willreturn +declare <4 x i16> @llvm.dx.imad.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) #1 + +; Function Attrs: noinline nounwind optnone +define noundef <4 x i32> @imad_int4(<4 x i32> noundef %p0, <4 x i32> noundef %p1, <4 x i32> noundef %p2) #0 { +entry: + ; CHECK: extractelement <4 x i32> %p0, i64 0 + ; CHECK: extractelement <4 x i32> %p1, i64 0 + ; CHECK: extractelement <4 x i32> %p2, i64 0 + ; CHECK: call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i32> %p0, i64 1 + ; CHECK: extractelement <4 x i32> %p1, i64 1 + ; CHECK: extractelement <4 x i32> %p2, i64 1 + ; CHECK: call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i32> %p0, i64 2 + ; CHECK: extractelement <4 x i32> %p1, i64 2 + ; CHECK: extractelement <4 x i32> %p2, i64 2 + ; CHECK: call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i32> %p0, i64 3 + ; CHECK: extractelement <4 x i32> %p1, i64 3 + ; CHECK: extractelement <4 x i32> %p2, i64 3 + ; CHECK: call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] + ; CHECK: insertelement <4 x i32> poison, i32 %{{.*}}, i64 0 + ; CHECK: insertelement <4 x i32> %{{.*}}, i32 %{{.*}}, i64 1 + ; CHECK: insertelement <4 x i32> %{{.*}}, i32 %{{.*}}, i64 2 + ; CHECK: insertelement <4 x i32> %{{.*}}, i32 %{{.*}}, i64 3 + %dx.imad = call <4 x i32> @llvm.dx.imad.v4i32(<4 x i32> %p0, <4 x i32> %p1, <4 x i32> %p2) + ret <4 x i32> %dx.imad +} + +; Function Attrs: nocallback nofree nosync nounwind willreturn +declare <4 x i32> @llvm.dx.imad.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) #1 + +; Function Attrs: noinline nounwind optnone +define noundef <4 x i64> @imad_int64_t4(<4 x i64> noundef %p0, <4 x i64> noundef %p1, <4 x i64> noundef %p2) #0 { +entry: + ; CHECK: extractelement <4 x i64> %p0, i64 0 + ; CHECK: extractelement <4 x i64> %p1, i64 0 + ; CHECK: extractelement <4 x i64> %p2, i64 0 + ; CHECK: call i64 @dx.op.tertiary.i64(i32 48, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i64> %p0, i64 1 + ; CHECK: extractelement <4 x i64> %p1, i64 1 + ; CHECK: extractelement <4 x i64> %p2, i64 1 + ; CHECK: call i64 @dx.op.tertiary.i64(i32 48, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i64> %p0, i64 2 + ; CHECK: extractelement <4 x i64> %p1, i64 2 + ; CHECK: extractelement <4 x i64> %p2, i64 2 + ; CHECK: call i64 @dx.op.tertiary.i64(i32 48, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i64> %p0, i64 3 + ; CHECK: extractelement <4 x i64> %p1, i64 3 + ; CHECK: extractelement <4 x i64> %p2, i64 3 + ; CHECK: call i64 @dx.op.tertiary.i64(i32 48, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] + ; CHECK: insertelement <4 x i64> poison, i64 %{{.*}}, i64 0 + ; CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i64 1 + ; CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i64 2 + ; CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i64 3 + %dx.imad = call <4 x i64> @llvm.dx.imad.v4i64(<4 x i64> %p0, <4 x i64> %p1, <4 x i64> %p2) + ret <4 x i64> %dx.imad +} + +; Function Attrs: nocallback nofree nosync nounwind willreturn +declare <4 x i64> @llvm.dx.imad.v4i64(<4 x i64>, <4 x i64>, <4 x i64>) #1 + +; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}} diff --git a/llvm/test/CodeGen/DirectX/issue-152348.ll b/llvm/test/CodeGen/DirectX/issue-152348.ll new file mode 100644 index 0000000..aa0179d --- /dev/null +++ b/llvm/test/CodeGen/DirectX/issue-152348.ll @@ -0,0 +1,158 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -S -dxil-resource-type -dxil-resource-access -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s + +; NOTE: The two LLVM IR functions below are simplified versions of this HLSL +; RWStructuredBuffer<float16_t> a; +; RWStructuredBuffer<float16_t> b; +; RWStructuredBuffer<float16_t> c; +; cbuffer d { +; uint e; +; uint f; +; uint g; +; uint h; +; } +; [numthreads(6, 8, 1)] void CSMain() { +; if (h) { +; float16_t i = b[f]; +; c[g] = i; +; } else if(h == g) { +; float16_t i = b[g]; +; c[h] = i; +; } else { +; float16_t i = a[e]; +; c[g] = i; +; } +; } + +%__cblayout_d = type <{ i32, i32, i32, i32 }> + +@.str = internal unnamed_addr constant [2 x i8] c"a\00", align 1 +@d.cb = local_unnamed_addr global target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) poison +@e = external hidden local_unnamed_addr addrspace(2) global i32, align 4 +@d.str = internal unnamed_addr constant [2 x i8] c"d\00", align 1 + +define void @CSMain() local_unnamed_addr { +; CHECK-LABEL: define void @CSMain() local_unnamed_addr { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[CALLRAWBUFFERBINDING:%.*]] = tail call target("dx.CBuffer", target("dx.Layout", [[__CBLAYOUT_D:%.*]], 16, 0, 4, 8, 12)) @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_ds_16_0_4_8_12tt(i32 3, i32 0, i32 1, i32 0, ptr nonnull @d.str) +; CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", [[__CBLAYOUT_D]], 16, 0, 4, 8, 12)) [[CALLRAWBUFFERBINDING]], ptr @d.cb, align 4 +; CHECK-NEXT: [[LOADE:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq i32 [[LOADE]], 0 +; CHECK-NEXT: br i1 [[TOBOOL_NOT_I]], label %[[IF_ELSE_I:.*]], label %[[IF_THEN_I:.*]] +; CHECK: [[IF_THEN_I]]: +; CHECK-NEXT: [[IFSTMTCALLRAWBUFFERBINDING:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP1:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[IFSTMTCALLRAWBUFFERBINDING]], i32 [[LOADE]], i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { half, i1 } [[TMP1]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP0]], i32 [[LOADE]], i32 0, half [[TMP2]]) +; CHECK-NEXT: br label %[[_Z6CSMAINV_EXIT:.*]] +; CHECK: [[IF_ELSE_I]]: +; CHECK-NEXT: [[CALL2NDRAWBUFFERBINDING:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP3:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP4:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALL2NDRAWBUFFERBINDING]], i32 [[LOADE]], i32 0) +; CHECK-NEXT: [[TMP5:%.*]] = extractvalue { half, i1 } [[TMP4]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP3]], i32 [[LOADE]], i32 0, half [[TMP5]]) +; CHECK-NEXT: br label %[[_Z6CSMAINV_EXIT]] +; CHECK: [[_Z6CSMAINV_EXIT]]: +; CHECK-NEXT: ret void +; +entry: + %callCBufferBinding = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_ds_16_0_4_8_12tt(i32 3, i32 0, i32 1, i32 0, ptr nonnull @d.str) + store target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) %callCBufferBinding, ptr @d.cb, align 4 + %loadE = load i32, ptr addrspace(2) @e, align 4 + %tobool.not.i = icmp eq i32 %loadE, 0 + br i1 %tobool.not.i, label %if.else.i, label %if.then.i + +if.then.i: ; preds = %entry + %ifStmtcallRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) + %ifStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %ifStmtcallRawBufferBinding, i32 %loadE) + br label %_Z6CSMainv.exit + +if.else.i: ; preds = %entry + %call2ndRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) + %elseStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %call2ndRawBufferBinding, i32 %loadE) + br label %_Z6CSMainv.exit + +_Z6CSMainv.exit: ; preds = %if.else.i, %if.then.i + %.sink1 = phi ptr [ %ifStmtCallResourceGEP, %if.then.i ], [ %elseStmtCallResourceGEP, %if.else.i ] + %call3rdRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) + %sinkCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %call3rdRawBufferBinding, i32 %loadE) + %loadSink = load half, ptr %.sink1, align 2 + store half %loadSink, ptr %sinkCallResourceGEP, align 2 + ret void +} + +define void @Main() local_unnamed_addr { +; CHECK-LABEL: define void @Main() local_unnamed_addr { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[CALLRAWBUFFERBINDING1:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[CALLRAWBUFFERBINDING0:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[CALLRAWBUFFERBINDING:%.*]] = tail call target("dx.CBuffer", target("dx.Layout", [[__CBLAYOUT_D:%.*]], 16, 0, 4, 8, 12)) @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_ds_16_0_4_8_12tt(i32 3, i32 0, i32 1, i32 0, ptr nonnull @d.str) +; CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", [[__CBLAYOUT_D]], 16, 0, 4, 8, 12)) [[CALLRAWBUFFERBINDING]], ptr @d.cb, align 4 +; CHECK-NEXT: [[LOADE:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq i32 [[LOADE]], 0 +; CHECK-NEXT: br i1 [[TOBOOL_NOT_I]], label %[[IF_ELSE_I:.*]], label %[[IF_THEN_I:.*]] +; CHECK: [[IF_THEN_I]]: +; CHECK-NEXT: [[IFSTMTLOADE:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP1:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALLRAWBUFFERBINDING0]], i32 [[LOADE]], i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { half, i1 } [[TMP1]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP0]], i32 [[IFSTMTLOADE]], i32 0, half [[TMP2]]) +; CHECK-NEXT: br label %[[_Z6MAINV_EXIT:.*]] +; CHECK: [[IF_ELSE_I]]: +; CHECK-NEXT: [[ELSESTMTLOADE:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[ELSESTMTLOADE]], 0 +; CHECK-NEXT: br i1 [[CMP_I]], label %[[IF_THEN2_I:.*]], label %[[IF_ELSE6_I:.*]] +; CHECK: [[IF_THEN2_I]]: +; CHECK-NEXT: [[TMP3:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP4:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALLRAWBUFFERBINDING0]], i32 0, i32 0) +; CHECK-NEXT: [[TMP5:%.*]] = extractvalue { half, i1 } [[TMP4]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP3]], i32 0, i32 0, half [[TMP5]]) +; CHECK-NEXT: br label %[[_Z6MAINV_EXIT]] +; CHECK: [[IF_ELSE6_I]]: +; CHECK-NEXT: [[ELSESTMTLOADE2:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[TMP6:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP7:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALLRAWBUFFERBINDING1]], i32 [[ELSESTMTLOADE2]], i32 0) +; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { half, i1 } [[TMP7]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP6]], i32 [[ELSESTMTLOADE]], i32 0, half [[TMP8]]) +; CHECK-NEXT: br label %[[_Z6MAINV_EXIT]] +; CHECK: [[_Z6MAINV_EXIT]]: +; CHECK-NEXT: ret void +; +entry: + %callRawBufferBinding1 = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) + %callRawBufferBinding0 = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) + %callCBufferBinding = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_ds_16_0_4_8_12tt(i32 3, i32 0, i32 1, i32 0, ptr nonnull @d.str) + store target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) %callCBufferBinding, ptr @d.cb, align 4 + %loadE = load i32, ptr addrspace(2) @e, align 4 + %tobool.not.i = icmp eq i32 %loadE, 0 + br i1 %tobool.not.i, label %if.else.i, label %if.then.i + +if.then.i: ; preds = %entry + %ifStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %callRawBufferBinding0, i32 %loadE) + %ifStmtLoadE = load i32, ptr addrspace(2) @e, align 4 + br label %_Z6Mainv.exit + +if.else.i: ; preds = %entry + %elseStmtLoadE = load i32, ptr addrspace(2) @e, align 4 + %cmp.i = icmp eq i32 %elseStmtLoadE, 0 + br i1 %cmp.i, label %if.then2.i, label %if.else6.i + +if.then2.i: ; preds = %if.else.i + %elseifStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %callRawBufferBinding0, i32 0) + br label %_Z6Mainv.exit + +if.else6.i: ; preds = %if.else.i + %elseStmtLoadE2 = load i32, ptr addrspace(2) @e, align 4 + %elseStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %callRawBufferBinding1, i32 %elseStmtLoadE2) + br label %_Z6Mainv.exit + +_Z6Mainv.exit: ; preds = %if.else6.i, %if.then2.i, %if.then.i + %.sink2 = phi i32 [ %ifStmtLoadE, %if.then.i ], [ 0, %if.then2.i ], [ %elseStmtLoadE, %if.else6.i ] + %.sink.in = phi ptr [ %ifStmtCallResourceGEP, %if.then.i ], [ %elseifStmtCallResourceGEP, %if.then2.i ], [ %elseStmtCallResourceGEP, %if.else6.i ] + %callRawBufferBindingSink = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) + %.sink = load half, ptr %.sink.in, align 2 + %i11 = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %callRawBufferBindingSink, i32 %.sink2) + store half %.sink, ptr %i11, align 2 + ret void +} diff --git a/llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll b/llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll index e485fa2..b1eea30 100644 --- a/llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll +++ b/llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll @@ -11,9 +11,9 @@ define void @test_legal_lifetime() { %accum.i.flat = alloca [1 x i32], align 4 %gep = getelementptr i32, ptr %accum.i.flat, i32 0 - call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %accum.i.flat) + call void @llvm.lifetime.start.p0(ptr nonnull %accum.i.flat) store i32 0, ptr %gep, align 4 - call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %accum.i.flat) + call void @llvm.lifetime.end.p0(ptr nonnull %accum.i.flat) ret void } diff --git a/llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll b/llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll index 77133eb..256fcc0 100644 --- a/llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll +++ b/llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll @@ -13,12 +13,12 @@ ; CHECK-NEXT: [[ACCUM_I_FLAT:%.*]] = alloca [1 x i32], align 4 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[ACCUM_I_FLAT]], i32 0 ; CHECK-SM63-NEXT: store [1 x i32] undef, ptr [[ACCUM_I_FLAT]], align 4 -; CHECK-SM66-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[ACCUM_I_FLAT]]) +; CHECK-SM66-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-EMBED-NOT: bitcast ; CHECK-EMBED-NOT: lifetime ; CHECK-NEXT: store i32 0, ptr [[GEP]], align 4 ; CHECK-SM63-NEXT: store [1 x i32] undef, ptr [[ACCUM_I_FLAT]], align 4 -; CHECK-SM66-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[ACCUM_I_FLAT]]) +; CHECK-SM66-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-EMBED-NOT: bitcast ; CHECK-EMBED-NOT: lifetime ; CHECK-NEXT: ret void @@ -26,9 +26,9 @@ define void @test_legal_lifetime() { %accum.i.flat = alloca [1 x i32], align 4 %gep = getelementptr i32, ptr %accum.i.flat, i32 0 - call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %accum.i.flat) + call void @llvm.lifetime.start.p0(ptr nonnull %accum.i.flat) store i32 0, ptr %gep, align 4 - call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %accum.i.flat) + call void @llvm.lifetime.end.p0(ptr nonnull %accum.i.flat) ret void } diff --git a/llvm/test/CodeGen/DirectX/legalize-memset.ll b/llvm/test/CodeGen/DirectX/legalize-memset.ll index a73e737..ad45ac6 100644 --- a/llvm/test/CodeGen/DirectX/legalize-memset.ll +++ b/llvm/test/CodeGen/DirectX/legalize-memset.ll @@ -5,18 +5,14 @@ define void @replace_float_memset_test() #0 { ; CHECK-LABEL: define void @replace_float_memset_test( ; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: [[ACCUM_I_FLAT:%.*]] = alloca [2 x float], align 4 -; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: [[GEP:%.*]] = getelementptr [2 x float], ptr [[ACCUM_I_FLAT]], i32 0, i32 0 ; CHECK-NEXT: store float 0.000000e+00, ptr [[GEP]], align 4 ; CHECK-NEXT: [[GEP1:%.*]] = getelementptr [2 x float], ptr [[ACCUM_I_FLAT]], i32 0, i32 1 ; CHECK-NEXT: store float 0.000000e+00, ptr [[GEP1]], align 4 -; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: ret void ; %accum.i.flat = alloca [2 x float], align 4 - call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %accum.i.flat) call void @llvm.memset.p0.i32(ptr nonnull align 4 dereferenceable(8) %accum.i.flat, i8 0, i32 8, i1 false) - call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %accum.i.flat) ret void } @@ -24,18 +20,14 @@ define void @replace_half_memset_test() #0 { ; CHECK-LABEL: define void @replace_half_memset_test( ; CHECK-SAME: ) #[[ATTR0]] { ; CHECK-NEXT: [[ACCUM_I_FLAT:%.*]] = alloca [2 x half], align 4 -; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: [[GEP:%.*]] = getelementptr [2 x half], ptr [[ACCUM_I_FLAT]], i32 0, i32 0 ; CHECK-NEXT: store half 0xH0000, ptr [[GEP]], align 2 ; CHECK-NEXT: [[GEP1:%.*]] = getelementptr [2 x half], ptr [[ACCUM_I_FLAT]], i32 0, i32 1 ; CHECK-NEXT: store half 0xH0000, ptr [[GEP1]], align 2 -; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: ret void ; %accum.i.flat = alloca [2 x half], align 4 - call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %accum.i.flat) call void @llvm.memset.p0.i32(ptr nonnull align 4 dereferenceable(8) %accum.i.flat, i8 0, i32 4, i1 false) - call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %accum.i.flat) ret void } @@ -43,18 +35,14 @@ define void @replace_double_memset_test() #0 { ; CHECK-LABEL: define void @replace_double_memset_test( ; CHECK-SAME: ) #[[ATTR0]] { ; CHECK-NEXT: [[ACCUM_I_FLAT:%.*]] = alloca [2 x double], align 4 -; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: [[GEP:%.*]] = getelementptr [2 x double], ptr [[ACCUM_I_FLAT]], i32 0, i32 0 ; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP]], align 8 ; CHECK-NEXT: [[GEP1:%.*]] = getelementptr [2 x double], ptr [[ACCUM_I_FLAT]], i32 0, i32 1 ; CHECK-NEXT: store double 0.000000e+00, ptr [[GEP1]], align 8 -; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: ret void ; %accum.i.flat = alloca [2 x double], align 4 - call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %accum.i.flat) call void @llvm.memset.p0.i32(ptr nonnull align 4 dereferenceable(8) %accum.i.flat, i8 0, i32 16, i1 false) - call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %accum.i.flat) ret void } @@ -62,18 +50,14 @@ define void @replace_int16_memset_test() #0 { ; CHECK-LABEL: define void @replace_int16_memset_test( ; CHECK-SAME: ) #[[ATTR0]] { ; CHECK-NEXT: [[CACHE_I:%.*]] = alloca [2 x i16], align 2 -; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[CACHE_I]]) ; CHECK-NEXT: [[GEP:%.*]] = getelementptr [2 x i16], ptr [[CACHE_I]], i32 0, i32 0 ; CHECK-NEXT: store i16 0, ptr [[GEP]], align 2 ; CHECK-NEXT: [[GEP1:%.*]] = getelementptr [2 x i16], ptr [[CACHE_I]], i32 0, i32 1 ; CHECK-NEXT: store i16 0, ptr [[GEP1]], align 2 -; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[CACHE_I]]) ; CHECK-NEXT: ret void ; %cache.i = alloca [2 x i16], align 2 - call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %cache.i) call void @llvm.memset.p0.i32(ptr nonnull align 2 dereferenceable(4) %cache.i, i8 0, i32 4, i1 false) - call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %cache.i) ret void } @@ -81,16 +65,12 @@ define void @replace_int_memset_test() #0 { ; CHECK-LABEL: define void @replace_int_memset_test( ; CHECK-SAME: ) #[[ATTR0]] { ; CHECK-NEXT: [[ACCUM_I_FLAT:%.*]] = alloca [1 x i32], align 4 -; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: [[GEP:%.*]] = getelementptr [1 x i32], ptr [[ACCUM_I_FLAT]], i32 0, i32 0 ; CHECK-NEXT: store i32 0, ptr [[GEP]], align 4 -; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: ret void ; %accum.i.flat = alloca [1 x i32], align 4 - call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %accum.i.flat) call void @llvm.memset.p0.i32(ptr nonnull align 4 dereferenceable(8) %accum.i.flat, i8 0, i32 4, i1 false) - call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %accum.i.flat) ret void } @@ -101,25 +81,19 @@ define void @replace_int_memset_to_var_test() #0 { ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 ; CHECK-NEXT: store i32 1, ptr [[I]], align 4 ; CHECK-NEXT: [[I8_LOAD:%.*]] = load i32, ptr [[I]], align 4 -; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: [[GEP:%.*]] = getelementptr [1 x i32], ptr [[ACCUM_I_FLAT]], i32 0, i32 0 ; CHECK-NEXT: store i32 [[I8_LOAD]], ptr [[GEP]], align 4 -; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[ACCUM_I_FLAT]]) ; CHECK-NEXT: ret void ; %accum.i.flat = alloca [1 x i32], align 4 %i = alloca i8, align 4 store i8 1, ptr %i %i8.load = load i8, ptr %i - call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %accum.i.flat) call void @llvm.memset.p0.i32(ptr nonnull align 4 dereferenceable(8) %accum.i.flat, i8 %i8.load, i32 4, i1 false) - call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %accum.i.flat) ret void } attributes #0 = {"hlsl.export"} -declare void @llvm.lifetime.end.p0(i64 immarg, ptr captures(none)) -declare void @llvm.lifetime.start.p0(i64 immarg, ptr captures(none)) declare void @llvm.memset.p0.i32(ptr writeonly captures(none), i8, i32, i1 immarg) diff --git a/llvm/test/CodeGen/DirectX/llc-pipeline.ll b/llvm/test/CodeGen/DirectX/llc-pipeline.ll index 151603a..13c2539 100644 --- a/llvm/test/CodeGen/DirectX/llc-pipeline.ll +++ b/llvm/test/CodeGen/DirectX/llc-pipeline.ll @@ -7,13 +7,14 @@ ; CHECK-NEXT: Target Library Information ; CHECK-NEXT: DXIL Resource Type Analysis ; CHECK-NEXT: Target Transform Information - +; CHECK-NEXT: Assumption Cache Tracker ; CHECK-OBJ-NEXT: Machine Module Information ; CHECK-OBJ-NEXT: Machine Branch Probability Analysis ; CHECK-OBJ-NEXT: Create Garbage Collector Module Metadata ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: DXIL Finalize Linkage +; CHECK-NEXT: Dead Global Elimination ; CHECK-NEXT: FunctionPass Manager ; CHECK-NEXT: DXIL Resource Access ; CHECK-NEXT: DXIL Intrinsic Expansion @@ -26,6 +27,13 @@ ; CHECK-NEXT: FunctionPass Manager ; CHECK-NEXT: Dominator Tree Construction ; CHECK-NEXT: DXIL Forward Handle Accesses +; CHECK-NEXT: Dominator Tree Construction +; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) +; CHECK-NEXT: Function Alias Analysis Results +; CHECK-NEXT: Post-Dominator Tree Construction +; CHECK-NEXT: Memory SSA +; CHECK-NEXT: Natural Loop Information +; CHECK-NEXT: Dead Store Elimination ; CHECK-NEXT: DXIL Legalizer ; CHECK-NEXT: DXIL Resource Binding Analysis ; CHECK-NEXT: DXIL Resource Implicit Binding @@ -33,9 +41,9 @@ ; CHECK-NEXT: DXIL Module Metadata analysis ; CHECK-NEXT: DXIL Shader Flag Analysis ; CHECK-NEXT: DXIL Translate Metadata +; CHECK-NEXT: DXIL Root Signature Analysis ; CHECK-NEXT: DXIL Post Optimization Validation ; CHECK-NEXT: DXIL Op Lowering -; CHECK-NEXT: DXIL Root Signature Analysis ; CHECK-NEXT: DXIL Prepare Module ; CHECK-ASM-NEXT: DXIL Metadata Pretty Printer diff --git a/llvm/test/CodeGen/DirectX/phi-node-replacement.ll b/llvm/test/CodeGen/DirectX/phi-node-replacement.ll new file mode 100644 index 0000000..6aef126 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/phi-node-replacement.ll @@ -0,0 +1,42 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -S -dxil-resource-type -dxil-resource-access -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s + +%"$Globals" = type { i32 } +@CBV = external constant %"$Globals" +@.str = internal unnamed_addr constant [2 x i8] c"a\00", align 1 + +define half @CSMain() local_unnamed_addr { +; CHECK-LABEL: define half @CSMain() local_unnamed_addr { +; CHECK-NEXT: [[LOADGLOBAL:%.*]] = load i32, ptr @CBV, align 4 +; CHECK-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq i32 [[LOADGLOBAL]], 0 +; CHECK-NEXT: br i1 [[TOBOOL_NOT_I]], label %[[IF_ELSE_I:.*]], label %[[IF_THEN_I:.*]] +; CHECK: [[IF_THEN_I]]: +; CHECK-NEXT: [[IFSTMTCALLRAWBUFFERBINDING:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP1:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[IFSTMTCALLRAWBUFFERBINDING]], i32 [[LOADGLOBAL]], i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { half, i1 } [[TMP1]], 0 +; CHECK-NEXT: ret half [[TMP2]] +; CHECK: [[IF_ELSE_I]]: +; CHECK-NEXT: [[CALL2NDRAWBUFFERBINDING:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP3:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALL2NDRAWBUFFERBINDING]], i32 [[LOADGLOBAL]], i32 0) +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { half, i1 } [[TMP3]], 0 +; CHECK-NEXT: ret half [[TMP4]] +; + %loadGlobal = load i32, ptr @CBV, align 4 + %tobool.not.i = icmp eq i32 %loadGlobal, 0 + br i1 %tobool.not.i, label %if.else.i, label %if.then.i + + if.then.i: ; preds = %entry + %ifStmtcallRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) + %ifStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %ifStmtcallRawBufferBinding, i32 %loadGlobal) + br label %_Z6CSMainv.exit + + if.else.i: ; preds = %entry + %call2ndRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) + %elseStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %call2ndRawBufferBinding, i32 %loadGlobal) + br label %_Z6CSMainv.exit + + _Z6CSMainv.exit: ; preds = %if.else.i, %if.then.i + %.sink1 = phi ptr [ %ifStmtCallResourceGEP, %if.then.i ], [ %elseStmtCallResourceGEP, %if.else.i ] + %loadSink = load half, ptr %.sink1, align 2 + ret half %loadSink +} diff --git a/llvm/test/CodeGen/DirectX/resource_counter_error.ll b/llvm/test/CodeGen/DirectX/resource_counter_error.ll index f3dae48..cb5fdef 100644 --- a/llvm/test/CodeGen/DirectX/resource_counter_error.ll +++ b/llvm/test/CodeGen/DirectX/resource_counter_error.ll @@ -3,7 +3,7 @@ define void @inc_and_dec() { entry: - %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, i1 false, ptr null) + %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, ptr null) call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 -1) call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 1) ret void diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits-upperbound.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits-upperbound.ll new file mode 100644 index 0000000..37c60b5 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits-upperbound.ll @@ -0,0 +1,20 @@ +; RUN: opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; This is a valid code, it checks the limits of a binding space +; CHECK-NOT: error: + +%__cblayout_CB = type <{ float }> + +@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 5, i32 0, ptr nonnull @CB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2} +!2 = !{!"DescriptorTable", i32 0, !3} +!3 = !{!"CBV", i32 5, i32 0, i32 0, i32 0, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits.ll new file mode 100644 index 0000000..edef06b --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits.ll @@ -0,0 +1,22 @@ +; RUN: opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; This is a valid code, it checks the limits of a binding space + +; CHECK-NOT: error: + +%__cblayout_CB = type <{ float }> + +@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 0, i32 4294967294, i32 1, i32 0, ptr nonnull @CB.str) + %CB1 = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr nonnull @CB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3} +!2 = !{!"RootCBV", i32 0, i32 4294967294, i32 0, i32 4} +!3 = !{!"RootCBV", i32 0, i32 0, i32 0, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbuffer-range.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbuffer-range.ll new file mode 100644 index 0000000..e420225 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbuffer-range.ll @@ -0,0 +1,15 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: resource CBV (space=0, registers=[2, 2]) overlaps with resource CBV (space=0, registers=[0, 2]) + +define void @CSMain() "hlsl.shader"="compute" { +entry: + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3} +!2 = !{!"RootConstants", i32 0, i32 2, i32 0, i32 4} +!3 = !{!"DescriptorTable", i32 0, !4} +!4 = !{!"CBV", i32 3, i32 0, i32 0, i32 -1, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbv-binding.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbv-binding.ll new file mode 100644 index 0000000..de85525 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbv-binding.ll @@ -0,0 +1,18 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: CBV register 2 in space 666 does not have a binding in the Root Signature + +%__cblayout_CB = type <{ float }> + +@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 666, i32 2, i32 1, i32 0, ptr nonnull @CB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2} +!2 = !{!"RootConstants", i32 0, i32 2, i32 0, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-consecutive-ranges.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-consecutive-ranges.ll new file mode 100644 index 0000000..71d7038 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-consecutive-ranges.ll @@ -0,0 +1,19 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: CBV register 3 in space 0 does not have a binding in the Root Signature +%__cblayout_CB = type <{ float }> + +@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 6, i32 0, ptr nonnull @CB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2} +!2 = !{!"DescriptorTable", i32 0, !3, !4} +!3 = !{!"CBV", i32 5, i32 2, i32 0, i32 0, i32 4} +!4 = !{!"CBV", i32 4, i32 7, i32 0, i32 10, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-descriptor-table-range.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-descriptor-table-range.ll new file mode 100644 index 0000000..037f8c7 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-descriptor-table-range.ll @@ -0,0 +1,16 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: resource UAV (space=10, registers=[4294967295, 4294967295]) overlaps with resource UAV (space=10, registers=[4294967295, 4294967295]) + +define void @CSMain() "hlsl.shader"="compute" { +entry: + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !4} +!2 = !{!"DescriptorTable", i32 0, !3} +!3 = !{!"UAV", i32 -1, i32 -1, i32 10, i32 -1, i32 2} +!4 = !{!"DescriptorTable", i32 0, !5} +!5 = !{ !"UAV", i32 -1, i32 -1, i32 10, i32 5, i32 2 } diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-root-descriptor-range.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-root-descriptor-range.ll new file mode 100644 index 0000000..7098efb --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-root-descriptor-range.ll @@ -0,0 +1,15 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: resource UAV (space=1, registers=[3, 3]) overlaps with resource UAV (space=1, registers=[0, 3]) + +define void @CSMain() "hlsl.shader"="compute" { +entry: + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !4} +!2 = !{!"RootUAV", i32 0, i32 3, i32 1, i32 4} +!4 = !{!"DescriptorTable", i32 0, !5} +!5 = !{!"UAV", i32 4, i32 0, i32 1, i32 -1, i32 2} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-binding.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-binding.ll new file mode 100644 index 0000000..9b5c5d6 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-binding.ll @@ -0,0 +1,18 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: Sampler register 3 in space 2 does not have a binding in the Root Signature + +@Smp.str = private unnamed_addr constant [4 x i8] c"Smp\00", align 1 + + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %Sampler = call target("dx.Sampler", 0) @llvm.dx.resource.handlefrombinding(i32 2, i32 3, i32 1, i32 0, ptr nonnull @Smp.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2} +!2 = !{!"DescriptorTable", i32 0, !3} +!3 = !{!"Sampler", i32 1, i32 42, i32 0, i32 -1, i32 0} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler.ll new file mode 100644 index 0000000..c244095 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler.ll @@ -0,0 +1,15 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: resource Sampler (space=0, registers=[42, 42]) overlaps with resource Sampler (space=0, registers=[42, 42]) + +define void @CSMain() "hlsl.shader"="compute" { +entry: + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3} +!2 = !{ !"StaticSampler", i32 5, i32 4, i32 5, i32 3, float 0x3FF7CCCCC0000000, i32 10, i32 2, i32 1, float -1.270000e+02, float 1.220000e+02, i32 42, i32 0, i32 0 } +!3 = !{!"DescriptorTable", i32 0, !4} +!4 = !{!"Sampler", i32 1, i32 42, i32 0, i32 -1, i32 0} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-srv-binding.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-srv-binding.ll new file mode 100644 index 0000000..87a48a3 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-srv-binding.ll @@ -0,0 +1,23 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: SRV register 0 in space 0 does not have a binding in the Root Signature + +@SB.str = private unnamed_addr constant [3 x i8] c"SB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: +; StructuredBuffer<int> In : register(t0, space0); + %SB = tail call target("dx.RawBuffer", i32, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @SB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3, !5, !7} +!2 = !{!"RootCBV", i32 0, i32 3, i32 666, i32 4} +!3 = !{!"DescriptorTable", i32 1, !4} +!4 = !{!"SRV", i32 1, i32 0, i32 0, i32 -1, i32 4} +!5 = !{!"DescriptorTable", i32 0, !6} +!6 = !{!"Sampler", i32 2, i32 0, i32 0, i32 -1, i32 0} +!7 = !{!"DescriptorTable", i32 0, !8} +!8 = !{!"UAV", i32 -1, i32 0, i32 0, i32 -1, i32 2} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-static-sampler-range.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-static-sampler-range.ll new file mode 100644 index 0000000..9ac02ebb --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-static-sampler-range.ll @@ -0,0 +1,14 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: resource Sampler (space=0, registers=[42, 42]) overlaps with resource Sampler (space=0, registers=[42, 42]) + +define void @CSMain() "hlsl.shader"="compute" { +entry: + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3} +!2 = !{ !"StaticSampler", i32 5, i32 4, i32 5, i32 3, float 0x3FF7CCCCC0000000, i32 10, i32 2, i32 1, float -1.270000e+02, float 1.220000e+02, i32 42, i32 0, i32 0 } +!3 = !{ !"StaticSampler", i32 4, i32 2, i32 3, i32 5, float 0x3FF6CCCCC0000000, i32 9, i32 3, i32 2, float -1.280000e+02, float 1.280000e+02, i32 42, i32 0, i32 0 } diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-uav-binding.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-uav-binding.ll new file mode 100644 index 0000000..a74766d --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-uav-binding.ll @@ -0,0 +1,23 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: UAV register 4294967294 in space 0 does not have a binding in the Root Signature + +@RWB.str = private unnamed_addr constant [4 x i8] c"RWB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: +; RWBuffer<float> UAV : register(4294967294); + %RWB = tail call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 4294967294, i32 1, i32 0, ptr nonnull @RWB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3, !5, !7} +!2 = !{!"RootCBV", i32 0, i32 3, i32 666, i32 4} +!3 = !{!"DescriptorTable", i32 1, !4} +!4 = !{!"SRV", i32 1, i32 0, i32 0, i32 -1, i32 4} +!5 = !{!"DescriptorTable", i32 0, !6} +!6 = !{!"Sampler", i32 2, i32 0, i32 0, i32 -1, i32 0} +!7 = !{!"DescriptorTable", i32 0, !8} +!8 = !{!"UAV", i32 10, i32 0, i32 0, i32 -1, i32 2} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation.ll new file mode 100644 index 0000000..0fdba27 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation.ll @@ -0,0 +1,20 @@ +; RUN: opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s +; We have a valid root signature, this should compile successfully + +define void @CSMain() "hlsl.shader"="compute" { +entry: + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3, !5, !7, !9} +!2 = !{!"RootCBV", i32 0, i32 3, i32 1, i32 4} +!9 = !{!"RootConstants", i32 0, i32 2, i32 0, i32 4} +!3 = !{!"DescriptorTable", i32 0, !4} +!4 = !{!"SRV", i32 1, i32 0, i32 0, i32 -1, i32 0} +!5 = !{!"DescriptorTable", i32 0, !6} +!6 = !{!"Sampler", i32 5, i32 3, i32 2, i32 -1, i32 0} +!7 = !{!"DescriptorTable", i32 0, !8} +!8 = !{!"UAV", i32 -1, i32 0, i32 0, i32 -1, i32 2} diff --git a/llvm/test/CodeGen/DirectX/scalar-data.ll b/llvm/test/CodeGen/DirectX/scalar-data.ll index 4861a08..d9c8df9 100644 --- a/llvm/test/CodeGen/DirectX/scalar-data.ll +++ b/llvm/test/CodeGen/DirectX/scalar-data.ll @@ -1,4 +1,4 @@ -; RUN: llc %s -mtriple=dxil-pc-shadermodel6.3-library --filetype=asm -o - | FileCheck %s +; RUN: opt -S -passes='dxil-data-scalarization,dxil-flatten-arrays' -mtriple=dxil-unknown-shadermodel6.5-compute %s | FileCheck %s ; Make sure we don't touch arrays without vectors and that can recurse and flatten multiple-dimension arrays of vectors diff --git a/llvm/test/CodeGen/DirectX/umad.ll b/llvm/test/CodeGen/DirectX/umad.ll index 104d238..76516a2 100644 --- a/llvm/test/CodeGen/DirectX/umad.ll +++ b/llvm/test/CodeGen/DirectX/umad.ll @@ -1,17 +1,13 @@ -; RUN: opt -S -dxil-op-lower < %s | FileCheck %s +; RUN: opt -S -scalarizer -dxil-op-lower < %s | FileCheck %s ; Make sure dxil operation function calls for round are generated for float and half. -; CHECK:call i16 @dx.op.tertiary.i16(i32 49, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR:]] -; CHECK:call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] -; CHECK:call i64 @dx.op.tertiary.i64(i32 49, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] - -; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}} target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64" target triple = "dxil-pc-shadermodel6.7-library" ; Function Attrs: noinline nounwind optnone define noundef i16 @umad_ushort(i16 noundef %p0, i16 noundef %p1, i16 noundef %p2) #0 { entry: + ; CHECK: call i16 @dx.op.tertiary.i16(i32 49, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR:]] %p2.addr = alloca i16, align 2 %p1.addr = alloca i16, align 2 %p0.addr = alloca i16, align 2 @@ -31,6 +27,7 @@ declare i16 @llvm.dx.umad.i16(i16, i16, i16) #1 ; Function Attrs: noinline nounwind optnone define noundef i32 @umad_uint(i32 noundef %p0, i32 noundef %p1, i32 noundef %p2) #0 { entry: + ; CHECK: call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] %p2.addr = alloca i32, align 4 %p1.addr = alloca i32, align 4 %p0.addr = alloca i32, align 4 @@ -50,6 +47,7 @@ declare i32 @llvm.dx.umad.i32(i32, i32, i32) #1 ; Function Attrs: noinline nounwind optnone define noundef i64 @umad_uint64(i64 noundef %p0, i64 noundef %p1, i64 noundef %p2) #0 { entry: + ; CHECK: call i64 @dx.op.tertiary.i64(i32 49, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] %p2.addr = alloca i64, align 8 %p1.addr = alloca i64, align 8 %p0.addr = alloca i64, align 8 @@ -65,3 +63,95 @@ entry: ; Function Attrs: nocallback nofree nosync nounwind willreturn declare i64 @llvm.dx.umad.i64(i64, i64, i64) #1 + +; Function Attrs: noinline nounwind optnone +define noundef <4 x i16> @umad_uint16_t4(<4 x i16> noundef %p0, <4 x i16> noundef %p1, <4 x i16> noundef %p2) #0 { +entry: + ; CHECK: extractelement <4 x i16> %p0, i64 0 + ; CHECK: extractelement <4 x i16> %p1, i64 0 + ; CHECK: extractelement <4 x i16> %p2, i64 0 + ; CHECK: call i16 @dx.op.tertiary.i16(i32 49, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i16> %p0, i64 1 + ; CHECK: extractelement <4 x i16> %p1, i64 1 + ; CHECK: extractelement <4 x i16> %p2, i64 1 + ; CHECK: call i16 @dx.op.tertiary.i16(i32 49, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i16> %p0, i64 2 + ; CHECK: extractelement <4 x i16> %p1, i64 2 + ; CHECK: extractelement <4 x i16> %p2, i64 2 + ; CHECK: call i16 @dx.op.tertiary.i16(i32 49, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i16> %p0, i64 3 + ; CHECK: extractelement <4 x i16> %p1, i64 3 + ; CHECK: extractelement <4 x i16> %p2, i64 3 + ; CHECK: call i16 @dx.op.tertiary.i16(i32 49, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}}) #[[#ATTR]] + ; CHECK: insertelement <4 x i16> poison, i16 %{{.*}}, i64 0 + ; CHECK: insertelement <4 x i16> %{{.*}}, i16 %{{.*}}, i64 1 + ; CHECK: insertelement <4 x i16> %{{.*}}, i16 %{{.*}}, i64 2 + ; CHECK: insertelement <4 x i16> %{{.*}}, i16 %{{.*}}, i64 3 + %dx.umad = call <4 x i16> @llvm.dx.umad.v4i16(<4 x i16> %p0, <4 x i16> %p1, <4 x i16> %p2) + ret <4 x i16> %dx.umad +} + +; Function Attrs: nocallback nofree nosync nounwind willreturn +declare <4 x i16> @llvm.dx.umad.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) #1 + +; Function Attrs: noinline nounwind optnone +define noundef <4 x i32> @umad_uint4(<4 x i32> noundef %p0, <4 x i32> noundef %p1, <4 x i32> noundef %p2) #0 { +entry: + ; CHECK: extractelement <4 x i32> %p0, i64 0 + ; CHECK: extractelement <4 x i32> %p1, i64 0 + ; CHECK: extractelement <4 x i32> %p2, i64 0 + ; CHECK: call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i32> %p0, i64 1 + ; CHECK: extractelement <4 x i32> %p1, i64 1 + ; CHECK: extractelement <4 x i32> %p2, i64 1 + ; CHECK: call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i32> %p0, i64 2 + ; CHECK: extractelement <4 x i32> %p1, i64 2 + ; CHECK: extractelement <4 x i32> %p2, i64 2 + ; CHECK: call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i32> %p0, i64 3 + ; CHECK: extractelement <4 x i32> %p1, i64 3 + ; CHECK: extractelement <4 x i32> %p2, i64 3 + ; CHECK: call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) #[[#ATTR]] + ; CHECK: insertelement <4 x i32> poison, i32 %{{.*}}, i64 0 + ; CHECK: insertelement <4 x i32> %{{.*}}, i32 %{{.*}}, i64 1 + ; CHECK: insertelement <4 x i32> %{{.*}}, i32 %{{.*}}, i64 2 + ; CHECK: insertelement <4 x i32> %{{.*}}, i32 %{{.*}}, i64 3 + %dx.umad = call <4 x i32> @llvm.dx.umad.v4i32(<4 x i32> %p0, <4 x i32> %p1, <4 x i32> %p2) + ret <4 x i32> %dx.umad +} + +; Function Attrs: nocallback nofree nosync nounwind willreturn +declare <4 x i32> @llvm.dx.umad.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) #1 + +; Function Attrs: noinline nounwind optnone +define noundef <4 x i64> @umad_uint64_t4(<4 x i64> noundef %p0, <4 x i64> noundef %p1, <4 x i64> noundef %p2) #0 { +entry: + ; CHECK: extractelement <4 x i64> %p0, i64 0 + ; CHECK: extractelement <4 x i64> %p1, i64 0 + ; CHECK: extractelement <4 x i64> %p2, i64 0 + ; CHECK: call i64 @dx.op.tertiary.i64(i32 49, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i64> %p0, i64 1 + ; CHECK: extractelement <4 x i64> %p1, i64 1 + ; CHECK: extractelement <4 x i64> %p2, i64 1 + ; CHECK: call i64 @dx.op.tertiary.i64(i32 49, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i64> %p0, i64 2 + ; CHECK: extractelement <4 x i64> %p1, i64 2 + ; CHECK: extractelement <4 x i64> %p2, i64 2 + ; CHECK: call i64 @dx.op.tertiary.i64(i32 49, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] + ; CHECK: extractelement <4 x i64> %p0, i64 3 + ; CHECK: extractelement <4 x i64> %p1, i64 3 + ; CHECK: extractelement <4 x i64> %p2, i64 3 + ; CHECK: call i64 @dx.op.tertiary.i64(i32 49, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) #[[#ATTR]] + ; CHECK: insertelement <4 x i64> poison, i64 %{{.*}}, i64 0 + ; CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i64 1 + ; CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i64 2 + ; CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i64 3 + %dx.umad = call <4 x i64> @llvm.dx.umad.v4i64(<4 x i64> %p0, <4 x i64> %p1, <4 x i64> %p2) + ret <4 x i64> %dx.umad +} + +; Function Attrs: nocallback nofree nosync nounwind willreturn +declare <4 x i64> @llvm.dx.umad.v4i64(<4 x i64>, <4 x i64>, <4 x i64>) #1 + +; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}} |