diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll b/llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll index 6d69b4c..fcf2aa4 100644 --- a/llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll +++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s +; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefix=GCN %s ; The first 64 SGPR spills can go to a VGPR, but there isn't a second ; so some spills must be to memory. The last 16 element spill runs out of lanes at the 15th element. |