diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll index 30b7b3b..7a20b5c 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=0 | FileCheck %s -check-prefixes=CHECK,CHECK-SDAG-TRUE16 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -global-isel=0 | FileCheck %s -check-prefixes=CHECK,CHECK-FAKE16 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 | FileCheck %s -check-prefixes=CHECK,CHECK-GISEL-TRUE16 -; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -global-isel=1 | FileCheck %s -check-prefixes=CHECK,CHECK-FAKE16 +; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 -new-reg-bank-select | FileCheck %s -check-prefixes=CHECK,CHECK-GISEL +; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -global-isel=1 -new-reg-bank-select | FileCheck %s -check-prefixes=CHECK,CHECK-GISEL define amdgpu_kernel void @raw_atomic_buffer_load_i32(<4 x i32> %addr) { ; CHECK-LABEL: raw_atomic_buffer_load_i32: @@ -251,24 +251,26 @@ define amdgpu_kernel void @raw_atomic_buffer_load_v4i16(<4 x i32> %addr) { ; CHECK-FAKE16-NEXT: ; %bb.2: ; %bb2 ; CHECK-FAKE16-NEXT: s_endpgm ; -; CHECK-GISEL-TRUE16-LABEL: raw_atomic_buffer_load_v4i16: -; CHECK-GISEL-TRUE16: ; %bb.0: ; %bb -; CHECK-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 -; CHECK-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0 -; CHECK-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0 -; CHECK-GISEL-TRUE16-NEXT: .LBB7_1: ; %bb1 -; CHECK-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1 -; CHECK-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) -; CHECK-GISEL-TRUE16-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc -; CHECK-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) -; CHECK-GISEL-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l -; CHECK-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; CHECK-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v0 -; CHECK-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4 -; CHECK-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4 -; CHECK-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB7_1 -; CHECK-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2 -; CHECK-GISEL-TRUE16-NEXT: s_endpgm +; CHECK-GISEL-LABEL: raw_atomic_buffer_load_v4i16: +; CHECK-GISEL: ; %bb.0: ; %bb +; CHECK-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; CHECK-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 +; CHECK-GISEL-NEXT: s_mov_b32 s4, 0 +; CHECK-GISEL-NEXT: .LBB7_1: ; %bb1 +; CHECK-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1 +; CHECK-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; CHECK-GISEL-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc +; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) +; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v1 +; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v2 +; CHECK-GISEL-NEXT: s_pack_ll_b32_b16 s5, s5, s6 +; CHECK-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; CHECK-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, s5, v0 +; CHECK-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4 +; CHECK-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4 +; CHECK-GISEL-NEXT: s_cbranch_execnz .LBB7_1 +; CHECK-GISEL-NEXT: ; %bb.2: ; %bb2 +; CHECK-GISEL-NEXT: s_endpgm bb: %id = tail call i32 @llvm.amdgcn.workitem.id.x() br label %bb1 |