diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll | 3195 |
1 files changed, 3052 insertions, 143 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll b/llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll index d0b41e1..57b4857 100644 --- a/llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll +++ b/llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll @@ -1,16 +1,16 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -global-isel=0 -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=SI-SDAG %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -global-isel=1 -enable-unsafe-fp-math < %s | FileCheck -check-prefixes=SI-GISEL %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -global-isel=0 -mattr=-flat-for-global -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=VI-SDAG %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -global-isel=1 -mattr=-flat-for-global -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=VI-GISEL %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 -mattr=-flat-for-global -denormal-fp-math=preserve-sign -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=GFX9-SDAG %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -global-isel=1 -mattr=-flat-for-global -denormal-fp-math=preserve-sign -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=GFX9-GISEL %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx950 -global-isel=0 -mattr=-flat-for-global -denormal-fp-math=preserve-sign -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=GFX950-SDAG %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx950 -global-isel=1 -mattr=-flat-for-global -denormal-fp-math=preserve-sign -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=GFX950-GISEL %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 -mattr=-flat-for-global,+real-true16 -denormal-fp-math=preserve-sign -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-SDAG-TRUE16 %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 -mattr=-flat-for-global,-real-true16 -denormal-fp-math=preserve-sign -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-SDAG-FAKE16 %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -mattr=-flat-for-global,+real-true16 -denormal-fp-math=preserve-sign -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-GISEL-TRUE16 %s -; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -mattr=-flat-for-global,-real-true16 -denormal-fp-math=preserve-sign -enable-unsafe-fp-math < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-GISEL-FAKE16 %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -global-isel=0 < %s | FileCheck -enable-var-scope -check-prefixes=SI-SDAG %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -global-isel=1 < %s | FileCheck -check-prefixes=SI-GISEL %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -global-isel=0 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=VI-SDAG %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -global-isel=1 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=VI-GISEL %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 -mattr=-flat-for-global -denormal-fp-math=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX9-SDAG %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -global-isel=1 -mattr=-flat-for-global -denormal-fp-math=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX9-GISEL %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx950 -global-isel=0 -mattr=-flat-for-global -denormal-fp-math=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX950-SDAG %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx950 -global-isel=1 -mattr=-flat-for-global -denormal-fp-math=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX950-GISEL %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 -mattr=-flat-for-global,+real-true16 -denormal-fp-math=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-SDAG-TRUE16 %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 -mattr=-flat-for-global,-real-true16 -denormal-fp-math=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-SDAG-FAKE16 %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -mattr=-flat-for-global,+real-true16 -denormal-fp-math=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-GISEL-TRUE16 %s +; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -mattr=-flat-for-global,-real-true16 -denormal-fp-math=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-GISEL-FAKE16 %s define amdgpu_kernel void @fptrunc_f32_to_f16( ; SI-SDAG-LABEL: fptrunc_f32_to_f16: @@ -201,8 +201,8 @@ entry: ret void } -define amdgpu_kernel void @fptrunc_f64_to_f16( -; SI-SDAG-LABEL: fptrunc_f64_to_f16: +define amdgpu_kernel void @fptrunc_f32_to_f16_afn(ptr addrspace(1) %r, +; SI-SDAG-LABEL: fptrunc_f32_to_f16_afn: ; SI-SDAG: ; %bb.0: ; %entry ; SI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 ; SI-SDAG-NEXT: s_mov_b32 s7, 0xf000 @@ -212,29 +212,27 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0) ; SI-SDAG-NEXT: s_mov_b32 s8, s2 ; SI-SDAG-NEXT: s_mov_b32 s9, s3 -; SI-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 +; SI-SDAG-NEXT: buffer_load_dword v0, off, s[8:11], 0 ; SI-SDAG-NEXT: s_mov_b32 s4, s0 ; SI-SDAG-NEXT: s_mov_b32 s5, s1 ; SI-SDAG-NEXT: s_waitcnt vmcnt(0) -; SI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] ; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-SDAG-NEXT: buffer_store_short v0, off, s[4:7], 0 ; SI-SDAG-NEXT: s_endpgm ; -; SI-GISEL-LABEL: fptrunc_f64_to_f16: +; SI-GISEL-LABEL: fptrunc_f32_to_f16_afn: ; SI-GISEL: ; %bb.0: ; %entry ; SI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 ; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) -; SI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0 +; SI-GISEL-NEXT: s_load_dword s3, s[2:3], 0x0 ; SI-GISEL-NEXT: s_mov_b32 s2, -1 ; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) -; SI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[4:5] -; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, s3 ; SI-GISEL-NEXT: s_mov_b32 s3, 0xf000 ; SI-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 ; SI-GISEL-NEXT: s_endpgm ; -; VI-SDAG-LABEL: fptrunc_f64_to_f16: +; VI-SDAG-LABEL: fptrunc_f32_to_f16_afn: ; VI-SDAG: ; %bb.0: ; %entry ; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; VI-SDAG-NEXT: s_mov_b32 s7, 0xf000 @@ -244,29 +242,27 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0) ; VI-SDAG-NEXT: s_mov_b32 s8, s2 ; VI-SDAG-NEXT: s_mov_b32 s9, s3 -; VI-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 +; VI-SDAG-NEXT: buffer_load_dword v0, off, s[8:11], 0 ; VI-SDAG-NEXT: s_mov_b32 s4, s0 ; VI-SDAG-NEXT: s_mov_b32 s5, s1 ; VI-SDAG-NEXT: s_waitcnt vmcnt(0) -; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] ; VI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 ; VI-SDAG-NEXT: buffer_store_short v0, off, s[4:7], 0 ; VI-SDAG-NEXT: s_endpgm ; -; VI-GISEL-LABEL: fptrunc_f64_to_f16: +; VI-GISEL-LABEL: fptrunc_f32_to_f16_afn: ; VI-GISEL: ; %bb.0: ; %entry ; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) -; VI-GISEL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 +; VI-GISEL-NEXT: s_load_dword s2, s[2:3], 0x0 +; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000 ; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) -; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3] +; VI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, s2 ; VI-GISEL-NEXT: s_mov_b32 s2, -1 -; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000 -; VI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 ; VI-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 ; VI-GISEL-NEXT: s_endpgm ; -; GFX9-SDAG-LABEL: fptrunc_f64_to_f16: +; GFX9-SDAG-LABEL: fptrunc_f32_to_f16_afn: ; GFX9-SDAG: ; %bb.0: ; %entry ; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX9-SDAG-NEXT: s_mov_b32 s7, 0xf000 @@ -276,29 +272,27 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX9-SDAG-NEXT: s_mov_b32 s9, s3 -; GFX9-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 +; GFX9-SDAG-NEXT: buffer_load_dword v0, off, s[8:11], 0 ; GFX9-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX9-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX9-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] ; GFX9-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 ; GFX9-SDAG-NEXT: buffer_store_short v0, off, s[4:7], 0 ; GFX9-SDAG-NEXT: s_endpgm ; -; GFX9-GISEL-LABEL: fptrunc_f64_to_f16: +; GFX9-GISEL-LABEL: fptrunc_f32_to_f16_afn: ; GFX9-GISEL: ; %bb.0: ; %entry ; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-GISEL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 +; GFX9-GISEL-NEXT: s_load_dword s2, s[2:3], 0x0 +; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000 ; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3] +; GFX9-GISEL-NEXT: v_cvt_f16_f32_e32 v0, s2 ; GFX9-GISEL-NEXT: s_mov_b32 s2, -1 -; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000 -; GFX9-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 ; GFX9-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 ; GFX9-GISEL-NEXT: s_endpgm ; -; GFX950-SDAG-LABEL: fptrunc_f64_to_f16: +; GFX950-SDAG-LABEL: fptrunc_f32_to_f16_afn: ; GFX950-SDAG: ; %bb.0: ; %entry ; GFX950-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX950-SDAG-NEXT: s_mov_b32 s7, 0xf000 @@ -308,23 +302,541 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0) ; GFX950-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX950-SDAG-NEXT: s_mov_b32 s9, s3 -; GFX950-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 +; GFX950-SDAG-NEXT: buffer_load_dword v0, off, s[8:11], 0 ; GFX950-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX950-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX950-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] ; GFX950-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 ; GFX950-SDAG-NEXT: buffer_store_short v0, off, s[4:7], 0 ; GFX950-SDAG-NEXT: s_endpgm ; +; GFX950-GISEL-LABEL: fptrunc_f32_to_f16_afn: +; GFX950-GISEL: ; %bb.0: ; %entry +; GFX950-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-GISEL-NEXT: s_load_dword s2, s[2:3], 0x0 +; GFX950-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-GISEL-NEXT: v_cvt_f16_f32_e32 v0, s2 +; GFX950-GISEL-NEXT: s_mov_b32 s2, -1 +; GFX950-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 +; GFX950-GISEL-NEXT: s_endpgm +; +; GFX11-SDAG-TRUE16-LABEL: fptrunc_f32_to_f16_afn: +; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry +; GFX11-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s6, -1 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s10, s6 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s11, s7 +; GFX11-SDAG-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s8, s2 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s9, s3 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-TRUE16-NEXT: buffer_load_b32 v0, off, s[8:11], 0 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0 +; GFX11-SDAG-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 +; GFX11-SDAG-TRUE16-NEXT: s_endpgm +; +; GFX11-SDAG-FAKE16-LABEL: fptrunc_f32_to_f16_afn: +; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry +; GFX11-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s6, -1 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s10, s6 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s11, s7 +; GFX11-SDAG-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s8, s2 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s9, s3 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-FAKE16-NEXT: buffer_load_b32 v0, off, s[8:11], 0 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-SDAG-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 +; GFX11-SDAG-FAKE16-NEXT: s_endpgm +; +; GFX11-GISEL-TRUE16-LABEL: fptrunc_f32_to_f16_afn: +; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry +; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-TRUE16-NEXT: s_load_b32 s2, s[2:3], 0x0 +; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s3, 0x31016000 +; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, s2 +; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s2, -1 +; GFX11-GISEL-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0 +; GFX11-GISEL-TRUE16-NEXT: s_endpgm +; +; GFX11-GISEL-FAKE16-LABEL: fptrunc_f32_to_f16_afn: +; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry +; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-FAKE16-NEXT: s_load_b32 s2, s[2:3], 0x0 +; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s3, 0x31016000 +; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, s2 +; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s2, -1 +; GFX11-GISEL-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0 +; GFX11-GISEL-FAKE16-NEXT: s_endpgm + ptr addrspace(1) %a) { +entry: + %a.val = load float, ptr addrspace(1) %a + %r.val = fptrunc afn float %a.val to half + store half %r.val, ptr addrspace(1) %r + ret void +} + +define amdgpu_kernel void @fptrunc_f64_to_f16( +; SI-SDAG-LABEL: fptrunc_f64_to_f16: +; SI-SDAG: ; %bb.0: ; %entry +; SI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 +; SI-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; SI-SDAG-NEXT: s_mov_b32 s2, -1 +; SI-SDAG-NEXT: s_mov_b32 s10, s2 +; SI-SDAG-NEXT: s_mov_b32 s11, s3 +; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; SI-SDAG-NEXT: s_mov_b32 s8, s6 +; SI-SDAG-NEXT: s_mov_b32 s9, s7 +; SI-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 +; SI-SDAG-NEXT: s_movk_i32 s0, 0x7e00 +; SI-SDAG-NEXT: s_waitcnt vmcnt(0) +; SI-SDAG-NEXT: v_readfirstlane_b32 s1, v1 +; SI-SDAG-NEXT: s_and_b32 s6, s1, 0x1ff +; SI-SDAG-NEXT: s_lshr_b32 s7, s1, 8 +; SI-SDAG-NEXT: s_bfe_u32 s8, s1, 0xb0014 +; SI-SDAG-NEXT: v_or_b32_e32 v0, s6, v0 +; SI-SDAG-NEXT: s_and_b32 s6, s7, 0xffe +; SI-SDAG-NEXT: s_sub_i32 s7, 0x3f1, s8 +; SI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; SI-SDAG-NEXT: v_med3_i32 v1, s7, 0, 13 +; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; SI-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; SI-SDAG-NEXT: s_or_b32 s6, s6, s7 +; SI-SDAG-NEXT: s_or_b32 s7, s6, 0x1000 +; SI-SDAG-NEXT: s_lshr_b32 s10, s7, s9 +; SI-SDAG-NEXT: s_lshl_b32 s9, s10, s9 +; SI-SDAG-NEXT: s_cmp_lg_u32 s9, s7 +; SI-SDAG-NEXT: s_cselect_b32 s7, 1, 0 +; SI-SDAG-NEXT: s_addk_i32 s8, 0xfc10 +; SI-SDAG-NEXT: s_or_b32 s7, s10, s7 +; SI-SDAG-NEXT: s_lshl_b32 s9, s8, 12 +; SI-SDAG-NEXT: s_or_b32 s9, s6, s9 +; SI-SDAG-NEXT: s_cmp_lt_i32 s8, 1 +; SI-SDAG-NEXT: s_cselect_b32 s7, s7, s9 +; SI-SDAG-NEXT: s_and_b32 s9, s7, 7 +; SI-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; SI-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; SI-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; SI-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; SI-SDAG-NEXT: s_lshr_b32 s7, s7, 2 +; SI-SDAG-NEXT: s_or_b32 s9, s9, s10 +; SI-SDAG-NEXT: s_add_i32 s7, s7, s9 +; SI-SDAG-NEXT: s_cmp_lt_i32 s8, 31 +; SI-SDAG-NEXT: s_cselect_b32 s7, s7, 0x7c00 +; SI-SDAG-NEXT: s_cmp_lg_u32 s6, 0 +; SI-SDAG-NEXT: s_cselect_b32 s0, s0, 0x7c00 +; SI-SDAG-NEXT: s_cmpk_eq_i32 s8, 0x40f +; SI-SDAG-NEXT: s_cselect_b32 s0, s0, s7 +; SI-SDAG-NEXT: s_lshr_b32 s1, s1, 16 +; SI-SDAG-NEXT: s_and_b32 s1, s1, 0x8000 +; SI-SDAG-NEXT: s_or_b32 s6, s1, s0 +; SI-SDAG-NEXT: s_mov_b32 s0, s4 +; SI-SDAG-NEXT: s_mov_b32 s1, s5 +; SI-SDAG-NEXT: v_mov_b32_e32 v0, s6 +; SI-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0 +; SI-SDAG-NEXT: s_endpgm +; +; SI-GISEL-LABEL: fptrunc_f64_to_f16: +; SI-GISEL: ; %bb.0: ; %entry +; SI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 +; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; SI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0 +; SI-GISEL-NEXT: s_mov_b32 s2, -1 +; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; SI-GISEL-NEXT: s_bfe_u32 s3, s5, 0xb0014 +; SI-GISEL-NEXT: s_lshr_b32 s6, s5, 8 +; SI-GISEL-NEXT: s_and_b32 s7, s5, 0x1ff +; SI-GISEL-NEXT: s_addk_i32 s3, 0xfc10 +; SI-GISEL-NEXT: s_and_b32 s6, s6, 0xffe +; SI-GISEL-NEXT: s_or_b32 s4, s7, s4 +; SI-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; SI-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s4, s6, s4 +; SI-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; SI-GISEL-NEXT: s_cselect_b32 s6, 1, 0 +; SI-GISEL-NEXT: s_lshl_b32 s6, s6, 9 +; SI-GISEL-NEXT: s_lshl_b32 s7, s3, 12 +; SI-GISEL-NEXT: s_sub_i32 s8, 1, s3 +; SI-GISEL-NEXT: s_or_b32 s9, s4, 0x1000 +; SI-GISEL-NEXT: s_or_b32 s6, s6, 0x7c00 +; SI-GISEL-NEXT: s_or_b32 s4, s4, s7 +; SI-GISEL-NEXT: s_max_i32 s7, s8, 0 +; SI-GISEL-NEXT: s_min_i32 s7, s7, 13 +; SI-GISEL-NEXT: s_lshr_b32 s8, s9, s7 +; SI-GISEL-NEXT: s_lshl_b32 s7, s8, s7 +; SI-GISEL-NEXT: s_cmp_lg_u32 s7, s9 +; SI-GISEL-NEXT: s_cselect_b32 s7, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s7, s8, s7 +; SI-GISEL-NEXT: s_cmp_lt_i32 s3, 1 +; SI-GISEL-NEXT: s_cselect_b32 s4, s7, s4 +; SI-GISEL-NEXT: s_and_b32 s7, s4, 7 +; SI-GISEL-NEXT: s_lshr_b32 s4, s4, 2 +; SI-GISEL-NEXT: s_cmp_eq_u32 s7, 3 +; SI-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; SI-GISEL-NEXT: s_cmp_gt_i32 s7, 5 +; SI-GISEL-NEXT: s_cselect_b32 s7, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s7, s8, s7 +; SI-GISEL-NEXT: s_add_i32 s4, s4, s7 +; SI-GISEL-NEXT: s_cmp_gt_i32 s3, 30 +; SI-GISEL-NEXT: s_cselect_b32 s4, 0x7c00, s4 +; SI-GISEL-NEXT: s_cmpk_eq_i32 s3, 0x40f +; SI-GISEL-NEXT: s_cselect_b32 s3, s6, s4 +; SI-GISEL-NEXT: s_lshr_b32 s4, s5, 16 +; SI-GISEL-NEXT: s_and_b32 s4, s4, 0x8000 +; SI-GISEL-NEXT: s_or_b32 s4, s4, s3 +; SI-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; SI-GISEL-NEXT: v_mov_b32_e32 v0, s4 +; SI-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 +; SI-GISEL-NEXT: s_endpgm +; +; VI-SDAG-LABEL: fptrunc_f64_to_f16: +; VI-SDAG: ; %bb.0: ; %entry +; VI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 +; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; VI-SDAG-NEXT: s_mov_b32 s2, -1 +; VI-SDAG-NEXT: s_mov_b32 s10, s2 +; VI-SDAG-NEXT: s_mov_b32 s11, s3 +; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; VI-SDAG-NEXT: s_mov_b32 s8, s6 +; VI-SDAG-NEXT: s_mov_b32 s9, s7 +; VI-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 +; VI-SDAG-NEXT: s_mov_b32 s0, s4 +; VI-SDAG-NEXT: s_mov_b32 s1, s5 +; VI-SDAG-NEXT: s_movk_i32 s6, 0x7e00 +; VI-SDAG-NEXT: s_waitcnt vmcnt(0) +; VI-SDAG-NEXT: v_readfirstlane_b32 s4, v1 +; VI-SDAG-NEXT: s_and_b32 s5, s4, 0x1ff +; VI-SDAG-NEXT: v_or_b32_e32 v0, s5, v0 +; VI-SDAG-NEXT: s_lshr_b32 s7, s4, 8 +; VI-SDAG-NEXT: s_bfe_u32 s8, s4, 0xb0014 +; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; VI-SDAG-NEXT: s_and_b32 s5, s7, 0xffe +; VI-SDAG-NEXT: s_sub_i32 s7, 0x3f1, s8 +; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; VI-SDAG-NEXT: v_med3_i32 v1, s7, 0, 13 +; VI-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; VI-SDAG-NEXT: s_or_b32 s5, s5, s7 +; VI-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; VI-SDAG-NEXT: s_or_b32 s7, s5, 0x1000 +; VI-SDAG-NEXT: s_lshr_b32 s10, s7, s9 +; VI-SDAG-NEXT: s_lshl_b32 s9, s10, s9 +; VI-SDAG-NEXT: s_cmp_lg_u32 s9, s7 +; VI-SDAG-NEXT: s_cselect_b32 s7, 1, 0 +; VI-SDAG-NEXT: s_addk_i32 s8, 0xfc10 +; VI-SDAG-NEXT: s_lshl_b32 s9, s8, 12 +; VI-SDAG-NEXT: s_or_b32 s7, s10, s7 +; VI-SDAG-NEXT: s_or_b32 s9, s5, s9 +; VI-SDAG-NEXT: s_cmp_lt_i32 s8, 1 +; VI-SDAG-NEXT: s_cselect_b32 s7, s7, s9 +; VI-SDAG-NEXT: s_and_b32 s9, s7, 7 +; VI-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; VI-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; VI-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; VI-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; VI-SDAG-NEXT: s_lshr_b32 s7, s7, 2 +; VI-SDAG-NEXT: s_or_b32 s9, s9, s10 +; VI-SDAG-NEXT: s_add_i32 s7, s7, s9 +; VI-SDAG-NEXT: s_cmp_lt_i32 s8, 31 +; VI-SDAG-NEXT: s_cselect_b32 s7, s7, 0x7c00 +; VI-SDAG-NEXT: s_cmp_lg_u32 s5, 0 +; VI-SDAG-NEXT: s_cselect_b32 s5, s6, 0x7c00 +; VI-SDAG-NEXT: s_cmpk_eq_i32 s8, 0x40f +; VI-SDAG-NEXT: s_cselect_b32 s5, s5, s7 +; VI-SDAG-NEXT: s_lshr_b32 s4, s4, 16 +; VI-SDAG-NEXT: s_and_b32 s4, s4, 0x8000 +; VI-SDAG-NEXT: s_or_b32 s4, s4, s5 +; VI-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; VI-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0 +; VI-SDAG-NEXT: s_endpgm +; +; VI-GISEL-LABEL: fptrunc_f64_to_f16: +; VI-GISEL: ; %bb.0: ; %entry +; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; VI-GISEL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 +; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; VI-GISEL-NEXT: s_bfe_u32 s4, s3, 0xb0014 +; VI-GISEL-NEXT: s_lshr_b32 s5, s3, 8 +; VI-GISEL-NEXT: s_and_b32 s6, s3, 0x1ff +; VI-GISEL-NEXT: s_addk_i32 s4, 0xfc10 +; VI-GISEL-NEXT: s_and_b32 s5, s5, 0xffe +; VI-GISEL-NEXT: s_or_b32 s2, s6, s2 +; VI-GISEL-NEXT: s_cmp_lg_u32 s2, 0 +; VI-GISEL-NEXT: s_cselect_b32 s2, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s2, s5, s2 +; VI-GISEL-NEXT: s_cmp_lg_u32 s2, 0 +; VI-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; VI-GISEL-NEXT: s_sub_i32 s7, 1, s4 +; VI-GISEL-NEXT: s_lshl_b32 s6, s4, 12 +; VI-GISEL-NEXT: s_max_i32 s7, s7, 0 +; VI-GISEL-NEXT: s_or_b32 s6, s2, s6 +; VI-GISEL-NEXT: s_min_i32 s7, s7, 13 +; VI-GISEL-NEXT: s_bitset1_b32 s2, 12 +; VI-GISEL-NEXT: s_lshl_b32 s5, s5, 9 +; VI-GISEL-NEXT: s_lshr_b32 s8, s2, s7 +; VI-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00 +; VI-GISEL-NEXT: s_lshl_b32 s7, s8, s7 +; VI-GISEL-NEXT: s_cmp_lg_u32 s7, s2 +; VI-GISEL-NEXT: s_cselect_b32 s2, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s2, s8, s2 +; VI-GISEL-NEXT: s_cmp_lt_i32 s4, 1 +; VI-GISEL-NEXT: s_cselect_b32 s2, s2, s6 +; VI-GISEL-NEXT: s_and_b32 s6, s2, 7 +; VI-GISEL-NEXT: s_lshr_b32 s2, s2, 2 +; VI-GISEL-NEXT: s_cmp_eq_u32 s6, 3 +; VI-GISEL-NEXT: s_cselect_b32 s7, 1, 0 +; VI-GISEL-NEXT: s_cmp_gt_i32 s6, 5 +; VI-GISEL-NEXT: s_cselect_b32 s6, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s6, s7, s6 +; VI-GISEL-NEXT: s_add_i32 s2, s2, s6 +; VI-GISEL-NEXT: s_cmp_gt_i32 s4, 30 +; VI-GISEL-NEXT: s_cselect_b32 s2, 0x7c00, s2 +; VI-GISEL-NEXT: s_cmpk_eq_i32 s4, 0x40f +; VI-GISEL-NEXT: s_cselect_b32 s2, s5, s2 +; VI-GISEL-NEXT: s_lshr_b32 s3, s3, 16 +; VI-GISEL-NEXT: s_and_b32 s3, s3, 0x8000 +; VI-GISEL-NEXT: s_or_b32 s2, s3, s2 +; VI-GISEL-NEXT: v_mov_b32_e32 v0, s2 +; VI-GISEL-NEXT: s_mov_b32 s2, -1 +; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; VI-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 +; VI-GISEL-NEXT: s_endpgm +; +; GFX9-SDAG-LABEL: fptrunc_f64_to_f16: +; GFX9-SDAG: ; %bb.0: ; %entry +; GFX9-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 +; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; GFX9-SDAG-NEXT: s_mov_b32 s2, -1 +; GFX9-SDAG-NEXT: s_mov_b32 s6, s2 +; GFX9-SDAG-NEXT: s_mov_b32 s7, s3 +; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-SDAG-NEXT: s_mov_b32 s4, s10 +; GFX9-SDAG-NEXT: s_mov_b32 s5, s11 +; GFX9-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0 +; GFX9-SDAG-NEXT: s_mov_b32 s0, s8 +; GFX9-SDAG-NEXT: s_mov_b32 s1, s9 +; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x7e00 +; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s5, v1 +; GFX9-SDAG-NEXT: s_and_b32 s6, s5, 0x1ff +; GFX9-SDAG-NEXT: v_or_b32_e32 v0, s6, v0 +; GFX9-SDAG-NEXT: s_lshr_b32 s7, s5, 8 +; GFX9-SDAG-NEXT: s_bfe_u32 s8, s5, 0xb0014 +; GFX9-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; GFX9-SDAG-NEXT: s_and_b32 s6, s7, 0xffe +; GFX9-SDAG-NEXT: s_sub_i32 s7, 0x3f1, s8 +; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GFX9-SDAG-NEXT: v_med3_i32 v1, s7, 0, 13 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; GFX9-SDAG-NEXT: s_or_b32 s6, s6, s7 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; GFX9-SDAG-NEXT: s_or_b32 s7, s6, 0x1000 +; GFX9-SDAG-NEXT: s_lshr_b32 s10, s7, s9 +; GFX9-SDAG-NEXT: s_lshl_b32 s9, s10, s9 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s9, s7 +; GFX9-SDAG-NEXT: s_cselect_b32 s7, 1, 0 +; GFX9-SDAG-NEXT: s_addk_i32 s8, 0xfc10 +; GFX9-SDAG-NEXT: s_lshl_b32 s9, s8, 12 +; GFX9-SDAG-NEXT: s_or_b32 s7, s10, s7 +; GFX9-SDAG-NEXT: s_or_b32 s9, s6, s9 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s8, 1 +; GFX9-SDAG-NEXT: s_cselect_b32 s7, s7, s9 +; GFX9-SDAG-NEXT: s_and_b32 s9, s7, 7 +; GFX9-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; GFX9-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; GFX9-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; GFX9-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; GFX9-SDAG-NEXT: s_lshr_b32 s7, s7, 2 +; GFX9-SDAG-NEXT: s_or_b32 s9, s9, s10 +; GFX9-SDAG-NEXT: s_add_i32 s7, s7, s9 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s8, 31 +; GFX9-SDAG-NEXT: s_cselect_b32 s7, s7, 0x7c00 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s6, 0 +; GFX9-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00 +; GFX9-SDAG-NEXT: s_cmpk_eq_i32 s8, 0x40f +; GFX9-SDAG-NEXT: s_cselect_b32 s4, s4, s7 +; GFX9-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; GFX9-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; GFX9-SDAG-NEXT: s_or_b32 s4, s5, s4 +; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0 +; GFX9-SDAG-NEXT: s_endpgm +; +; GFX9-GISEL-LABEL: fptrunc_f64_to_f16: +; GFX9-GISEL: ; %bb.0: ; %entry +; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-GISEL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 +; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-GISEL-NEXT: s_bfe_u32 s4, s3, 0xb0014 +; GFX9-GISEL-NEXT: s_lshr_b32 s5, s3, 8 +; GFX9-GISEL-NEXT: s_and_b32 s6, s3, 0x1ff +; GFX9-GISEL-NEXT: s_addk_i32 s4, 0xfc10 +; GFX9-GISEL-NEXT: s_and_b32 s5, s5, 0xffe +; GFX9-GISEL-NEXT: s_or_b32 s2, s6, s2 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s2, 0 +; GFX9-GISEL-NEXT: s_cselect_b32 s2, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s2, s5, s2 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s2, 0 +; GFX9-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; GFX9-GISEL-NEXT: s_sub_i32 s7, 1, s4 +; GFX9-GISEL-NEXT: s_lshl_b32 s6, s4, 12 +; GFX9-GISEL-NEXT: s_max_i32 s7, s7, 0 +; GFX9-GISEL-NEXT: s_or_b32 s6, s2, s6 +; GFX9-GISEL-NEXT: s_min_i32 s7, s7, 13 +; GFX9-GISEL-NEXT: s_bitset1_b32 s2, 12 +; GFX9-GISEL-NEXT: s_lshl_b32 s5, s5, 9 +; GFX9-GISEL-NEXT: s_lshr_b32 s8, s2, s7 +; GFX9-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00 +; GFX9-GISEL-NEXT: s_lshl_b32 s7, s8, s7 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s7, s2 +; GFX9-GISEL-NEXT: s_cselect_b32 s2, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s2, s8, s2 +; GFX9-GISEL-NEXT: s_cmp_lt_i32 s4, 1 +; GFX9-GISEL-NEXT: s_cselect_b32 s2, s2, s6 +; GFX9-GISEL-NEXT: s_and_b32 s6, s2, 7 +; GFX9-GISEL-NEXT: s_lshr_b32 s2, s2, 2 +; GFX9-GISEL-NEXT: s_cmp_eq_u32 s6, 3 +; GFX9-GISEL-NEXT: s_cselect_b32 s7, 1, 0 +; GFX9-GISEL-NEXT: s_cmp_gt_i32 s6, 5 +; GFX9-GISEL-NEXT: s_cselect_b32 s6, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s6, s7, s6 +; GFX9-GISEL-NEXT: s_add_i32 s2, s2, s6 +; GFX9-GISEL-NEXT: s_cmp_gt_i32 s4, 30 +; GFX9-GISEL-NEXT: s_cselect_b32 s2, 0x7c00, s2 +; GFX9-GISEL-NEXT: s_cmpk_eq_i32 s4, 0x40f +; GFX9-GISEL-NEXT: s_cselect_b32 s2, s5, s2 +; GFX9-GISEL-NEXT: s_lshr_b32 s3, s3, 16 +; GFX9-GISEL-NEXT: s_and_b32 s3, s3, 0x8000 +; GFX9-GISEL-NEXT: s_or_b32 s2, s3, s2 +; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, s2 +; GFX9-GISEL-NEXT: s_mov_b32 s2, -1 +; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; GFX9-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 +; GFX9-GISEL-NEXT: s_endpgm +; +; GFX950-SDAG-LABEL: fptrunc_f64_to_f16: +; GFX950-SDAG: ; %bb.0: ; %entry +; GFX950-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 +; GFX950-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; GFX950-SDAG-NEXT: s_mov_b32 s2, -1 +; GFX950-SDAG-NEXT: s_mov_b32 s6, s2 +; GFX950-SDAG-NEXT: s_mov_b32 s7, s3 +; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-SDAG-NEXT: s_mov_b32 s4, s10 +; GFX950-SDAG-NEXT: s_mov_b32 s5, s11 +; GFX950-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0 +; GFX950-SDAG-NEXT: s_mov_b32 s0, s8 +; GFX950-SDAG-NEXT: s_mov_b32 s1, s9 +; GFX950-SDAG-NEXT: s_movk_i32 s4, 0x7e00 +; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s5, v1 +; GFX950-SDAG-NEXT: s_and_b32 s6, s5, 0x1ff +; GFX950-SDAG-NEXT: v_or_b32_e32 v0, s6, v0 +; GFX950-SDAG-NEXT: s_lshr_b32 s7, s5, 8 +; GFX950-SDAG-NEXT: s_bfe_u32 s8, s5, 0xb0014 +; GFX950-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; GFX950-SDAG-NEXT: s_and_b32 s6, s7, 0xffe +; GFX950-SDAG-NEXT: s_sub_i32 s7, 0x3f1, s8 +; GFX950-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GFX950-SDAG-NEXT: v_med3_i32 v1, s7, 0, 13 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; GFX950-SDAG-NEXT: s_or_b32 s6, s6, s7 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; GFX950-SDAG-NEXT: s_or_b32 s7, s6, 0x1000 +; GFX950-SDAG-NEXT: s_lshr_b32 s10, s7, s9 +; GFX950-SDAG-NEXT: s_lshl_b32 s9, s10, s9 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s9, s7 +; GFX950-SDAG-NEXT: s_cselect_b32 s7, 1, 0 +; GFX950-SDAG-NEXT: s_addk_i32 s8, 0xfc10 +; GFX950-SDAG-NEXT: s_lshl_b32 s9, s8, 12 +; GFX950-SDAG-NEXT: s_or_b32 s7, s10, s7 +; GFX950-SDAG-NEXT: s_or_b32 s9, s6, s9 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s8, 1 +; GFX950-SDAG-NEXT: s_cselect_b32 s7, s7, s9 +; GFX950-SDAG-NEXT: s_and_b32 s9, s7, 7 +; GFX950-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; GFX950-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; GFX950-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; GFX950-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; GFX950-SDAG-NEXT: s_lshr_b32 s7, s7, 2 +; GFX950-SDAG-NEXT: s_or_b32 s9, s9, s10 +; GFX950-SDAG-NEXT: s_add_i32 s7, s7, s9 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s8, 31 +; GFX950-SDAG-NEXT: s_cselect_b32 s7, s7, 0x7c00 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s6, 0 +; GFX950-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00 +; GFX950-SDAG-NEXT: s_cmpk_eq_i32 s8, 0x40f +; GFX950-SDAG-NEXT: s_cselect_b32 s4, s4, s7 +; GFX950-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; GFX950-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; GFX950-SDAG-NEXT: s_or_b32 s4, s5, s4 +; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; GFX950-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0 +; GFX950-SDAG-NEXT: s_endpgm +; ; GFX950-GISEL-LABEL: fptrunc_f64_to_f16: ; GFX950-GISEL: ; %bb.0: ; %entry ; GFX950-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX950-GISEL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 ; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GFX950-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3] -; GFX950-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX950-GISEL-NEXT: s_bfe_u32 s4, s3, 0xb0014 +; GFX950-GISEL-NEXT: s_lshr_b32 s5, s3, 8 +; GFX950-GISEL-NEXT: s_and_b32 s6, s3, 0x1ff +; GFX950-GISEL-NEXT: s_addk_i32 s4, 0xfc10 +; GFX950-GISEL-NEXT: s_and_b32 s5, s5, 0xffe +; GFX950-GISEL-NEXT: s_or_b32 s2, s6, s2 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s2, 0 +; GFX950-GISEL-NEXT: s_cselect_b32 s2, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s2, s5, s2 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s2, 0 +; GFX950-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; GFX950-GISEL-NEXT: s_sub_i32 s7, 1, s4 +; GFX950-GISEL-NEXT: s_lshl_b32 s6, s4, 12 +; GFX950-GISEL-NEXT: s_max_i32 s7, s7, 0 +; GFX950-GISEL-NEXT: s_or_b32 s6, s2, s6 +; GFX950-GISEL-NEXT: s_min_i32 s7, s7, 13 +; GFX950-GISEL-NEXT: s_bitset1_b32 s2, 12 +; GFX950-GISEL-NEXT: s_lshl_b32 s5, s5, 9 +; GFX950-GISEL-NEXT: s_lshr_b32 s8, s2, s7 +; GFX950-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00 +; GFX950-GISEL-NEXT: s_lshl_b32 s7, s8, s7 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s7, s2 +; GFX950-GISEL-NEXT: s_cselect_b32 s2, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s2, s8, s2 +; GFX950-GISEL-NEXT: s_cmp_lt_i32 s4, 1 +; GFX950-GISEL-NEXT: s_cselect_b32 s2, s2, s6 +; GFX950-GISEL-NEXT: s_and_b32 s6, s2, 7 +; GFX950-GISEL-NEXT: s_lshr_b32 s2, s2, 2 +; GFX950-GISEL-NEXT: s_cmp_eq_u32 s6, 3 +; GFX950-GISEL-NEXT: s_cselect_b32 s7, 1, 0 +; GFX950-GISEL-NEXT: s_cmp_gt_i32 s6, 5 +; GFX950-GISEL-NEXT: s_cselect_b32 s6, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s6, s7, s6 +; GFX950-GISEL-NEXT: s_add_i32 s2, s2, s6 +; GFX950-GISEL-NEXT: s_cmp_gt_i32 s4, 30 +; GFX950-GISEL-NEXT: s_cselect_b32 s2, 0x7c00, s2 +; GFX950-GISEL-NEXT: s_cmpk_eq_i32 s4, 0x40f +; GFX950-GISEL-NEXT: s_cselect_b32 s2, s5, s2 +; GFX950-GISEL-NEXT: s_lshr_b32 s3, s3, 16 +; GFX950-GISEL-NEXT: s_and_b32 s3, s3, 0x8000 +; GFX950-GISEL-NEXT: s_or_b32 s2, s3, s2 +; GFX950-GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX950-GISEL-NEXT: s_mov_b32 s2, -1 ; GFX950-GISEL-NEXT: s_mov_b32 s3, 0xf000 ; GFX950-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 @@ -340,13 +852,60 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ; GFX11-SDAG-TRUE16-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s8, s2 ; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s9, s3 -; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, s0 ; GFX11-SDAG-TRUE16-NEXT: buffer_load_b64 v[0:1], off, s[8:11], 0 -; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s5, s1 ; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-SDAG-TRUE16-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] -; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0 +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s2, v1 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s3, s2, 0x1ff +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s5, s2, 8 +; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v0, s3, v0 +; GFX11-SDAG-TRUE16-NEXT: s_bfe_u32 s3, s2, 0xb0014 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-SDAG-TRUE16-NEXT: s_sub_i32 s4, 0x3f1, s3 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 +; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, s4, 0, 13 +; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s8, v1 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s4, v0 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s4, s5, s4 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s5, s4, 0x1000 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s9, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s8, s9, s8 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s8, s5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_addk_i32 s3, 0xfc10 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s5, s9, s5 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s8, s3, 12 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s8, s4, s8 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s3, 1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s8, s5, 7 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s5, s5, 2 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s8, s8, s9 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_add_i32 s5, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s3, 31 +; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s8, 0x7e00 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, s5, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s4, s8, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s4, s5 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s2, s2, 16 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s2, s2, 0x8000 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s2, s2, s3 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, s2 ; GFX11-SDAG-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 ; GFX11-SDAG-TRUE16-NEXT: s_endpgm ; @@ -360,13 +919,60 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ; GFX11-SDAG-FAKE16-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s8, s2 ; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s9, s3 -; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s4, s0 ; GFX11-SDAG-FAKE16-NEXT: buffer_load_b64 v[0:1], off, s[8:11], 0 -; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s5, s1 ; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-SDAG-FAKE16-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] -; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s2, v1 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s3, s2, 0x1ff +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s5, s2, 8 +; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v0, s3, v0 +; GFX11-SDAG-FAKE16-NEXT: s_bfe_u32 s3, s2, 0xb0014 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-SDAG-FAKE16-NEXT: s_sub_i32 s4, 0x3f1, s3 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 +; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v1, s4, 0, 13 +; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s8, v1 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s4, v0 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s4, s5, s4 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s5, s4, 0x1000 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s9, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s8, s9, s8 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s8, s5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_addk_i32 s3, 0xfc10 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s5, s9, s5 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s8, s3, 12 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s8, s4, s8 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s3, 1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s8, s5, 7 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s5, s5, 2 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s8, s8, s9 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_add_i32 s5, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s3, 31 +; GFX11-SDAG-FAKE16-NEXT: s_movk_i32 s8, 0x7e00 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, s5, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s4, s8, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s4, s5 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s2, s2, 16 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s2, s2, 0x8000 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s2, s2, s3 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s2 ; GFX11-SDAG-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 ; GFX11-SDAG-FAKE16-NEXT: s_endpgm ; @@ -376,6 +982,555 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-GISEL-TRUE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0 ; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s6, s3, 0x1ff +; GFX11-GISEL-TRUE16-NEXT: s_bfe_u32 s4, s3, 0xb0014 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s5, s3, 8 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s2, s6, s2 +; GFX11-GISEL-TRUE16-NEXT: s_addk_i32 s4, 0xfc10 +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s2, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s2, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s2, s5, s2 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s2, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_sub_i32 s6, 1, s4 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s8, s2, 0x1000 +; GFX11-GISEL-TRUE16-NEXT: s_max_i32 s6, s6, 0 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s7, s4, 12 +; GFX11-GISEL-TRUE16-NEXT: s_min_i32 s6, s6, 13 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s5, s5, 9 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s9, s8, s6 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s2, s2, s7 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s6, s9, s6 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s5, s5, 0x7c00 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s6, s8 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s6, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s6, s9, s6 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lt_i32 s4, 1 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s2, s6, s2 +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s6, s2, 7 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s2, s2, 2 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_eq_u32 s6, 3 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s7, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_gt_i32 s6, 5 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s6, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s6, s7, s6 +; GFX11-GISEL-TRUE16-NEXT: s_add_i32 s2, s2, s6 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_gt_i32 s4, 30 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s2, 0x7c00, s2 +; GFX11-GISEL-TRUE16-NEXT: s_cmpk_eq_i32 s4, 0x40f +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s2, s5, s2 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s3, s3, 16 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s3, s3, 0x8000 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s2, s3, s2 +; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s3, 0x31016000 +; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v0, s2 +; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s2, -1 +; GFX11-GISEL-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0 +; GFX11-GISEL-TRUE16-NEXT: s_endpgm +; +; GFX11-GISEL-FAKE16-LABEL: fptrunc_f64_to_f16: +; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry +; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-FAKE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0 +; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s6, s3, 0x1ff +; GFX11-GISEL-FAKE16-NEXT: s_bfe_u32 s4, s3, 0xb0014 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s5, s3, 8 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s2, s6, s2 +; GFX11-GISEL-FAKE16-NEXT: s_addk_i32 s4, 0xfc10 +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s2, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s2, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s2, s5, s2 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s2, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_sub_i32 s6, 1, s4 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s8, s2, 0x1000 +; GFX11-GISEL-FAKE16-NEXT: s_max_i32 s6, s6, 0 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s7, s4, 12 +; GFX11-GISEL-FAKE16-NEXT: s_min_i32 s6, s6, 13 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s5, s5, 9 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s9, s8, s6 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s2, s2, s7 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s6, s9, s6 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s5, s5, 0x7c00 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s6, s8 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s6, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s6, s9, s6 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lt_i32 s4, 1 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s2, s6, s2 +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s6, s2, 7 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s2, s2, 2 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_eq_u32 s6, 3 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s7, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_gt_i32 s6, 5 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s6, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s6, s7, s6 +; GFX11-GISEL-FAKE16-NEXT: s_add_i32 s2, s2, s6 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_gt_i32 s4, 30 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s2, 0x7c00, s2 +; GFX11-GISEL-FAKE16-NEXT: s_cmpk_eq_i32 s4, 0x40f +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s2, s5, s2 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s3, s3, 16 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s3, s3, 0x8000 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s2, s3, s2 +; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s3, 0x31016000 +; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v0, s2 +; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s2, -1 +; GFX11-GISEL-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0 +; GFX11-GISEL-FAKE16-NEXT: s_endpgm + ptr addrspace(1) %r, + ptr addrspace(1) %a) { +entry: + %a.val = load double, ptr addrspace(1) %a + %r.val = fptrunc double %a.val to half + store half %r.val, ptr addrspace(1) %r + ret void +} + +define amdgpu_kernel void @fptrunc_f64_to_f16_afn( +; SI-SDAG-LABEL: fptrunc_f64_to_f16_afn: +; SI-SDAG: ; %bb.0: ; %entry +; SI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 +; SI-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; SI-SDAG-NEXT: s_mov_b32 s2, -1 +; SI-SDAG-NEXT: s_mov_b32 s10, s2 +; SI-SDAG-NEXT: s_mov_b32 s11, s3 +; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; SI-SDAG-NEXT: s_mov_b32 s8, s6 +; SI-SDAG-NEXT: s_mov_b32 s9, s7 +; SI-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 +; SI-SDAG-NEXT: s_movk_i32 s0, 0x7e00 +; SI-SDAG-NEXT: s_waitcnt vmcnt(0) +; SI-SDAG-NEXT: v_readfirstlane_b32 s1, v1 +; SI-SDAG-NEXT: s_and_b32 s6, s1, 0x1ff +; SI-SDAG-NEXT: s_lshr_b32 s7, s1, 8 +; SI-SDAG-NEXT: s_bfe_u32 s8, s1, 0xb0014 +; SI-SDAG-NEXT: v_or_b32_e32 v0, s6, v0 +; SI-SDAG-NEXT: s_and_b32 s6, s7, 0xffe +; SI-SDAG-NEXT: s_sub_i32 s7, 0x3f1, s8 +; SI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; SI-SDAG-NEXT: v_med3_i32 v1, s7, 0, 13 +; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; SI-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; SI-SDAG-NEXT: s_or_b32 s6, s6, s7 +; SI-SDAG-NEXT: s_or_b32 s7, s6, 0x1000 +; SI-SDAG-NEXT: s_lshr_b32 s10, s7, s9 +; SI-SDAG-NEXT: s_lshl_b32 s9, s10, s9 +; SI-SDAG-NEXT: s_cmp_lg_u32 s9, s7 +; SI-SDAG-NEXT: s_cselect_b32 s7, 1, 0 +; SI-SDAG-NEXT: s_addk_i32 s8, 0xfc10 +; SI-SDAG-NEXT: s_or_b32 s7, s10, s7 +; SI-SDAG-NEXT: s_lshl_b32 s9, s8, 12 +; SI-SDAG-NEXT: s_or_b32 s9, s6, s9 +; SI-SDAG-NEXT: s_cmp_lt_i32 s8, 1 +; SI-SDAG-NEXT: s_cselect_b32 s7, s7, s9 +; SI-SDAG-NEXT: s_and_b32 s9, s7, 7 +; SI-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; SI-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; SI-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; SI-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; SI-SDAG-NEXT: s_lshr_b32 s7, s7, 2 +; SI-SDAG-NEXT: s_or_b32 s9, s9, s10 +; SI-SDAG-NEXT: s_add_i32 s7, s7, s9 +; SI-SDAG-NEXT: s_cmp_lt_i32 s8, 31 +; SI-SDAG-NEXT: s_cselect_b32 s7, s7, 0x7c00 +; SI-SDAG-NEXT: s_cmp_lg_u32 s6, 0 +; SI-SDAG-NEXT: s_cselect_b32 s0, s0, 0x7c00 +; SI-SDAG-NEXT: s_cmpk_eq_i32 s8, 0x40f +; SI-SDAG-NEXT: s_cselect_b32 s0, s0, s7 +; SI-SDAG-NEXT: s_lshr_b32 s1, s1, 16 +; SI-SDAG-NEXT: s_and_b32 s1, s1, 0x8000 +; SI-SDAG-NEXT: s_or_b32 s6, s1, s0 +; SI-SDAG-NEXT: s_mov_b32 s0, s4 +; SI-SDAG-NEXT: s_mov_b32 s1, s5 +; SI-SDAG-NEXT: v_mov_b32_e32 v0, s6 +; SI-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0 +; SI-SDAG-NEXT: s_endpgm +; +; SI-GISEL-LABEL: fptrunc_f64_to_f16_afn: +; SI-GISEL: ; %bb.0: ; %entry +; SI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 +; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; SI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0 +; SI-GISEL-NEXT: s_mov_b32 s2, -1 +; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; SI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[4:5] +; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; SI-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 +; SI-GISEL-NEXT: s_endpgm +; +; VI-SDAG-LABEL: fptrunc_f64_to_f16_afn: +; VI-SDAG: ; %bb.0: ; %entry +; VI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 +; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; VI-SDAG-NEXT: s_mov_b32 s2, -1 +; VI-SDAG-NEXT: s_mov_b32 s10, s2 +; VI-SDAG-NEXT: s_mov_b32 s11, s3 +; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; VI-SDAG-NEXT: s_mov_b32 s8, s6 +; VI-SDAG-NEXT: s_mov_b32 s9, s7 +; VI-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 +; VI-SDAG-NEXT: s_mov_b32 s0, s4 +; VI-SDAG-NEXT: s_mov_b32 s1, s5 +; VI-SDAG-NEXT: s_movk_i32 s6, 0x7e00 +; VI-SDAG-NEXT: s_waitcnt vmcnt(0) +; VI-SDAG-NEXT: v_readfirstlane_b32 s4, v1 +; VI-SDAG-NEXT: s_and_b32 s5, s4, 0x1ff +; VI-SDAG-NEXT: v_or_b32_e32 v0, s5, v0 +; VI-SDAG-NEXT: s_lshr_b32 s7, s4, 8 +; VI-SDAG-NEXT: s_bfe_u32 s8, s4, 0xb0014 +; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; VI-SDAG-NEXT: s_and_b32 s5, s7, 0xffe +; VI-SDAG-NEXT: s_sub_i32 s7, 0x3f1, s8 +; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; VI-SDAG-NEXT: v_med3_i32 v1, s7, 0, 13 +; VI-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; VI-SDAG-NEXT: s_or_b32 s5, s5, s7 +; VI-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; VI-SDAG-NEXT: s_or_b32 s7, s5, 0x1000 +; VI-SDAG-NEXT: s_lshr_b32 s10, s7, s9 +; VI-SDAG-NEXT: s_lshl_b32 s9, s10, s9 +; VI-SDAG-NEXT: s_cmp_lg_u32 s9, s7 +; VI-SDAG-NEXT: s_cselect_b32 s7, 1, 0 +; VI-SDAG-NEXT: s_addk_i32 s8, 0xfc10 +; VI-SDAG-NEXT: s_lshl_b32 s9, s8, 12 +; VI-SDAG-NEXT: s_or_b32 s7, s10, s7 +; VI-SDAG-NEXT: s_or_b32 s9, s5, s9 +; VI-SDAG-NEXT: s_cmp_lt_i32 s8, 1 +; VI-SDAG-NEXT: s_cselect_b32 s7, s7, s9 +; VI-SDAG-NEXT: s_and_b32 s9, s7, 7 +; VI-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; VI-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; VI-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; VI-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; VI-SDAG-NEXT: s_lshr_b32 s7, s7, 2 +; VI-SDAG-NEXT: s_or_b32 s9, s9, s10 +; VI-SDAG-NEXT: s_add_i32 s7, s7, s9 +; VI-SDAG-NEXT: s_cmp_lt_i32 s8, 31 +; VI-SDAG-NEXT: s_cselect_b32 s7, s7, 0x7c00 +; VI-SDAG-NEXT: s_cmp_lg_u32 s5, 0 +; VI-SDAG-NEXT: s_cselect_b32 s5, s6, 0x7c00 +; VI-SDAG-NEXT: s_cmpk_eq_i32 s8, 0x40f +; VI-SDAG-NEXT: s_cselect_b32 s5, s5, s7 +; VI-SDAG-NEXT: s_lshr_b32 s4, s4, 16 +; VI-SDAG-NEXT: s_and_b32 s4, s4, 0x8000 +; VI-SDAG-NEXT: s_or_b32 s4, s4, s5 +; VI-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; VI-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0 +; VI-SDAG-NEXT: s_endpgm +; +; VI-GISEL-LABEL: fptrunc_f64_to_f16_afn: +; VI-GISEL: ; %bb.0: ; %entry +; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; VI-GISEL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 +; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3] +; VI-GISEL-NEXT: s_mov_b32 s2, -1 +; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; VI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 +; VI-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 +; VI-GISEL-NEXT: s_endpgm +; +; GFX9-SDAG-LABEL: fptrunc_f64_to_f16_afn: +; GFX9-SDAG: ; %bb.0: ; %entry +; GFX9-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 +; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; GFX9-SDAG-NEXT: s_mov_b32 s2, -1 +; GFX9-SDAG-NEXT: s_mov_b32 s6, s2 +; GFX9-SDAG-NEXT: s_mov_b32 s7, s3 +; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-SDAG-NEXT: s_mov_b32 s4, s10 +; GFX9-SDAG-NEXT: s_mov_b32 s5, s11 +; GFX9-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0 +; GFX9-SDAG-NEXT: s_mov_b32 s0, s8 +; GFX9-SDAG-NEXT: s_mov_b32 s1, s9 +; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x7e00 +; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s5, v1 +; GFX9-SDAG-NEXT: s_and_b32 s6, s5, 0x1ff +; GFX9-SDAG-NEXT: v_or_b32_e32 v0, s6, v0 +; GFX9-SDAG-NEXT: s_lshr_b32 s7, s5, 8 +; GFX9-SDAG-NEXT: s_bfe_u32 s8, s5, 0xb0014 +; GFX9-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; GFX9-SDAG-NEXT: s_and_b32 s6, s7, 0xffe +; GFX9-SDAG-NEXT: s_sub_i32 s7, 0x3f1, s8 +; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GFX9-SDAG-NEXT: v_med3_i32 v1, s7, 0, 13 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; GFX9-SDAG-NEXT: s_or_b32 s6, s6, s7 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; GFX9-SDAG-NEXT: s_or_b32 s7, s6, 0x1000 +; GFX9-SDAG-NEXT: s_lshr_b32 s10, s7, s9 +; GFX9-SDAG-NEXT: s_lshl_b32 s9, s10, s9 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s9, s7 +; GFX9-SDAG-NEXT: s_cselect_b32 s7, 1, 0 +; GFX9-SDAG-NEXT: s_addk_i32 s8, 0xfc10 +; GFX9-SDAG-NEXT: s_lshl_b32 s9, s8, 12 +; GFX9-SDAG-NEXT: s_or_b32 s7, s10, s7 +; GFX9-SDAG-NEXT: s_or_b32 s9, s6, s9 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s8, 1 +; GFX9-SDAG-NEXT: s_cselect_b32 s7, s7, s9 +; GFX9-SDAG-NEXT: s_and_b32 s9, s7, 7 +; GFX9-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; GFX9-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; GFX9-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; GFX9-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; GFX9-SDAG-NEXT: s_lshr_b32 s7, s7, 2 +; GFX9-SDAG-NEXT: s_or_b32 s9, s9, s10 +; GFX9-SDAG-NEXT: s_add_i32 s7, s7, s9 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s8, 31 +; GFX9-SDAG-NEXT: s_cselect_b32 s7, s7, 0x7c00 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s6, 0 +; GFX9-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00 +; GFX9-SDAG-NEXT: s_cmpk_eq_i32 s8, 0x40f +; GFX9-SDAG-NEXT: s_cselect_b32 s4, s4, s7 +; GFX9-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; GFX9-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; GFX9-SDAG-NEXT: s_or_b32 s4, s5, s4 +; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0 +; GFX9-SDAG-NEXT: s_endpgm +; +; GFX9-GISEL-LABEL: fptrunc_f64_to_f16_afn: +; GFX9-GISEL: ; %bb.0: ; %entry +; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-GISEL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 +; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3] +; GFX9-GISEL-NEXT: s_mov_b32 s2, -1 +; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; GFX9-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX9-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 +; GFX9-GISEL-NEXT: s_endpgm +; +; GFX950-SDAG-LABEL: fptrunc_f64_to_f16_afn: +; GFX950-SDAG: ; %bb.0: ; %entry +; GFX950-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 +; GFX950-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; GFX950-SDAG-NEXT: s_mov_b32 s2, -1 +; GFX950-SDAG-NEXT: s_mov_b32 s6, s2 +; GFX950-SDAG-NEXT: s_mov_b32 s7, s3 +; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-SDAG-NEXT: s_mov_b32 s4, s10 +; GFX950-SDAG-NEXT: s_mov_b32 s5, s11 +; GFX950-SDAG-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0 +; GFX950-SDAG-NEXT: s_mov_b32 s0, s8 +; GFX950-SDAG-NEXT: s_mov_b32 s1, s9 +; GFX950-SDAG-NEXT: s_movk_i32 s4, 0x7e00 +; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s5, v1 +; GFX950-SDAG-NEXT: s_and_b32 s6, s5, 0x1ff +; GFX950-SDAG-NEXT: v_or_b32_e32 v0, s6, v0 +; GFX950-SDAG-NEXT: s_lshr_b32 s7, s5, 8 +; GFX950-SDAG-NEXT: s_bfe_u32 s8, s5, 0xb0014 +; GFX950-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; GFX950-SDAG-NEXT: s_and_b32 s6, s7, 0xffe +; GFX950-SDAG-NEXT: s_sub_i32 s7, 0x3f1, s8 +; GFX950-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GFX950-SDAG-NEXT: v_med3_i32 v1, s7, 0, 13 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; GFX950-SDAG-NEXT: s_or_b32 s6, s6, s7 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; GFX950-SDAG-NEXT: s_or_b32 s7, s6, 0x1000 +; GFX950-SDAG-NEXT: s_lshr_b32 s10, s7, s9 +; GFX950-SDAG-NEXT: s_lshl_b32 s9, s10, s9 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s9, s7 +; GFX950-SDAG-NEXT: s_cselect_b32 s7, 1, 0 +; GFX950-SDAG-NEXT: s_addk_i32 s8, 0xfc10 +; GFX950-SDAG-NEXT: s_lshl_b32 s9, s8, 12 +; GFX950-SDAG-NEXT: s_or_b32 s7, s10, s7 +; GFX950-SDAG-NEXT: s_or_b32 s9, s6, s9 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s8, 1 +; GFX950-SDAG-NEXT: s_cselect_b32 s7, s7, s9 +; GFX950-SDAG-NEXT: s_and_b32 s9, s7, 7 +; GFX950-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; GFX950-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; GFX950-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; GFX950-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; GFX950-SDAG-NEXT: s_lshr_b32 s7, s7, 2 +; GFX950-SDAG-NEXT: s_or_b32 s9, s9, s10 +; GFX950-SDAG-NEXT: s_add_i32 s7, s7, s9 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s8, 31 +; GFX950-SDAG-NEXT: s_cselect_b32 s7, s7, 0x7c00 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s6, 0 +; GFX950-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00 +; GFX950-SDAG-NEXT: s_cmpk_eq_i32 s8, 0x40f +; GFX950-SDAG-NEXT: s_cselect_b32 s4, s4, s7 +; GFX950-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; GFX950-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; GFX950-SDAG-NEXT: s_or_b32 s4, s5, s4 +; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; GFX950-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0 +; GFX950-SDAG-NEXT: s_endpgm +; +; GFX950-GISEL-LABEL: fptrunc_f64_to_f16_afn: +; GFX950-GISEL: ; %bb.0: ; %entry +; GFX950-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-GISEL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 +; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3] +; GFX950-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX950-GISEL-NEXT: s_mov_b32 s2, -1 +; GFX950-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; GFX950-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0 +; GFX950-GISEL-NEXT: s_endpgm +; +; GFX11-SDAG-TRUE16-LABEL: fptrunc_f64_to_f16_afn: +; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry +; GFX11-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s6, -1 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s10, s6 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s11, s7 +; GFX11-SDAG-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s8, s2 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s9, s3 +; GFX11-SDAG-TRUE16-NEXT: buffer_load_b64 v[0:1], off, s[8:11], 0 +; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s2, v1 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s3, s2, 0x1ff +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s5, s2, 8 +; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v0, s3, v0 +; GFX11-SDAG-TRUE16-NEXT: s_bfe_u32 s3, s2, 0xb0014 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-SDAG-TRUE16-NEXT: s_sub_i32 s4, 0x3f1, s3 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 +; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, s4, 0, 13 +; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s8, v1 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s4, v0 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s4, s5, s4 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s5, s4, 0x1000 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s9, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s8, s9, s8 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s8, s5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_addk_i32 s3, 0xfc10 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s5, s9, s5 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s8, s3, 12 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s8, s4, s8 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s3, 1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s8, s5, 7 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s5, s5, 2 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s8, s8, s9 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_add_i32 s5, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s3, 31 +; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s8, 0x7e00 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, s5, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s4, s8, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s4, s5 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s2, s2, 16 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s2, s2, 0x8000 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s2, s2, s3 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, s2 +; GFX11-SDAG-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 +; GFX11-SDAG-TRUE16-NEXT: s_endpgm +; +; GFX11-SDAG-FAKE16-LABEL: fptrunc_f64_to_f16_afn: +; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry +; GFX11-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s6, -1 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s10, s6 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s11, s7 +; GFX11-SDAG-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s8, s2 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s9, s3 +; GFX11-SDAG-FAKE16-NEXT: buffer_load_b64 v[0:1], off, s[8:11], 0 +; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s2, v1 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s3, s2, 0x1ff +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s5, s2, 8 +; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v0, s3, v0 +; GFX11-SDAG-FAKE16-NEXT: s_bfe_u32 s3, s2, 0xb0014 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-SDAG-FAKE16-NEXT: s_sub_i32 s4, 0x3f1, s3 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 +; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v1, s4, 0, 13 +; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s8, v1 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s4, v0 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s4, s5, s4 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s5, s4, 0x1000 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s9, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s8, s9, s8 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s8, s5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_addk_i32 s3, 0xfc10 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s5, s9, s5 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s8, s3, 12 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s8, s4, s8 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s3, 1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s8, s5, 7 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s5, s5, 2 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s8, s8, s9 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_add_i32 s5, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s3, 31 +; GFX11-SDAG-FAKE16-NEXT: s_movk_i32 s8, 0x7e00 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, s5, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s4, s8, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s4, s5 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s2, s2, 16 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s2, s2, 0x8000 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s2, s2, s3 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s2 +; GFX11-SDAG-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 +; GFX11-SDAG-FAKE16-NEXT: s_endpgm +; +; GFX11-GISEL-TRUE16-LABEL: fptrunc_f64_to_f16_afn: +; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry +; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-TRUE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0 +; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-GISEL-TRUE16-NEXT: v_cvt_f32_f64_e32 v0, s[2:3] ; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s2, -1 ; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s3, 0x31016000 @@ -384,7 +1539,7 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ; GFX11-GISEL-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0 ; GFX11-GISEL-TRUE16-NEXT: s_endpgm ; -; GFX11-GISEL-FAKE16-LABEL: fptrunc_f64_to_f16: +; GFX11-GISEL-FAKE16-LABEL: fptrunc_f64_to_f16_afn: ; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry ; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0) @@ -401,7 +1556,7 @@ define amdgpu_kernel void @fptrunc_f64_to_f16( ptr addrspace(1) %a) { entry: %a.val = load double, ptr addrspace(1) %a - %r.val = fptrunc double %a.val to half + %r.val = fptrunc afn double %a.val to half store half %r.val, ptr addrspace(1) %r ret void } @@ -626,25 +1781,106 @@ entry: define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; SI-SDAG-LABEL: fptrunc_v2f64_to_v2f16: ; SI-SDAG: ; %bb.0: ; %entry -; SI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 -; SI-SDAG-NEXT: s_mov_b32 s7, 0xf000 -; SI-SDAG-NEXT: s_mov_b32 s6, -1 -; SI-SDAG-NEXT: s_mov_b32 s10, s6 -; SI-SDAG-NEXT: s_mov_b32 s11, s7 +; SI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 +; SI-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; SI-SDAG-NEXT: s_mov_b32 s2, -1 +; SI-SDAG-NEXT: s_mov_b32 s10, s2 +; SI-SDAG-NEXT: s_mov_b32 s11, s3 ; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; SI-SDAG-NEXT: s_mov_b32 s8, s2 -; SI-SDAG-NEXT: s_mov_b32 s9, s3 +; SI-SDAG-NEXT: s_mov_b32 s8, s6 +; SI-SDAG-NEXT: s_mov_b32 s9, s7 ; SI-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; SI-SDAG-NEXT: s_mov_b32 s4, s0 -; SI-SDAG-NEXT: s_mov_b32 s5, s1 +; SI-SDAG-NEXT: s_movk_i32 s0, 0x7e00 ; SI-SDAG-NEXT: s_waitcnt vmcnt(0) -; SI-SDAG-NEXT: v_cvt_f32_f64_e32 v2, v[2:3] -; SI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] -; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v2 -; SI-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-SDAG-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0 +; SI-SDAG-NEXT: v_readfirstlane_b32 s1, v3 +; SI-SDAG-NEXT: v_readfirstlane_b32 s6, v1 +; SI-SDAG-NEXT: s_and_b32 s7, s1, 0x1ff +; SI-SDAG-NEXT: s_lshr_b32 s8, s1, 8 +; SI-SDAG-NEXT: s_bfe_u32 s9, s1, 0xb0014 +; SI-SDAG-NEXT: v_or_b32_e32 v1, s7, v2 +; SI-SDAG-NEXT: s_and_b32 s7, s8, 0xffe +; SI-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s9 +; SI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; SI-SDAG-NEXT: v_med3_i32 v2, s8, 0, 13 +; SI-SDAG-NEXT: v_readfirstlane_b32 s8, v1 +; SI-SDAG-NEXT: v_readfirstlane_b32 s10, v2 +; SI-SDAG-NEXT: s_or_b32 s7, s7, s8 +; SI-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; SI-SDAG-NEXT: s_lshr_b32 s11, s8, s10 +; SI-SDAG-NEXT: s_lshl_b32 s10, s11, s10 +; SI-SDAG-NEXT: s_cmp_lg_u32 s10, s8 +; SI-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; SI-SDAG-NEXT: s_addk_i32 s9, 0xfc10 +; SI-SDAG-NEXT: s_or_b32 s8, s11, s8 +; SI-SDAG-NEXT: s_lshl_b32 s10, s9, 12 +; SI-SDAG-NEXT: s_or_b32 s10, s7, s10 +; SI-SDAG-NEXT: s_cmp_lt_i32 s9, 1 +; SI-SDAG-NEXT: s_cselect_b32 s8, s8, s10 +; SI-SDAG-NEXT: s_and_b32 s10, s8, 7 +; SI-SDAG-NEXT: s_cmp_gt_i32 s10, 5 +; SI-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; SI-SDAG-NEXT: s_cmp_eq_u32 s10, 3 +; SI-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; SI-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; SI-SDAG-NEXT: s_or_b32 s10, s10, s11 +; SI-SDAG-NEXT: s_add_i32 s8, s8, s10 +; SI-SDAG-NEXT: s_cmp_lt_i32 s9, 31 +; SI-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; SI-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; SI-SDAG-NEXT: s_cselect_b32 s7, s0, 0x7c00 +; SI-SDAG-NEXT: s_cmpk_eq_i32 s9, 0x40f +; SI-SDAG-NEXT: s_cselect_b32 s7, s7, s8 +; SI-SDAG-NEXT: s_lshr_b32 s1, s1, 16 +; SI-SDAG-NEXT: s_and_b32 s8, s6, 0x1ff +; SI-SDAG-NEXT: s_lshr_b32 s9, s6, 8 +; SI-SDAG-NEXT: s_bfe_u32 s10, s6, 0xb0014 +; SI-SDAG-NEXT: s_and_b32 s1, s1, 0x8000 +; SI-SDAG-NEXT: v_or_b32_e32 v0, s8, v0 +; SI-SDAG-NEXT: s_and_b32 s8, s9, 0xffe +; SI-SDAG-NEXT: s_sub_i32 s9, 0x3f1, s10 +; SI-SDAG-NEXT: s_or_b32 s1, s1, s7 +; SI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; SI-SDAG-NEXT: v_med3_i32 v1, s9, 0, 13 +; SI-SDAG-NEXT: s_lshl_b32 s1, s1, 16 +; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; SI-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; SI-SDAG-NEXT: s_or_b32 s7, s8, s7 +; SI-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; SI-SDAG-NEXT: s_lshr_b32 s11, s8, s9 +; SI-SDAG-NEXT: s_lshl_b32 s9, s11, s9 +; SI-SDAG-NEXT: s_cmp_lg_u32 s9, s8 +; SI-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; SI-SDAG-NEXT: s_addk_i32 s10, 0xfc10 +; SI-SDAG-NEXT: s_or_b32 s8, s11, s8 +; SI-SDAG-NEXT: s_lshl_b32 s9, s10, 12 +; SI-SDAG-NEXT: s_or_b32 s9, s7, s9 +; SI-SDAG-NEXT: s_cmp_lt_i32 s10, 1 +; SI-SDAG-NEXT: s_cselect_b32 s8, s8, s9 +; SI-SDAG-NEXT: s_and_b32 s9, s8, 7 +; SI-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; SI-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; SI-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; SI-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; SI-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; SI-SDAG-NEXT: s_or_b32 s9, s9, s11 +; SI-SDAG-NEXT: s_add_i32 s8, s8, s9 +; SI-SDAG-NEXT: s_cmp_lt_i32 s10, 31 +; SI-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; SI-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; SI-SDAG-NEXT: s_cselect_b32 s0, s0, 0x7c00 +; SI-SDAG-NEXT: s_cmpk_eq_i32 s10, 0x40f +; SI-SDAG-NEXT: s_cselect_b32 s0, s0, s8 +; SI-SDAG-NEXT: s_lshr_b32 s6, s6, 16 +; SI-SDAG-NEXT: s_and_b32 s6, s6, 0x8000 +; SI-SDAG-NEXT: s_or_b32 s0, s6, s0 +; SI-SDAG-NEXT: s_and_b32 s0, s0, 0xffff +; SI-SDAG-NEXT: s_or_b32 s6, s0, s1 +; SI-SDAG-NEXT: s_mov_b32 s0, s4 +; SI-SDAG-NEXT: s_mov_b32 s1, s5 +; SI-SDAG-NEXT: v_mov_b32_e32 v0, s6 +; SI-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; SI-SDAG-NEXT: s_endpgm ; ; SI-GISEL-LABEL: fptrunc_v2f64_to_v2f16: @@ -654,6 +1890,1251 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; SI-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 ; SI-GISEL-NEXT: s_mov_b32 s2, -1 ; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; SI-GISEL-NEXT: s_bfe_u32 s3, s5, 0xb0014 +; SI-GISEL-NEXT: s_lshr_b32 s8, s5, 8 +; SI-GISEL-NEXT: s_and_b32 s9, s5, 0x1ff +; SI-GISEL-NEXT: s_addk_i32 s3, 0xfc10 +; SI-GISEL-NEXT: s_and_b32 s8, s8, 0xffe +; SI-GISEL-NEXT: s_or_b32 s4, s9, s4 +; SI-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; SI-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s4, s8, s4 +; SI-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; SI-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; SI-GISEL-NEXT: s_lshl_b32 s8, s8, 9 +; SI-GISEL-NEXT: s_lshl_b32 s9, s3, 12 +; SI-GISEL-NEXT: s_sub_i32 s10, 1, s3 +; SI-GISEL-NEXT: s_or_b32 s11, s4, 0x1000 +; SI-GISEL-NEXT: s_or_b32 s8, s8, 0x7c00 +; SI-GISEL-NEXT: s_or_b32 s4, s4, s9 +; SI-GISEL-NEXT: s_max_i32 s9, s10, 0 +; SI-GISEL-NEXT: s_min_i32 s9, s9, 13 +; SI-GISEL-NEXT: s_lshr_b32 s10, s11, s9 +; SI-GISEL-NEXT: s_lshl_b32 s9, s10, s9 +; SI-GISEL-NEXT: s_cmp_lg_u32 s9, s11 +; SI-GISEL-NEXT: s_cselect_b32 s9, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s9, s10, s9 +; SI-GISEL-NEXT: s_cmp_lt_i32 s3, 1 +; SI-GISEL-NEXT: s_cselect_b32 s4, s9, s4 +; SI-GISEL-NEXT: s_and_b32 s9, s4, 7 +; SI-GISEL-NEXT: s_lshr_b32 s4, s4, 2 +; SI-GISEL-NEXT: s_cmp_eq_u32 s9, 3 +; SI-GISEL-NEXT: s_cselect_b32 s10, 1, 0 +; SI-GISEL-NEXT: s_cmp_gt_i32 s9, 5 +; SI-GISEL-NEXT: s_cselect_b32 s9, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s9, s10, s9 +; SI-GISEL-NEXT: s_add_i32 s4, s4, s9 +; SI-GISEL-NEXT: s_cmp_gt_i32 s3, 30 +; SI-GISEL-NEXT: s_cselect_b32 s4, 0x7c00, s4 +; SI-GISEL-NEXT: s_cmpk_eq_i32 s3, 0x40f +; SI-GISEL-NEXT: s_cselect_b32 s3, s8, s4 +; SI-GISEL-NEXT: s_lshr_b32 s4, s5, 16 +; SI-GISEL-NEXT: s_bfe_u32 s5, s7, 0xb0014 +; SI-GISEL-NEXT: s_lshr_b32 s8, s7, 8 +; SI-GISEL-NEXT: s_and_b32 s9, s7, 0x1ff +; SI-GISEL-NEXT: s_and_b32 s4, s4, 0x8000 +; SI-GISEL-NEXT: s_addk_i32 s5, 0xfc10 +; SI-GISEL-NEXT: s_and_b32 s8, s8, 0xffe +; SI-GISEL-NEXT: s_or_b32 s6, s9, s6 +; SI-GISEL-NEXT: s_or_b32 s3, s4, s3 +; SI-GISEL-NEXT: s_cmp_lg_u32 s6, 0 +; SI-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s4, s8, s4 +; SI-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; SI-GISEL-NEXT: s_cselect_b32 s6, 1, 0 +; SI-GISEL-NEXT: s_lshl_b32 s6, s6, 9 +; SI-GISEL-NEXT: s_lshl_b32 s8, s5, 12 +; SI-GISEL-NEXT: s_sub_i32 s9, 1, s5 +; SI-GISEL-NEXT: s_or_b32 s10, s4, 0x1000 +; SI-GISEL-NEXT: s_or_b32 s6, s6, 0x7c00 +; SI-GISEL-NEXT: s_or_b32 s4, s4, s8 +; SI-GISEL-NEXT: s_max_i32 s8, s9, 0 +; SI-GISEL-NEXT: s_min_i32 s8, s8, 13 +; SI-GISEL-NEXT: s_lshr_b32 s9, s10, s8 +; SI-GISEL-NEXT: s_lshl_b32 s8, s9, s8 +; SI-GISEL-NEXT: s_cmp_lg_u32 s8, s10 +; SI-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s8, s9, s8 +; SI-GISEL-NEXT: s_cmp_lt_i32 s5, 1 +; SI-GISEL-NEXT: s_cselect_b32 s4, s8, s4 +; SI-GISEL-NEXT: s_and_b32 s8, s4, 7 +; SI-GISEL-NEXT: s_lshr_b32 s4, s4, 2 +; SI-GISEL-NEXT: s_cmp_eq_u32 s8, 3 +; SI-GISEL-NEXT: s_cselect_b32 s9, 1, 0 +; SI-GISEL-NEXT: s_cmp_gt_i32 s8, 5 +; SI-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; SI-GISEL-NEXT: s_or_b32 s8, s9, s8 +; SI-GISEL-NEXT: s_add_i32 s4, s4, s8 +; SI-GISEL-NEXT: s_cmp_gt_i32 s5, 30 +; SI-GISEL-NEXT: s_cselect_b32 s4, 0x7c00, s4 +; SI-GISEL-NEXT: s_cmpk_eq_i32 s5, 0x40f +; SI-GISEL-NEXT: s_cselect_b32 s4, s6, s4 +; SI-GISEL-NEXT: s_lshr_b32 s5, s7, 16 +; SI-GISEL-NEXT: s_and_b32 s3, s3, 0xffff +; SI-GISEL-NEXT: s_and_b32 s5, s5, 0x8000 +; SI-GISEL-NEXT: s_or_b32 s4, s5, s4 +; SI-GISEL-NEXT: s_and_b32 s4, s4, 0xffff +; SI-GISEL-NEXT: s_lshl_b32 s4, s4, 16 +; SI-GISEL-NEXT: s_or_b32 s4, s3, s4 +; SI-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; SI-GISEL-NEXT: v_mov_b32_e32 v0, s4 +; SI-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0 +; SI-GISEL-NEXT: s_endpgm +; +; VI-SDAG-LABEL: fptrunc_v2f64_to_v2f16: +; VI-SDAG: ; %bb.0: ; %entry +; VI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 +; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; VI-SDAG-NEXT: s_mov_b32 s2, -1 +; VI-SDAG-NEXT: s_mov_b32 s10, s2 +; VI-SDAG-NEXT: s_mov_b32 s11, s3 +; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; VI-SDAG-NEXT: s_mov_b32 s8, s6 +; VI-SDAG-NEXT: s_mov_b32 s9, s7 +; VI-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; VI-SDAG-NEXT: s_mov_b32 s0, s4 +; VI-SDAG-NEXT: s_mov_b32 s1, s5 +; VI-SDAG-NEXT: s_movk_i32 s6, 0x7e00 +; VI-SDAG-NEXT: s_waitcnt vmcnt(0) +; VI-SDAG-NEXT: v_readfirstlane_b32 s4, v3 +; VI-SDAG-NEXT: s_and_b32 s7, s4, 0x1ff +; VI-SDAG-NEXT: v_readfirstlane_b32 s5, v1 +; VI-SDAG-NEXT: v_or_b32_e32 v1, s7, v2 +; VI-SDAG-NEXT: s_lshr_b32 s8, s4, 8 +; VI-SDAG-NEXT: s_bfe_u32 s9, s4, 0xb0014 +; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; VI-SDAG-NEXT: s_and_b32 s7, s8, 0xffe +; VI-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s9 +; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; VI-SDAG-NEXT: v_med3_i32 v2, s8, 0, 13 +; VI-SDAG-NEXT: v_readfirstlane_b32 s8, v1 +; VI-SDAG-NEXT: s_or_b32 s7, s7, s8 +; VI-SDAG-NEXT: v_readfirstlane_b32 s10, v2 +; VI-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; VI-SDAG-NEXT: s_lshr_b32 s11, s8, s10 +; VI-SDAG-NEXT: s_lshl_b32 s10, s11, s10 +; VI-SDAG-NEXT: s_cmp_lg_u32 s10, s8 +; VI-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; VI-SDAG-NEXT: s_addk_i32 s9, 0xfc10 +; VI-SDAG-NEXT: s_lshl_b32 s10, s9, 12 +; VI-SDAG-NEXT: s_or_b32 s8, s11, s8 +; VI-SDAG-NEXT: s_or_b32 s10, s7, s10 +; VI-SDAG-NEXT: s_cmp_lt_i32 s9, 1 +; VI-SDAG-NEXT: s_cselect_b32 s8, s8, s10 +; VI-SDAG-NEXT: s_and_b32 s10, s8, 7 +; VI-SDAG-NEXT: s_cmp_gt_i32 s10, 5 +; VI-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; VI-SDAG-NEXT: s_cmp_eq_u32 s10, 3 +; VI-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; VI-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; VI-SDAG-NEXT: s_or_b32 s10, s10, s11 +; VI-SDAG-NEXT: s_add_i32 s8, s8, s10 +; VI-SDAG-NEXT: s_cmp_lt_i32 s9, 31 +; VI-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; VI-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; VI-SDAG-NEXT: s_cselect_b32 s7, s6, 0x7c00 +; VI-SDAG-NEXT: s_cmpk_eq_i32 s9, 0x40f +; VI-SDAG-NEXT: s_cselect_b32 s7, s7, s8 +; VI-SDAG-NEXT: s_and_b32 s8, s5, 0x1ff +; VI-SDAG-NEXT: v_or_b32_e32 v0, s8, v0 +; VI-SDAG-NEXT: s_lshr_b32 s4, s4, 16 +; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; VI-SDAG-NEXT: s_lshr_b32 s9, s5, 8 +; VI-SDAG-NEXT: s_bfe_u32 s10, s5, 0xb0014 +; VI-SDAG-NEXT: s_and_b32 s4, s4, 0x8000 +; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; VI-SDAG-NEXT: s_and_b32 s8, s9, 0xffe +; VI-SDAG-NEXT: s_sub_i32 s9, 0x3f1, s10 +; VI-SDAG-NEXT: s_or_b32 s4, s4, s7 +; VI-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; VI-SDAG-NEXT: v_med3_i32 v1, s9, 0, 13 +; VI-SDAG-NEXT: s_or_b32 s7, s8, s7 +; VI-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; VI-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; VI-SDAG-NEXT: s_lshr_b32 s11, s8, s9 +; VI-SDAG-NEXT: s_lshl_b32 s4, s4, 16 +; VI-SDAG-NEXT: s_lshl_b32 s9, s11, s9 +; VI-SDAG-NEXT: s_cmp_lg_u32 s9, s8 +; VI-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; VI-SDAG-NEXT: s_addk_i32 s10, 0xfc10 +; VI-SDAG-NEXT: s_lshl_b32 s9, s10, 12 +; VI-SDAG-NEXT: s_or_b32 s8, s11, s8 +; VI-SDAG-NEXT: s_or_b32 s9, s7, s9 +; VI-SDAG-NEXT: s_cmp_lt_i32 s10, 1 +; VI-SDAG-NEXT: s_cselect_b32 s8, s8, s9 +; VI-SDAG-NEXT: s_and_b32 s9, s8, 7 +; VI-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; VI-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; VI-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; VI-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; VI-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; VI-SDAG-NEXT: s_or_b32 s9, s9, s11 +; VI-SDAG-NEXT: s_add_i32 s8, s8, s9 +; VI-SDAG-NEXT: s_cmp_lt_i32 s10, 31 +; VI-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; VI-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; VI-SDAG-NEXT: s_cselect_b32 s6, s6, 0x7c00 +; VI-SDAG-NEXT: s_cmpk_eq_i32 s10, 0x40f +; VI-SDAG-NEXT: s_cselect_b32 s6, s6, s8 +; VI-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; VI-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; VI-SDAG-NEXT: s_or_b32 s5, s5, s6 +; VI-SDAG-NEXT: s_and_b32 s5, s5, 0xffff +; VI-SDAG-NEXT: s_or_b32 s4, s5, s4 +; VI-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; VI-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0 +; VI-SDAG-NEXT: s_endpgm +; +; VI-GISEL-LABEL: fptrunc_v2f64_to_v2f16: +; VI-GISEL: ; %bb.0: ; %entry +; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; VI-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 +; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; VI-GISEL-NEXT: s_bfe_u32 s2, s5, 0xb0014 +; VI-GISEL-NEXT: s_lshr_b32 s3, s5, 8 +; VI-GISEL-NEXT: s_and_b32 s8, s5, 0x1ff +; VI-GISEL-NEXT: s_addk_i32 s2, 0xfc10 +; VI-GISEL-NEXT: s_and_b32 s3, s3, 0xffe +; VI-GISEL-NEXT: s_or_b32 s4, s8, s4 +; VI-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; VI-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s3, s3, s4 +; VI-GISEL-NEXT: s_cmp_lg_u32 s3, 0 +; VI-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; VI-GISEL-NEXT: s_sub_i32 s9, 1, s2 +; VI-GISEL-NEXT: s_lshl_b32 s8, s2, 12 +; VI-GISEL-NEXT: s_max_i32 s9, s9, 0 +; VI-GISEL-NEXT: s_or_b32 s8, s3, s8 +; VI-GISEL-NEXT: s_min_i32 s9, s9, 13 +; VI-GISEL-NEXT: s_bitset1_b32 s3, 12 +; VI-GISEL-NEXT: s_lshl_b32 s4, s4, 9 +; VI-GISEL-NEXT: s_lshr_b32 s10, s3, s9 +; VI-GISEL-NEXT: s_or_b32 s4, s4, 0x7c00 +; VI-GISEL-NEXT: s_lshl_b32 s9, s10, s9 +; VI-GISEL-NEXT: s_cmp_lg_u32 s9, s3 +; VI-GISEL-NEXT: s_cselect_b32 s3, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s3, s10, s3 +; VI-GISEL-NEXT: s_cmp_lt_i32 s2, 1 +; VI-GISEL-NEXT: s_cselect_b32 s3, s3, s8 +; VI-GISEL-NEXT: s_and_b32 s8, s3, 7 +; VI-GISEL-NEXT: s_lshr_b32 s3, s3, 2 +; VI-GISEL-NEXT: s_cmp_eq_u32 s8, 3 +; VI-GISEL-NEXT: s_cselect_b32 s9, 1, 0 +; VI-GISEL-NEXT: s_cmp_gt_i32 s8, 5 +; VI-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s8, s9, s8 +; VI-GISEL-NEXT: s_add_i32 s3, s3, s8 +; VI-GISEL-NEXT: s_cmp_gt_i32 s2, 30 +; VI-GISEL-NEXT: s_cselect_b32 s3, 0x7c00, s3 +; VI-GISEL-NEXT: s_cmpk_eq_i32 s2, 0x40f +; VI-GISEL-NEXT: s_cselect_b32 s2, s4, s3 +; VI-GISEL-NEXT: s_lshr_b32 s3, s5, 16 +; VI-GISEL-NEXT: s_and_b32 s3, s3, 0x8000 +; VI-GISEL-NEXT: s_or_b32 s2, s3, s2 +; VI-GISEL-NEXT: s_bfe_u32 s3, s7, 0xb0014 +; VI-GISEL-NEXT: s_lshr_b32 s4, s7, 8 +; VI-GISEL-NEXT: s_and_b32 s5, s7, 0x1ff +; VI-GISEL-NEXT: s_addk_i32 s3, 0xfc10 +; VI-GISEL-NEXT: s_and_b32 s4, s4, 0xffe +; VI-GISEL-NEXT: s_or_b32 s5, s5, s6 +; VI-GISEL-NEXT: s_cmp_lg_u32 s5, 0 +; VI-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s4, s4, s5 +; VI-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; VI-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; VI-GISEL-NEXT: s_sub_i32 s8, 1, s3 +; VI-GISEL-NEXT: s_lshl_b32 s6, s3, 12 +; VI-GISEL-NEXT: s_max_i32 s8, s8, 0 +; VI-GISEL-NEXT: s_or_b32 s6, s4, s6 +; VI-GISEL-NEXT: s_min_i32 s8, s8, 13 +; VI-GISEL-NEXT: s_bitset1_b32 s4, 12 +; VI-GISEL-NEXT: s_lshl_b32 s5, s5, 9 +; VI-GISEL-NEXT: s_lshr_b32 s9, s4, s8 +; VI-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00 +; VI-GISEL-NEXT: s_lshl_b32 s8, s9, s8 +; VI-GISEL-NEXT: s_cmp_lg_u32 s8, s4 +; VI-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s4, s9, s4 +; VI-GISEL-NEXT: s_cmp_lt_i32 s3, 1 +; VI-GISEL-NEXT: s_cselect_b32 s4, s4, s6 +; VI-GISEL-NEXT: s_and_b32 s6, s4, 7 +; VI-GISEL-NEXT: s_lshr_b32 s4, s4, 2 +; VI-GISEL-NEXT: s_cmp_eq_u32 s6, 3 +; VI-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; VI-GISEL-NEXT: s_cmp_gt_i32 s6, 5 +; VI-GISEL-NEXT: s_cselect_b32 s6, 1, 0 +; VI-GISEL-NEXT: s_or_b32 s6, s8, s6 +; VI-GISEL-NEXT: s_add_i32 s4, s4, s6 +; VI-GISEL-NEXT: s_cmp_gt_i32 s3, 30 +; VI-GISEL-NEXT: s_cselect_b32 s4, 0x7c00, s4 +; VI-GISEL-NEXT: s_cmpk_eq_i32 s3, 0x40f +; VI-GISEL-NEXT: s_cselect_b32 s3, s5, s4 +; VI-GISEL-NEXT: s_lshr_b32 s4, s7, 16 +; VI-GISEL-NEXT: s_and_b32 s4, s4, 0x8000 +; VI-GISEL-NEXT: s_or_b32 s3, s4, s3 +; VI-GISEL-NEXT: s_and_b32 s3, s3, 0xffff +; VI-GISEL-NEXT: s_and_b32 s2, s2, 0xffff +; VI-GISEL-NEXT: s_lshl_b32 s3, s3, 16 +; VI-GISEL-NEXT: s_or_b32 s2, s2, s3 +; VI-GISEL-NEXT: v_mov_b32_e32 v0, s2 +; VI-GISEL-NEXT: s_mov_b32 s2, -1 +; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; VI-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0 +; VI-GISEL-NEXT: s_endpgm +; +; GFX9-SDAG-LABEL: fptrunc_v2f64_to_v2f16: +; GFX9-SDAG: ; %bb.0: ; %entry +; GFX9-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 +; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; GFX9-SDAG-NEXT: s_mov_b32 s2, -1 +; GFX9-SDAG-NEXT: s_mov_b32 s6, s2 +; GFX9-SDAG-NEXT: s_mov_b32 s7, s3 +; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-SDAG-NEXT: s_mov_b32 s4, s10 +; GFX9-SDAG-NEXT: s_mov_b32 s5, s11 +; GFX9-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 +; GFX9-SDAG-NEXT: s_mov_b32 s0, s8 +; GFX9-SDAG-NEXT: s_mov_b32 s1, s9 +; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x7e00 +; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s5, v3 +; GFX9-SDAG-NEXT: s_and_b32 s7, s5, 0x1ff +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s6, v1 +; GFX9-SDAG-NEXT: v_or_b32_e32 v1, s7, v2 +; GFX9-SDAG-NEXT: s_lshr_b32 s8, s5, 8 +; GFX9-SDAG-NEXT: s_bfe_u32 s9, s5, 0xb0014 +; GFX9-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; GFX9-SDAG-NEXT: s_and_b32 s7, s8, 0xffe +; GFX9-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s9 +; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GFX9-SDAG-NEXT: v_med3_i32 v2, s8, 0, 13 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s8, v1 +; GFX9-SDAG-NEXT: s_or_b32 s7, s7, s8 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s10, v2 +; GFX9-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; GFX9-SDAG-NEXT: s_lshr_b32 s11, s8, s10 +; GFX9-SDAG-NEXT: s_lshl_b32 s10, s11, s10 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s10, s8 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; GFX9-SDAG-NEXT: s_addk_i32 s9, 0xfc10 +; GFX9-SDAG-NEXT: s_lshl_b32 s10, s9, 12 +; GFX9-SDAG-NEXT: s_or_b32 s8, s11, s8 +; GFX9-SDAG-NEXT: s_or_b32 s10, s7, s10 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s9, 1 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, s8, s10 +; GFX9-SDAG-NEXT: s_and_b32 s10, s8, 7 +; GFX9-SDAG-NEXT: s_cmp_gt_i32 s10, 5 +; GFX9-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; GFX9-SDAG-NEXT: s_cmp_eq_u32 s10, 3 +; GFX9-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; GFX9-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; GFX9-SDAG-NEXT: s_or_b32 s10, s10, s11 +; GFX9-SDAG-NEXT: s_add_i32 s8, s8, s10 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s9, 31 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; GFX9-SDAG-NEXT: s_cselect_b32 s7, s4, 0x7c00 +; GFX9-SDAG-NEXT: s_cmpk_eq_i32 s9, 0x40f +; GFX9-SDAG-NEXT: s_cselect_b32 s7, s7, s8 +; GFX9-SDAG-NEXT: s_and_b32 s8, s6, 0x1ff +; GFX9-SDAG-NEXT: v_or_b32_e32 v0, s8, v0 +; GFX9-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; GFX9-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; GFX9-SDAG-NEXT: s_lshr_b32 s9, s6, 8 +; GFX9-SDAG-NEXT: s_bfe_u32 s10, s6, 0xb0014 +; GFX9-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GFX9-SDAG-NEXT: s_and_b32 s8, s9, 0xffe +; GFX9-SDAG-NEXT: s_sub_i32 s9, 0x3f1, s10 +; GFX9-SDAG-NEXT: s_or_b32 s5, s5, s7 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; GFX9-SDAG-NEXT: v_med3_i32 v1, s9, 0, 13 +; GFX9-SDAG-NEXT: s_or_b32 s7, s8, s7 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; GFX9-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; GFX9-SDAG-NEXT: s_lshr_b32 s11, s8, s9 +; GFX9-SDAG-NEXT: s_lshl_b32 s9, s11, s9 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s9, s8 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; GFX9-SDAG-NEXT: s_addk_i32 s10, 0xfc10 +; GFX9-SDAG-NEXT: s_lshl_b32 s9, s10, 12 +; GFX9-SDAG-NEXT: s_or_b32 s8, s11, s8 +; GFX9-SDAG-NEXT: s_or_b32 s9, s7, s9 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s10, 1 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, s8, s9 +; GFX9-SDAG-NEXT: s_and_b32 s9, s8, 7 +; GFX9-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; GFX9-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; GFX9-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; GFX9-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; GFX9-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; GFX9-SDAG-NEXT: s_or_b32 s9, s9, s11 +; GFX9-SDAG-NEXT: s_add_i32 s8, s8, s9 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s10, 31 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; GFX9-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00 +; GFX9-SDAG-NEXT: s_cmpk_eq_i32 s10, 0x40f +; GFX9-SDAG-NEXT: s_cselect_b32 s4, s4, s8 +; GFX9-SDAG-NEXT: s_lshr_b32 s6, s6, 16 +; GFX9-SDAG-NEXT: s_and_b32 s6, s6, 0x8000 +; GFX9-SDAG-NEXT: s_or_b32 s4, s6, s4 +; GFX9-SDAG-NEXT: s_pack_ll_b32_b16 s4, s4, s5 +; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0 +; GFX9-SDAG-NEXT: s_endpgm +; +; GFX9-GISEL-LABEL: fptrunc_v2f64_to_v2f16: +; GFX9-GISEL: ; %bb.0: ; %entry +; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 +; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-GISEL-NEXT: s_bfe_u32 s2, s5, 0xb0014 +; GFX9-GISEL-NEXT: s_lshr_b32 s3, s5, 8 +; GFX9-GISEL-NEXT: s_and_b32 s8, s5, 0x1ff +; GFX9-GISEL-NEXT: s_addk_i32 s2, 0xfc10 +; GFX9-GISEL-NEXT: s_and_b32 s3, s3, 0xffe +; GFX9-GISEL-NEXT: s_or_b32 s4, s8, s4 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; GFX9-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s3, s3, s4 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s3, 0 +; GFX9-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; GFX9-GISEL-NEXT: s_sub_i32 s9, 1, s2 +; GFX9-GISEL-NEXT: s_lshl_b32 s8, s2, 12 +; GFX9-GISEL-NEXT: s_max_i32 s9, s9, 0 +; GFX9-GISEL-NEXT: s_or_b32 s8, s3, s8 +; GFX9-GISEL-NEXT: s_min_i32 s9, s9, 13 +; GFX9-GISEL-NEXT: s_bitset1_b32 s3, 12 +; GFX9-GISEL-NEXT: s_lshl_b32 s4, s4, 9 +; GFX9-GISEL-NEXT: s_lshr_b32 s10, s3, s9 +; GFX9-GISEL-NEXT: s_or_b32 s4, s4, 0x7c00 +; GFX9-GISEL-NEXT: s_lshl_b32 s9, s10, s9 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s9, s3 +; GFX9-GISEL-NEXT: s_cselect_b32 s3, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s3, s10, s3 +; GFX9-GISEL-NEXT: s_cmp_lt_i32 s2, 1 +; GFX9-GISEL-NEXT: s_cselect_b32 s3, s3, s8 +; GFX9-GISEL-NEXT: s_and_b32 s8, s3, 7 +; GFX9-GISEL-NEXT: s_lshr_b32 s3, s3, 2 +; GFX9-GISEL-NEXT: s_cmp_eq_u32 s8, 3 +; GFX9-GISEL-NEXT: s_cselect_b32 s9, 1, 0 +; GFX9-GISEL-NEXT: s_cmp_gt_i32 s8, 5 +; GFX9-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s8, s9, s8 +; GFX9-GISEL-NEXT: s_add_i32 s3, s3, s8 +; GFX9-GISEL-NEXT: s_cmp_gt_i32 s2, 30 +; GFX9-GISEL-NEXT: s_cselect_b32 s3, 0x7c00, s3 +; GFX9-GISEL-NEXT: s_cmpk_eq_i32 s2, 0x40f +; GFX9-GISEL-NEXT: s_cselect_b32 s2, s4, s3 +; GFX9-GISEL-NEXT: s_lshr_b32 s3, s5, 16 +; GFX9-GISEL-NEXT: s_and_b32 s3, s3, 0x8000 +; GFX9-GISEL-NEXT: s_or_b32 s2, s3, s2 +; GFX9-GISEL-NEXT: s_bfe_u32 s3, s7, 0xb0014 +; GFX9-GISEL-NEXT: s_lshr_b32 s4, s7, 8 +; GFX9-GISEL-NEXT: s_and_b32 s5, s7, 0x1ff +; GFX9-GISEL-NEXT: s_addk_i32 s3, 0xfc10 +; GFX9-GISEL-NEXT: s_and_b32 s4, s4, 0xffe +; GFX9-GISEL-NEXT: s_or_b32 s5, s5, s6 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s5, 0 +; GFX9-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s4, s4, s5 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; GFX9-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; GFX9-GISEL-NEXT: s_sub_i32 s8, 1, s3 +; GFX9-GISEL-NEXT: s_lshl_b32 s6, s3, 12 +; GFX9-GISEL-NEXT: s_max_i32 s8, s8, 0 +; GFX9-GISEL-NEXT: s_or_b32 s6, s4, s6 +; GFX9-GISEL-NEXT: s_min_i32 s8, s8, 13 +; GFX9-GISEL-NEXT: s_bitset1_b32 s4, 12 +; GFX9-GISEL-NEXT: s_lshl_b32 s5, s5, 9 +; GFX9-GISEL-NEXT: s_lshr_b32 s9, s4, s8 +; GFX9-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00 +; GFX9-GISEL-NEXT: s_lshl_b32 s8, s9, s8 +; GFX9-GISEL-NEXT: s_cmp_lg_u32 s8, s4 +; GFX9-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s4, s9, s4 +; GFX9-GISEL-NEXT: s_cmp_lt_i32 s3, 1 +; GFX9-GISEL-NEXT: s_cselect_b32 s4, s4, s6 +; GFX9-GISEL-NEXT: s_and_b32 s6, s4, 7 +; GFX9-GISEL-NEXT: s_lshr_b32 s4, s4, 2 +; GFX9-GISEL-NEXT: s_cmp_eq_u32 s6, 3 +; GFX9-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; GFX9-GISEL-NEXT: s_cmp_gt_i32 s6, 5 +; GFX9-GISEL-NEXT: s_cselect_b32 s6, 1, 0 +; GFX9-GISEL-NEXT: s_or_b32 s6, s8, s6 +; GFX9-GISEL-NEXT: s_add_i32 s4, s4, s6 +; GFX9-GISEL-NEXT: s_cmp_gt_i32 s3, 30 +; GFX9-GISEL-NEXT: s_cselect_b32 s4, 0x7c00, s4 +; GFX9-GISEL-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX9-GISEL-NEXT: s_cselect_b32 s3, s5, s4 +; GFX9-GISEL-NEXT: s_lshr_b32 s4, s7, 16 +; GFX9-GISEL-NEXT: s_and_b32 s4, s4, 0x8000 +; GFX9-GISEL-NEXT: s_or_b32 s3, s4, s3 +; GFX9-GISEL-NEXT: s_pack_ll_b32_b16 s2, s2, s3 +; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, s2 +; GFX9-GISEL-NEXT: s_mov_b32 s2, -1 +; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0 +; GFX9-GISEL-NEXT: s_endpgm +; +; GFX950-SDAG-LABEL: fptrunc_v2f64_to_v2f16: +; GFX950-SDAG: ; %bb.0: ; %entry +; GFX950-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 +; GFX950-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; GFX950-SDAG-NEXT: s_mov_b32 s2, -1 +; GFX950-SDAG-NEXT: s_mov_b32 s6, s2 +; GFX950-SDAG-NEXT: s_mov_b32 s7, s3 +; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-SDAG-NEXT: s_mov_b32 s4, s10 +; GFX950-SDAG-NEXT: s_mov_b32 s5, s11 +; GFX950-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 +; GFX950-SDAG-NEXT: s_mov_b32 s0, s8 +; GFX950-SDAG-NEXT: s_mov_b32 s1, s9 +; GFX950-SDAG-NEXT: s_movk_i32 s4, 0x7e00 +; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s5, v3 +; GFX950-SDAG-NEXT: s_and_b32 s7, s5, 0x1ff +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s6, v1 +; GFX950-SDAG-NEXT: v_or_b32_e32 v1, s7, v2 +; GFX950-SDAG-NEXT: s_lshr_b32 s8, s5, 8 +; GFX950-SDAG-NEXT: s_bfe_u32 s9, s5, 0xb0014 +; GFX950-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; GFX950-SDAG-NEXT: s_and_b32 s7, s8, 0xffe +; GFX950-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s9 +; GFX950-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GFX950-SDAG-NEXT: v_med3_i32 v2, s8, 0, 13 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s8, v1 +; GFX950-SDAG-NEXT: s_or_b32 s7, s7, s8 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s10, v2 +; GFX950-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; GFX950-SDAG-NEXT: s_lshr_b32 s11, s8, s10 +; GFX950-SDAG-NEXT: s_lshl_b32 s10, s11, s10 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s10, s8 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; GFX950-SDAG-NEXT: s_addk_i32 s9, 0xfc10 +; GFX950-SDAG-NEXT: s_lshl_b32 s10, s9, 12 +; GFX950-SDAG-NEXT: s_or_b32 s8, s11, s8 +; GFX950-SDAG-NEXT: s_or_b32 s10, s7, s10 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s9, 1 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, s8, s10 +; GFX950-SDAG-NEXT: s_and_b32 s10, s8, 7 +; GFX950-SDAG-NEXT: s_cmp_gt_i32 s10, 5 +; GFX950-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; GFX950-SDAG-NEXT: s_cmp_eq_u32 s10, 3 +; GFX950-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; GFX950-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; GFX950-SDAG-NEXT: s_or_b32 s10, s10, s11 +; GFX950-SDAG-NEXT: s_add_i32 s8, s8, s10 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s9, 31 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; GFX950-SDAG-NEXT: s_cselect_b32 s7, s4, 0x7c00 +; GFX950-SDAG-NEXT: s_cmpk_eq_i32 s9, 0x40f +; GFX950-SDAG-NEXT: s_cselect_b32 s7, s7, s8 +; GFX950-SDAG-NEXT: s_and_b32 s8, s6, 0x1ff +; GFX950-SDAG-NEXT: v_or_b32_e32 v0, s8, v0 +; GFX950-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; GFX950-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; GFX950-SDAG-NEXT: s_lshr_b32 s9, s6, 8 +; GFX950-SDAG-NEXT: s_bfe_u32 s10, s6, 0xb0014 +; GFX950-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; GFX950-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GFX950-SDAG-NEXT: s_and_b32 s8, s9, 0xffe +; GFX950-SDAG-NEXT: s_sub_i32 s9, 0x3f1, s10 +; GFX950-SDAG-NEXT: s_or_b32 s5, s5, s7 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; GFX950-SDAG-NEXT: v_med3_i32 v1, s9, 0, 13 +; GFX950-SDAG-NEXT: s_or_b32 s7, s8, s7 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; GFX950-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; GFX950-SDAG-NEXT: s_lshr_b32 s11, s8, s9 +; GFX950-SDAG-NEXT: s_lshl_b32 s9, s11, s9 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s9, s8 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; GFX950-SDAG-NEXT: s_addk_i32 s10, 0xfc10 +; GFX950-SDAG-NEXT: s_lshl_b32 s9, s10, 12 +; GFX950-SDAG-NEXT: s_or_b32 s8, s11, s8 +; GFX950-SDAG-NEXT: s_or_b32 s9, s7, s9 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s10, 1 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, s8, s9 +; GFX950-SDAG-NEXT: s_and_b32 s9, s8, 7 +; GFX950-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; GFX950-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; GFX950-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; GFX950-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; GFX950-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; GFX950-SDAG-NEXT: s_or_b32 s9, s9, s11 +; GFX950-SDAG-NEXT: s_add_i32 s8, s8, s9 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s10, 31 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; GFX950-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00 +; GFX950-SDAG-NEXT: s_cmpk_eq_i32 s10, 0x40f +; GFX950-SDAG-NEXT: s_cselect_b32 s4, s4, s8 +; GFX950-SDAG-NEXT: s_lshr_b32 s6, s6, 16 +; GFX950-SDAG-NEXT: s_and_b32 s6, s6, 0x8000 +; GFX950-SDAG-NEXT: s_or_b32 s4, s6, s4 +; GFX950-SDAG-NEXT: s_pack_ll_b32_b16 s4, s4, s5 +; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; GFX950-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0 +; GFX950-SDAG-NEXT: s_endpgm +; +; GFX950-GISEL-LABEL: fptrunc_v2f64_to_v2f16: +; GFX950-GISEL: ; %bb.0: ; %entry +; GFX950-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 +; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; GFX950-GISEL-NEXT: s_bfe_u32 s2, s5, 0xb0014 +; GFX950-GISEL-NEXT: s_lshr_b32 s3, s5, 8 +; GFX950-GISEL-NEXT: s_and_b32 s8, s5, 0x1ff +; GFX950-GISEL-NEXT: s_addk_i32 s2, 0xfc10 +; GFX950-GISEL-NEXT: s_and_b32 s3, s3, 0xffe +; GFX950-GISEL-NEXT: s_or_b32 s4, s8, s4 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; GFX950-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s3, s3, s4 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s3, 0 +; GFX950-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; GFX950-GISEL-NEXT: s_sub_i32 s9, 1, s2 +; GFX950-GISEL-NEXT: s_lshl_b32 s8, s2, 12 +; GFX950-GISEL-NEXT: s_max_i32 s9, s9, 0 +; GFX950-GISEL-NEXT: s_or_b32 s8, s3, s8 +; GFX950-GISEL-NEXT: s_min_i32 s9, s9, 13 +; GFX950-GISEL-NEXT: s_bitset1_b32 s3, 12 +; GFX950-GISEL-NEXT: s_lshl_b32 s4, s4, 9 +; GFX950-GISEL-NEXT: s_lshr_b32 s10, s3, s9 +; GFX950-GISEL-NEXT: s_or_b32 s4, s4, 0x7c00 +; GFX950-GISEL-NEXT: s_lshl_b32 s9, s10, s9 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s9, s3 +; GFX950-GISEL-NEXT: s_cselect_b32 s3, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s3, s10, s3 +; GFX950-GISEL-NEXT: s_cmp_lt_i32 s2, 1 +; GFX950-GISEL-NEXT: s_cselect_b32 s3, s3, s8 +; GFX950-GISEL-NEXT: s_and_b32 s8, s3, 7 +; GFX950-GISEL-NEXT: s_lshr_b32 s3, s3, 2 +; GFX950-GISEL-NEXT: s_cmp_eq_u32 s8, 3 +; GFX950-GISEL-NEXT: s_cselect_b32 s9, 1, 0 +; GFX950-GISEL-NEXT: s_cmp_gt_i32 s8, 5 +; GFX950-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s8, s9, s8 +; GFX950-GISEL-NEXT: s_add_i32 s3, s3, s8 +; GFX950-GISEL-NEXT: s_cmp_gt_i32 s2, 30 +; GFX950-GISEL-NEXT: s_cselect_b32 s3, 0x7c00, s3 +; GFX950-GISEL-NEXT: s_cmpk_eq_i32 s2, 0x40f +; GFX950-GISEL-NEXT: s_cselect_b32 s2, s4, s3 +; GFX950-GISEL-NEXT: s_lshr_b32 s3, s5, 16 +; GFX950-GISEL-NEXT: s_and_b32 s3, s3, 0x8000 +; GFX950-GISEL-NEXT: s_or_b32 s2, s3, s2 +; GFX950-GISEL-NEXT: s_bfe_u32 s3, s7, 0xb0014 +; GFX950-GISEL-NEXT: s_lshr_b32 s4, s7, 8 +; GFX950-GISEL-NEXT: s_and_b32 s5, s7, 0x1ff +; GFX950-GISEL-NEXT: s_addk_i32 s3, 0xfc10 +; GFX950-GISEL-NEXT: s_and_b32 s4, s4, 0xffe +; GFX950-GISEL-NEXT: s_or_b32 s5, s5, s6 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s5, 0 +; GFX950-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s4, s4, s5 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s4, 0 +; GFX950-GISEL-NEXT: s_cselect_b32 s5, 1, 0 +; GFX950-GISEL-NEXT: s_sub_i32 s8, 1, s3 +; GFX950-GISEL-NEXT: s_lshl_b32 s6, s3, 12 +; GFX950-GISEL-NEXT: s_max_i32 s8, s8, 0 +; GFX950-GISEL-NEXT: s_or_b32 s6, s4, s6 +; GFX950-GISEL-NEXT: s_min_i32 s8, s8, 13 +; GFX950-GISEL-NEXT: s_bitset1_b32 s4, 12 +; GFX950-GISEL-NEXT: s_lshl_b32 s5, s5, 9 +; GFX950-GISEL-NEXT: s_lshr_b32 s9, s4, s8 +; GFX950-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00 +; GFX950-GISEL-NEXT: s_lshl_b32 s8, s9, s8 +; GFX950-GISEL-NEXT: s_cmp_lg_u32 s8, s4 +; GFX950-GISEL-NEXT: s_cselect_b32 s4, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s4, s9, s4 +; GFX950-GISEL-NEXT: s_cmp_lt_i32 s3, 1 +; GFX950-GISEL-NEXT: s_cselect_b32 s4, s4, s6 +; GFX950-GISEL-NEXT: s_and_b32 s6, s4, 7 +; GFX950-GISEL-NEXT: s_lshr_b32 s4, s4, 2 +; GFX950-GISEL-NEXT: s_cmp_eq_u32 s6, 3 +; GFX950-GISEL-NEXT: s_cselect_b32 s8, 1, 0 +; GFX950-GISEL-NEXT: s_cmp_gt_i32 s6, 5 +; GFX950-GISEL-NEXT: s_cselect_b32 s6, 1, 0 +; GFX950-GISEL-NEXT: s_or_b32 s6, s8, s6 +; GFX950-GISEL-NEXT: s_add_i32 s4, s4, s6 +; GFX950-GISEL-NEXT: s_cmp_gt_i32 s3, 30 +; GFX950-GISEL-NEXT: s_cselect_b32 s4, 0x7c00, s4 +; GFX950-GISEL-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX950-GISEL-NEXT: s_cselect_b32 s3, s5, s4 +; GFX950-GISEL-NEXT: s_lshr_b32 s4, s7, 16 +; GFX950-GISEL-NEXT: s_and_b32 s4, s4, 0x8000 +; GFX950-GISEL-NEXT: s_or_b32 s3, s4, s3 +; GFX950-GISEL-NEXT: s_pack_ll_b32_b16 s2, s2, s3 +; GFX950-GISEL-NEXT: v_mov_b32_e32 v0, s2 +; GFX950-GISEL-NEXT: s_mov_b32 s2, -1 +; GFX950-GISEL-NEXT: s_mov_b32 s3, 0xf000 +; GFX950-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0 +; GFX950-GISEL-NEXT: s_endpgm +; +; GFX11-SDAG-TRUE16-LABEL: fptrunc_v2f64_to_v2f16: +; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry +; GFX11-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s6, -1 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s10, s6 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s11, s7 +; GFX11-SDAG-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s8, s2 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s9, s3 +; GFX11-SDAG-TRUE16-NEXT: buffer_load_b128 v[0:3], off, s[8:11], 0 +; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s2, v3 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s3, s2, 0x1ff +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s5, s2, 8 +; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, s3, v2 +; GFX11-SDAG-TRUE16-NEXT: s_bfe_u32 s3, s2, 0xb0014 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-SDAG-TRUE16-NEXT: s_sub_i32 s4, 0x3f1, s3 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v2 +; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v3, s4, 0, 13 +; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s8, v3 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s4, v2 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s4, s5, s4 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s5, s4, 0x1000 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s9, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s8, s9, s8 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s8, s5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_addk_i32 s3, 0xfc10 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s5, s9, s5 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s8, s3, 12 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s8, s4, s8 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s3, 1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s8, s5, 7 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s5, s5, 2 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s8, s8, s9 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_add_i32 s5, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s3, 31 +; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s8, 0x7e00 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, s5, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s4, v1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s9, s8, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s9, s5 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s5, s4, 0x1ff +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s10, s4, 8 +; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v0, s5, v0 +; GFX11-SDAG-TRUE16-NEXT: s_bfe_u32 s5, s4, 0xb0014 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s10, s10, 0xffe +; GFX11-SDAG-TRUE16-NEXT: s_sub_i32 s9, 0x3f1, s5 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s2, s2, 16 +; GFX11-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 +; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, s9, 0, 13 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s2, s2, 0x8000 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s2, s2, s3 +; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s11, v1 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s9, v0 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s9, s10, s9 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s10, s9, 0x1000 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s12, s10, s11 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s11, s12, s11 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s11, s10 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_addk_i32 s5, 0xfc10 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s3, s12, s3 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s10, s5, 12 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s10, s9, s10 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s5, 1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s3, s10 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s10, s3, 7 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_gt_i32 s10, 5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s11, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_eq_u32 s10, 3 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s10, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s3, s3, 2 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s10, s10, s11 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_add_i32 s3, s3, s10 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s5, 31 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s3, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s9, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmpk_eq_i32 s5, 0x40f +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s8, s3 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s4, s4, 16 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s4, s4, 0x8000 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s3, s4, s3 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s3, s2 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, s2 +; GFX11-SDAG-TRUE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0 +; GFX11-SDAG-TRUE16-NEXT: s_endpgm +; +; GFX11-SDAG-FAKE16-LABEL: fptrunc_v2f64_to_v2f16: +; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry +; GFX11-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s6, -1 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s10, s6 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s11, s7 +; GFX11-SDAG-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s8, s2 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s9, s3 +; GFX11-SDAG-FAKE16-NEXT: buffer_load_b128 v[0:3], off, s[8:11], 0 +; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s2, v3 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s3, s2, 0x1ff +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s5, s2, 8 +; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, s3, v2 +; GFX11-SDAG-FAKE16-NEXT: s_bfe_u32 s3, s2, 0xb0014 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-SDAG-FAKE16-NEXT: s_sub_i32 s4, 0x3f1, s3 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v2 +; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v3, s4, 0, 13 +; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s8, v3 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s4, v2 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s4, s5, s4 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s5, s4, 0x1000 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s9, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s8, s9, s8 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s8, s5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_addk_i32 s3, 0xfc10 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s5, s9, s5 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s8, s3, 12 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s8, s4, s8 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s3, 1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s8, s5, 7 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s5, s5, 2 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s8, s8, s9 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_add_i32 s5, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s3, 31 +; GFX11-SDAG-FAKE16-NEXT: s_movk_i32 s8, 0x7e00 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, s5, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s4, v1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s9, s8, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s9, s5 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s5, s4, 0x1ff +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s10, s4, 8 +; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v0, s5, v0 +; GFX11-SDAG-FAKE16-NEXT: s_bfe_u32 s5, s4, 0xb0014 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s10, s10, 0xffe +; GFX11-SDAG-FAKE16-NEXT: s_sub_i32 s9, 0x3f1, s5 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s2, s2, 16 +; GFX11-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 +; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v1, s9, 0, 13 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s2, s2, 0x8000 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s2, s2, s3 +; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s11, v1 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s9, v0 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s9, s10, s9 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s10, s9, 0x1000 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s12, s10, s11 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s11, s12, s11 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s11, s10 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_addk_i32 s5, 0xfc10 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s3, s12, s3 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s10, s5, 12 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s10, s9, s10 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s5, 1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s3, s10 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s10, s3, 7 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_gt_i32 s10, 5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s11, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_eq_u32 s10, 3 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s10, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s3, s3, 2 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s10, s10, s11 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_add_i32 s3, s3, s10 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s5, 31 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s3, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s9, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmpk_eq_i32 s5, 0x40f +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s8, s3 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s4, s4, 16 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s4, s4, 0x8000 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s3, s4, s3 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s3, s2 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s2 +; GFX11-SDAG-FAKE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0 +; GFX11-SDAG-FAKE16-NEXT: s_endpgm +; +; GFX11-GISEL-TRUE16-LABEL: fptrunc_v2f64_to_v2f16: +; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry +; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[4:7], s[2:3], 0x0 +; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s8, s5, 0x1ff +; GFX11-GISEL-TRUE16-NEXT: s_bfe_u32 s2, s5, 0xb0014 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s3, s5, 8 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s4, s8, s4 +; GFX11-GISEL-TRUE16-NEXT: s_addk_i32 s2, 0xfc10 +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s3, s3, 0xffe +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s4, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s3, s3, s4 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s4, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_sub_i32 s8, 1, s2 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s10, s3, 0x1000 +; GFX11-GISEL-TRUE16-NEXT: s_max_i32 s8, s8, 0 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s9, s2, 12 +; GFX11-GISEL-TRUE16-NEXT: s_min_i32 s8, s8, 13 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s4, s4, 9 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s11, s10, s8 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s3, s3, s9 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s8, s11, s8 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s4, s4, 0x7c00 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s8, s10 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s8, s11, s8 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lt_i32 s2, 1 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s3, s8, s3 +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s8, s3, 7 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s3, s3, 2 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s8, s9, s8 +; GFX11-GISEL-TRUE16-NEXT: s_add_i32 s3, s3, s8 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_gt_i32 s2, 30 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s3, 0x7c00, s3 +; GFX11-GISEL-TRUE16-NEXT: s_cmpk_eq_i32 s2, 0x40f +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s2, s4, s3 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s3, s5, 16 +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s8, s7, 0x1ff +; GFX11-GISEL-TRUE16-NEXT: s_bfe_u32 s4, s7, 0xb0014 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s5, s7, 8 +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s3, s3, 0x8000 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s6, s8, s6 +; GFX11-GISEL-TRUE16-NEXT: s_addk_i32 s4, 0xfc10 +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s2, s3, s2 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s6, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s3, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s3, s5, s3 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_sub_i32 s6, 1, s4 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s9, s3, 0x1000 +; GFX11-GISEL-TRUE16-NEXT: s_max_i32 s6, s6, 0 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s8, s4, 12 +; GFX11-GISEL-TRUE16-NEXT: s_min_i32 s6, s6, 13 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s5, s5, 9 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s10, s9, s6 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s3, s3, s8 +; GFX11-GISEL-TRUE16-NEXT: s_lshl_b32 s6, s10, s6 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s5, s5, 0x7c00 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s6, s9 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s6, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s6, s10, s6 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_lt_i32 s4, 1 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s3, s6, s3 +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s6, s3, 7 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s3, s3, 2 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_eq_u32 s6, 3 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_gt_i32 s6, 5 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s6, 1, 0 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s6, s8, s6 +; GFX11-GISEL-TRUE16-NEXT: s_add_i32 s3, s3, s6 +; GFX11-GISEL-TRUE16-NEXT: s_cmp_gt_i32 s4, 30 +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s3, 0x7c00, s3 +; GFX11-GISEL-TRUE16-NEXT: s_cmpk_eq_i32 s4, 0x40f +; GFX11-GISEL-TRUE16-NEXT: s_cselect_b32 s3, s5, s3 +; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s4, s7, 16 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_and_b32 s4, s4, 0x8000 +; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s3, s4, s3 +; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-GISEL-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s2, s3 +; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s3, 0x31016000 +; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v0, s2 +; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s2, -1 +; GFX11-GISEL-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX11-GISEL-TRUE16-NEXT: s_endpgm +; +; GFX11-GISEL-FAKE16-LABEL: fptrunc_v2f64_to_v2f16: +; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry +; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 +; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[4:7], s[2:3], 0x0 +; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s8, s5, 0x1ff +; GFX11-GISEL-FAKE16-NEXT: s_bfe_u32 s2, s5, 0xb0014 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s3, s5, 8 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s4, s8, s4 +; GFX11-GISEL-FAKE16-NEXT: s_addk_i32 s2, 0xfc10 +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s3, s3, 0xffe +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s4, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s3, s3, s4 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s4, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_sub_i32 s8, 1, s2 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s10, s3, 0x1000 +; GFX11-GISEL-FAKE16-NEXT: s_max_i32 s8, s8, 0 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s9, s2, 12 +; GFX11-GISEL-FAKE16-NEXT: s_min_i32 s8, s8, 13 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s4, s4, 9 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s11, s10, s8 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s3, s3, s9 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s8, s11, s8 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s4, s4, 0x7c00 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s8, s10 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s8, s11, s8 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lt_i32 s2, 1 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s3, s8, s3 +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s8, s3, 7 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s3, s3, 2 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s8, s9, s8 +; GFX11-GISEL-FAKE16-NEXT: s_add_i32 s3, s3, s8 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_gt_i32 s2, 30 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s3, 0x7c00, s3 +; GFX11-GISEL-FAKE16-NEXT: s_cmpk_eq_i32 s2, 0x40f +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s2, s4, s3 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s3, s5, 16 +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s8, s7, 0x1ff +; GFX11-GISEL-FAKE16-NEXT: s_bfe_u32 s4, s7, 0xb0014 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s5, s7, 8 +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s3, s3, 0x8000 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s6, s8, s6 +; GFX11-GISEL-FAKE16-NEXT: s_addk_i32 s4, 0xfc10 +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s2, s3, s2 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s6, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s3, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s3, s5, s3 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_sub_i32 s6, 1, s4 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s9, s3, 0x1000 +; GFX11-GISEL-FAKE16-NEXT: s_max_i32 s6, s6, 0 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s8, s4, 12 +; GFX11-GISEL-FAKE16-NEXT: s_min_i32 s6, s6, 13 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s5, s5, 9 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s10, s9, s6 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s3, s3, s8 +; GFX11-GISEL-FAKE16-NEXT: s_lshl_b32 s6, s10, s6 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s5, s5, 0x7c00 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s6, s9 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s6, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s6, s10, s6 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_lt_i32 s4, 1 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s3, s6, s3 +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s6, s3, 7 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s3, s3, 2 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_eq_u32 s6, 3 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_gt_i32 s6, 5 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s6, 1, 0 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s6, s8, s6 +; GFX11-GISEL-FAKE16-NEXT: s_add_i32 s3, s3, s6 +; GFX11-GISEL-FAKE16-NEXT: s_cmp_gt_i32 s4, 30 +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s3, 0x7c00, s3 +; GFX11-GISEL-FAKE16-NEXT: s_cmpk_eq_i32 s4, 0x40f +; GFX11-GISEL-FAKE16-NEXT: s_cselect_b32 s3, s5, s3 +; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s4, s7, 16 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_and_b32 s4, s4, 0x8000 +; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s3, s4, s3 +; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-GISEL-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s2, s3 +; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s3, 0x31016000 +; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v0, s2 +; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s2, -1 +; GFX11-GISEL-FAKE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX11-GISEL-FAKE16-NEXT: s_endpgm + ptr addrspace(1) %r, + ptr addrspace(1) %a) { +entry: + %a.val = load <2 x double>, ptr addrspace(1) %a + %r.val = fptrunc <2 x double> %a.val to <2 x half> + store <2 x half> %r.val, ptr addrspace(1) %r + ret void +} + +define amdgpu_kernel void @fptrunc_v2f64_to_v2f16_afn( +; SI-SDAG-LABEL: fptrunc_v2f64_to_v2f16_afn: +; SI-SDAG: ; %bb.0: ; %entry +; SI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 +; SI-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; SI-SDAG-NEXT: s_mov_b32 s2, -1 +; SI-SDAG-NEXT: s_mov_b32 s10, s2 +; SI-SDAG-NEXT: s_mov_b32 s11, s3 +; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; SI-SDAG-NEXT: s_mov_b32 s8, s6 +; SI-SDAG-NEXT: s_mov_b32 s9, s7 +; SI-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; SI-SDAG-NEXT: s_movk_i32 s0, 0x7e00 +; SI-SDAG-NEXT: s_waitcnt vmcnt(0) +; SI-SDAG-NEXT: v_readfirstlane_b32 s1, v3 +; SI-SDAG-NEXT: v_readfirstlane_b32 s6, v1 +; SI-SDAG-NEXT: s_and_b32 s7, s1, 0x1ff +; SI-SDAG-NEXT: s_lshr_b32 s8, s1, 8 +; SI-SDAG-NEXT: s_bfe_u32 s9, s1, 0xb0014 +; SI-SDAG-NEXT: v_or_b32_e32 v1, s7, v2 +; SI-SDAG-NEXT: s_and_b32 s7, s8, 0xffe +; SI-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s9 +; SI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; SI-SDAG-NEXT: v_med3_i32 v2, s8, 0, 13 +; SI-SDAG-NEXT: v_readfirstlane_b32 s8, v1 +; SI-SDAG-NEXT: v_readfirstlane_b32 s10, v2 +; SI-SDAG-NEXT: s_or_b32 s7, s7, s8 +; SI-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; SI-SDAG-NEXT: s_lshr_b32 s11, s8, s10 +; SI-SDAG-NEXT: s_lshl_b32 s10, s11, s10 +; SI-SDAG-NEXT: s_cmp_lg_u32 s10, s8 +; SI-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; SI-SDAG-NEXT: s_addk_i32 s9, 0xfc10 +; SI-SDAG-NEXT: s_or_b32 s8, s11, s8 +; SI-SDAG-NEXT: s_lshl_b32 s10, s9, 12 +; SI-SDAG-NEXT: s_or_b32 s10, s7, s10 +; SI-SDAG-NEXT: s_cmp_lt_i32 s9, 1 +; SI-SDAG-NEXT: s_cselect_b32 s8, s8, s10 +; SI-SDAG-NEXT: s_and_b32 s10, s8, 7 +; SI-SDAG-NEXT: s_cmp_gt_i32 s10, 5 +; SI-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; SI-SDAG-NEXT: s_cmp_eq_u32 s10, 3 +; SI-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; SI-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; SI-SDAG-NEXT: s_or_b32 s10, s10, s11 +; SI-SDAG-NEXT: s_add_i32 s8, s8, s10 +; SI-SDAG-NEXT: s_cmp_lt_i32 s9, 31 +; SI-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; SI-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; SI-SDAG-NEXT: s_cselect_b32 s7, s0, 0x7c00 +; SI-SDAG-NEXT: s_cmpk_eq_i32 s9, 0x40f +; SI-SDAG-NEXT: s_cselect_b32 s7, s7, s8 +; SI-SDAG-NEXT: s_lshr_b32 s1, s1, 16 +; SI-SDAG-NEXT: s_and_b32 s8, s6, 0x1ff +; SI-SDAG-NEXT: s_lshr_b32 s9, s6, 8 +; SI-SDAG-NEXT: s_bfe_u32 s10, s6, 0xb0014 +; SI-SDAG-NEXT: s_and_b32 s1, s1, 0x8000 +; SI-SDAG-NEXT: v_or_b32_e32 v0, s8, v0 +; SI-SDAG-NEXT: s_and_b32 s8, s9, 0xffe +; SI-SDAG-NEXT: s_sub_i32 s9, 0x3f1, s10 +; SI-SDAG-NEXT: s_or_b32 s1, s1, s7 +; SI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; SI-SDAG-NEXT: v_med3_i32 v1, s9, 0, 13 +; SI-SDAG-NEXT: s_lshl_b32 s1, s1, 16 +; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; SI-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; SI-SDAG-NEXT: s_or_b32 s7, s8, s7 +; SI-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; SI-SDAG-NEXT: s_lshr_b32 s11, s8, s9 +; SI-SDAG-NEXT: s_lshl_b32 s9, s11, s9 +; SI-SDAG-NEXT: s_cmp_lg_u32 s9, s8 +; SI-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; SI-SDAG-NEXT: s_addk_i32 s10, 0xfc10 +; SI-SDAG-NEXT: s_or_b32 s8, s11, s8 +; SI-SDAG-NEXT: s_lshl_b32 s9, s10, 12 +; SI-SDAG-NEXT: s_or_b32 s9, s7, s9 +; SI-SDAG-NEXT: s_cmp_lt_i32 s10, 1 +; SI-SDAG-NEXT: s_cselect_b32 s8, s8, s9 +; SI-SDAG-NEXT: s_and_b32 s9, s8, 7 +; SI-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; SI-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; SI-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; SI-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; SI-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; SI-SDAG-NEXT: s_or_b32 s9, s9, s11 +; SI-SDAG-NEXT: s_add_i32 s8, s8, s9 +; SI-SDAG-NEXT: s_cmp_lt_i32 s10, 31 +; SI-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; SI-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; SI-SDAG-NEXT: s_cselect_b32 s0, s0, 0x7c00 +; SI-SDAG-NEXT: s_cmpk_eq_i32 s10, 0x40f +; SI-SDAG-NEXT: s_cselect_b32 s0, s0, s8 +; SI-SDAG-NEXT: s_lshr_b32 s6, s6, 16 +; SI-SDAG-NEXT: s_and_b32 s6, s6, 0x8000 +; SI-SDAG-NEXT: s_or_b32 s0, s6, s0 +; SI-SDAG-NEXT: s_and_b32 s0, s0, 0xffff +; SI-SDAG-NEXT: s_or_b32 s6, s0, s1 +; SI-SDAG-NEXT: s_mov_b32 s0, s4 +; SI-SDAG-NEXT: s_mov_b32 s1, s5 +; SI-SDAG-NEXT: v_mov_b32_e32 v0, s6 +; SI-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0 +; SI-SDAG-NEXT: s_endpgm +; +; SI-GISEL-LABEL: fptrunc_v2f64_to_v2f16_afn: +; SI-GISEL: ; %bb.0: ; %entry +; SI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 +; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) +; SI-GISEL-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 +; SI-GISEL-NEXT: s_mov_b32 s2, -1 +; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; SI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[4:5] ; SI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[6:7] ; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 @@ -664,29 +3145,111 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; SI-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; SI-GISEL-NEXT: s_endpgm ; -; VI-SDAG-LABEL: fptrunc_v2f64_to_v2f16: +; VI-SDAG-LABEL: fptrunc_v2f64_to_v2f16_afn: ; VI-SDAG: ; %bb.0: ; %entry -; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 -; VI-SDAG-NEXT: s_mov_b32 s7, 0xf000 -; VI-SDAG-NEXT: s_mov_b32 s6, -1 -; VI-SDAG-NEXT: s_mov_b32 s10, s6 -; VI-SDAG-NEXT: s_mov_b32 s11, s7 +; VI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 +; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; VI-SDAG-NEXT: s_mov_b32 s2, -1 +; VI-SDAG-NEXT: s_mov_b32 s10, s2 +; VI-SDAG-NEXT: s_mov_b32 s11, s3 ; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; VI-SDAG-NEXT: s_mov_b32 s8, s2 -; VI-SDAG-NEXT: s_mov_b32 s9, s3 +; VI-SDAG-NEXT: s_mov_b32 s8, s6 +; VI-SDAG-NEXT: s_mov_b32 s9, s7 ; VI-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; VI-SDAG-NEXT: s_mov_b32 s4, s0 -; VI-SDAG-NEXT: s_mov_b32 s5, s1 +; VI-SDAG-NEXT: s_mov_b32 s0, s4 +; VI-SDAG-NEXT: s_mov_b32 s1, s5 +; VI-SDAG-NEXT: s_movk_i32 s6, 0x7e00 ; VI-SDAG-NEXT: s_waitcnt vmcnt(0) -; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v2, v[2:3] -; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] -; VI-SDAG-NEXT: v_cvt_f16_f32_sdwa v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD -; VI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 -; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0 +; VI-SDAG-NEXT: v_readfirstlane_b32 s4, v3 +; VI-SDAG-NEXT: s_and_b32 s7, s4, 0x1ff +; VI-SDAG-NEXT: v_readfirstlane_b32 s5, v1 +; VI-SDAG-NEXT: v_or_b32_e32 v1, s7, v2 +; VI-SDAG-NEXT: s_lshr_b32 s8, s4, 8 +; VI-SDAG-NEXT: s_bfe_u32 s9, s4, 0xb0014 +; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; VI-SDAG-NEXT: s_and_b32 s7, s8, 0xffe +; VI-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s9 +; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; VI-SDAG-NEXT: v_med3_i32 v2, s8, 0, 13 +; VI-SDAG-NEXT: v_readfirstlane_b32 s8, v1 +; VI-SDAG-NEXT: s_or_b32 s7, s7, s8 +; VI-SDAG-NEXT: v_readfirstlane_b32 s10, v2 +; VI-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; VI-SDAG-NEXT: s_lshr_b32 s11, s8, s10 +; VI-SDAG-NEXT: s_lshl_b32 s10, s11, s10 +; VI-SDAG-NEXT: s_cmp_lg_u32 s10, s8 +; VI-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; VI-SDAG-NEXT: s_addk_i32 s9, 0xfc10 +; VI-SDAG-NEXT: s_lshl_b32 s10, s9, 12 +; VI-SDAG-NEXT: s_or_b32 s8, s11, s8 +; VI-SDAG-NEXT: s_or_b32 s10, s7, s10 +; VI-SDAG-NEXT: s_cmp_lt_i32 s9, 1 +; VI-SDAG-NEXT: s_cselect_b32 s8, s8, s10 +; VI-SDAG-NEXT: s_and_b32 s10, s8, 7 +; VI-SDAG-NEXT: s_cmp_gt_i32 s10, 5 +; VI-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; VI-SDAG-NEXT: s_cmp_eq_u32 s10, 3 +; VI-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; VI-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; VI-SDAG-NEXT: s_or_b32 s10, s10, s11 +; VI-SDAG-NEXT: s_add_i32 s8, s8, s10 +; VI-SDAG-NEXT: s_cmp_lt_i32 s9, 31 +; VI-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; VI-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; VI-SDAG-NEXT: s_cselect_b32 s7, s6, 0x7c00 +; VI-SDAG-NEXT: s_cmpk_eq_i32 s9, 0x40f +; VI-SDAG-NEXT: s_cselect_b32 s7, s7, s8 +; VI-SDAG-NEXT: s_and_b32 s8, s5, 0x1ff +; VI-SDAG-NEXT: v_or_b32_e32 v0, s8, v0 +; VI-SDAG-NEXT: s_lshr_b32 s4, s4, 16 +; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; VI-SDAG-NEXT: s_lshr_b32 s9, s5, 8 +; VI-SDAG-NEXT: s_bfe_u32 s10, s5, 0xb0014 +; VI-SDAG-NEXT: s_and_b32 s4, s4, 0x8000 +; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; VI-SDAG-NEXT: s_and_b32 s8, s9, 0xffe +; VI-SDAG-NEXT: s_sub_i32 s9, 0x3f1, s10 +; VI-SDAG-NEXT: s_or_b32 s4, s4, s7 +; VI-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; VI-SDAG-NEXT: v_med3_i32 v1, s9, 0, 13 +; VI-SDAG-NEXT: s_or_b32 s7, s8, s7 +; VI-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; VI-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; VI-SDAG-NEXT: s_lshr_b32 s11, s8, s9 +; VI-SDAG-NEXT: s_lshl_b32 s4, s4, 16 +; VI-SDAG-NEXT: s_lshl_b32 s9, s11, s9 +; VI-SDAG-NEXT: s_cmp_lg_u32 s9, s8 +; VI-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; VI-SDAG-NEXT: s_addk_i32 s10, 0xfc10 +; VI-SDAG-NEXT: s_lshl_b32 s9, s10, 12 +; VI-SDAG-NEXT: s_or_b32 s8, s11, s8 +; VI-SDAG-NEXT: s_or_b32 s9, s7, s9 +; VI-SDAG-NEXT: s_cmp_lt_i32 s10, 1 +; VI-SDAG-NEXT: s_cselect_b32 s8, s8, s9 +; VI-SDAG-NEXT: s_and_b32 s9, s8, 7 +; VI-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; VI-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; VI-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; VI-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; VI-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; VI-SDAG-NEXT: s_or_b32 s9, s9, s11 +; VI-SDAG-NEXT: s_add_i32 s8, s8, s9 +; VI-SDAG-NEXT: s_cmp_lt_i32 s10, 31 +; VI-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; VI-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; VI-SDAG-NEXT: s_cselect_b32 s6, s6, 0x7c00 +; VI-SDAG-NEXT: s_cmpk_eq_i32 s10, 0x40f +; VI-SDAG-NEXT: s_cselect_b32 s6, s6, s8 +; VI-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; VI-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; VI-SDAG-NEXT: s_or_b32 s5, s5, s6 +; VI-SDAG-NEXT: s_and_b32 s5, s5, 0xffff +; VI-SDAG-NEXT: s_or_b32 s4, s5, s4 +; VI-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; VI-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; VI-SDAG-NEXT: s_endpgm ; -; VI-GISEL-LABEL: fptrunc_v2f64_to_v2f16: +; VI-GISEL-LABEL: fptrunc_v2f64_to_v2f16_afn: ; VI-GISEL: ; %bb.0: ; %entry ; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0) @@ -702,29 +3265,109 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; VI-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; VI-GISEL-NEXT: s_endpgm ; -; GFX9-SDAG-LABEL: fptrunc_v2f64_to_v2f16: +; GFX9-SDAG-LABEL: fptrunc_v2f64_to_v2f16_afn: ; GFX9-SDAG: ; %bb.0: ; %entry -; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 -; GFX9-SDAG-NEXT: s_mov_b32 s7, 0xf000 -; GFX9-SDAG-NEXT: s_mov_b32 s6, -1 -; GFX9-SDAG-NEXT: s_mov_b32 s10, s6 -; GFX9-SDAG-NEXT: s_mov_b32 s11, s7 +; GFX9-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 +; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; GFX9-SDAG-NEXT: s_mov_b32 s2, -1 +; GFX9-SDAG-NEXT: s_mov_b32 s6, s2 +; GFX9-SDAG-NEXT: s_mov_b32 s7, s3 ; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-SDAG-NEXT: s_mov_b32 s8, s2 -; GFX9-SDAG-NEXT: s_mov_b32 s9, s3 -; GFX9-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; GFX9-SDAG-NEXT: s_mov_b32 s4, s0 -; GFX9-SDAG-NEXT: s_mov_b32 s5, s1 +; GFX9-SDAG-NEXT: s_mov_b32 s4, s10 +; GFX9-SDAG-NEXT: s_mov_b32 s5, s11 +; GFX9-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 +; GFX9-SDAG-NEXT: s_mov_b32 s0, s8 +; GFX9-SDAG-NEXT: s_mov_b32 s1, s9 +; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x7e00 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX9-SDAG-NEXT: v_cvt_f32_f64_e32 v2, v[2:3] -; GFX9-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] -; GFX9-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v2 -; GFX9-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 -; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v1 -; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s5, v3 +; GFX9-SDAG-NEXT: s_and_b32 s7, s5, 0x1ff +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s6, v1 +; GFX9-SDAG-NEXT: v_or_b32_e32 v1, s7, v2 +; GFX9-SDAG-NEXT: s_lshr_b32 s8, s5, 8 +; GFX9-SDAG-NEXT: s_bfe_u32 s9, s5, 0xb0014 +; GFX9-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; GFX9-SDAG-NEXT: s_and_b32 s7, s8, 0xffe +; GFX9-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s9 +; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GFX9-SDAG-NEXT: v_med3_i32 v2, s8, 0, 13 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s8, v1 +; GFX9-SDAG-NEXT: s_or_b32 s7, s7, s8 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s10, v2 +; GFX9-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; GFX9-SDAG-NEXT: s_lshr_b32 s11, s8, s10 +; GFX9-SDAG-NEXT: s_lshl_b32 s10, s11, s10 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s10, s8 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; GFX9-SDAG-NEXT: s_addk_i32 s9, 0xfc10 +; GFX9-SDAG-NEXT: s_lshl_b32 s10, s9, 12 +; GFX9-SDAG-NEXT: s_or_b32 s8, s11, s8 +; GFX9-SDAG-NEXT: s_or_b32 s10, s7, s10 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s9, 1 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, s8, s10 +; GFX9-SDAG-NEXT: s_and_b32 s10, s8, 7 +; GFX9-SDAG-NEXT: s_cmp_gt_i32 s10, 5 +; GFX9-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; GFX9-SDAG-NEXT: s_cmp_eq_u32 s10, 3 +; GFX9-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; GFX9-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; GFX9-SDAG-NEXT: s_or_b32 s10, s10, s11 +; GFX9-SDAG-NEXT: s_add_i32 s8, s8, s10 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s9, 31 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; GFX9-SDAG-NEXT: s_cselect_b32 s7, s4, 0x7c00 +; GFX9-SDAG-NEXT: s_cmpk_eq_i32 s9, 0x40f +; GFX9-SDAG-NEXT: s_cselect_b32 s7, s7, s8 +; GFX9-SDAG-NEXT: s_and_b32 s8, s6, 0x1ff +; GFX9-SDAG-NEXT: v_or_b32_e32 v0, s8, v0 +; GFX9-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; GFX9-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; GFX9-SDAG-NEXT: s_lshr_b32 s9, s6, 8 +; GFX9-SDAG-NEXT: s_bfe_u32 s10, s6, 0xb0014 +; GFX9-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GFX9-SDAG-NEXT: s_and_b32 s8, s9, 0xffe +; GFX9-SDAG-NEXT: s_sub_i32 s9, 0x3f1, s10 +; GFX9-SDAG-NEXT: s_or_b32 s5, s5, s7 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; GFX9-SDAG-NEXT: v_med3_i32 v1, s9, 0, 13 +; GFX9-SDAG-NEXT: s_or_b32 s7, s8, s7 +; GFX9-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; GFX9-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; GFX9-SDAG-NEXT: s_lshr_b32 s11, s8, s9 +; GFX9-SDAG-NEXT: s_lshl_b32 s9, s11, s9 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s9, s8 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; GFX9-SDAG-NEXT: s_addk_i32 s10, 0xfc10 +; GFX9-SDAG-NEXT: s_lshl_b32 s9, s10, 12 +; GFX9-SDAG-NEXT: s_or_b32 s8, s11, s8 +; GFX9-SDAG-NEXT: s_or_b32 s9, s7, s9 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s10, 1 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, s8, s9 +; GFX9-SDAG-NEXT: s_and_b32 s9, s8, 7 +; GFX9-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; GFX9-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; GFX9-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; GFX9-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; GFX9-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; GFX9-SDAG-NEXT: s_or_b32 s9, s9, s11 +; GFX9-SDAG-NEXT: s_add_i32 s8, s8, s9 +; GFX9-SDAG-NEXT: s_cmp_lt_i32 s10, 31 +; GFX9-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX9-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; GFX9-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00 +; GFX9-SDAG-NEXT: s_cmpk_eq_i32 s10, 0x40f +; GFX9-SDAG-NEXT: s_cselect_b32 s4, s4, s8 +; GFX9-SDAG-NEXT: s_lshr_b32 s6, s6, 16 +; GFX9-SDAG-NEXT: s_and_b32 s6, s6, 0x8000 +; GFX9-SDAG-NEXT: s_or_b32 s4, s6, s4 +; GFX9-SDAG-NEXT: s_pack_ll_b32_b16 s4, s4, s5 +; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX9-SDAG-NEXT: s_endpgm ; -; GFX9-GISEL-LABEL: fptrunc_v2f64_to_v2f16: +; GFX9-GISEL-LABEL: fptrunc_v2f64_to_v2f16_afn: ; GFX9-GISEL: ; %bb.0: ; %entry ; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) @@ -740,27 +3383,109 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX9-GISEL-NEXT: s_endpgm ; -; GFX950-SDAG-LABEL: fptrunc_v2f64_to_v2f16: +; GFX950-SDAG-LABEL: fptrunc_v2f64_to_v2f16_afn: ; GFX950-SDAG: ; %bb.0: ; %entry -; GFX950-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 -; GFX950-SDAG-NEXT: s_mov_b32 s7, 0xf000 -; GFX950-SDAG-NEXT: s_mov_b32 s6, -1 -; GFX950-SDAG-NEXT: s_mov_b32 s10, s6 -; GFX950-SDAG-NEXT: s_mov_b32 s11, s7 +; GFX950-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 +; GFX950-SDAG-NEXT: s_mov_b32 s3, 0xf000 +; GFX950-SDAG-NEXT: s_mov_b32 s2, -1 +; GFX950-SDAG-NEXT: s_mov_b32 s6, s2 +; GFX950-SDAG-NEXT: s_mov_b32 s7, s3 ; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX950-SDAG-NEXT: s_mov_b32 s8, s2 -; GFX950-SDAG-NEXT: s_mov_b32 s9, s3 -; GFX950-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; GFX950-SDAG-NEXT: s_mov_b32 s4, s0 -; GFX950-SDAG-NEXT: s_mov_b32 s5, s1 +; GFX950-SDAG-NEXT: s_mov_b32 s4, s10 +; GFX950-SDAG-NEXT: s_mov_b32 s5, s11 +; GFX950-SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 +; GFX950-SDAG-NEXT: s_mov_b32 s0, s8 +; GFX950-SDAG-NEXT: s_mov_b32 s1, s9 +; GFX950-SDAG-NEXT: s_movk_i32 s4, 0x7e00 ; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX950-SDAG-NEXT: v_cvt_f32_f64_e32 v2, v[2:3] -; GFX950-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] -; GFX950-SDAG-NEXT: v_cvt_pk_f16_f32 v0, v0, v2 -; GFX950-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s5, v3 +; GFX950-SDAG-NEXT: s_and_b32 s7, s5, 0x1ff +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s6, v1 +; GFX950-SDAG-NEXT: v_or_b32_e32 v1, s7, v2 +; GFX950-SDAG-NEXT: s_lshr_b32 s8, s5, 8 +; GFX950-SDAG-NEXT: s_bfe_u32 s9, s5, 0xb0014 +; GFX950-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; GFX950-SDAG-NEXT: s_and_b32 s7, s8, 0xffe +; GFX950-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s9 +; GFX950-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GFX950-SDAG-NEXT: v_med3_i32 v2, s8, 0, 13 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s8, v1 +; GFX950-SDAG-NEXT: s_or_b32 s7, s7, s8 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s10, v2 +; GFX950-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; GFX950-SDAG-NEXT: s_lshr_b32 s11, s8, s10 +; GFX950-SDAG-NEXT: s_lshl_b32 s10, s11, s10 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s10, s8 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; GFX950-SDAG-NEXT: s_addk_i32 s9, 0xfc10 +; GFX950-SDAG-NEXT: s_lshl_b32 s10, s9, 12 +; GFX950-SDAG-NEXT: s_or_b32 s8, s11, s8 +; GFX950-SDAG-NEXT: s_or_b32 s10, s7, s10 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s9, 1 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, s8, s10 +; GFX950-SDAG-NEXT: s_and_b32 s10, s8, 7 +; GFX950-SDAG-NEXT: s_cmp_gt_i32 s10, 5 +; GFX950-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; GFX950-SDAG-NEXT: s_cmp_eq_u32 s10, 3 +; GFX950-SDAG-NEXT: s_cselect_b32 s10, 1, 0 +; GFX950-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; GFX950-SDAG-NEXT: s_or_b32 s10, s10, s11 +; GFX950-SDAG-NEXT: s_add_i32 s8, s8, s10 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s9, 31 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; GFX950-SDAG-NEXT: s_cselect_b32 s7, s4, 0x7c00 +; GFX950-SDAG-NEXT: s_cmpk_eq_i32 s9, 0x40f +; GFX950-SDAG-NEXT: s_cselect_b32 s7, s7, s8 +; GFX950-SDAG-NEXT: s_and_b32 s8, s6, 0x1ff +; GFX950-SDAG-NEXT: v_or_b32_e32 v0, s8, v0 +; GFX950-SDAG-NEXT: s_lshr_b32 s5, s5, 16 +; GFX950-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; GFX950-SDAG-NEXT: s_lshr_b32 s9, s6, 8 +; GFX950-SDAG-NEXT: s_bfe_u32 s10, s6, 0xb0014 +; GFX950-SDAG-NEXT: s_and_b32 s5, s5, 0x8000 +; GFX950-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GFX950-SDAG-NEXT: s_and_b32 s8, s9, 0xffe +; GFX950-SDAG-NEXT: s_sub_i32 s9, 0x3f1, s10 +; GFX950-SDAG-NEXT: s_or_b32 s5, s5, s7 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s7, v0 +; GFX950-SDAG-NEXT: v_med3_i32 v1, s9, 0, 13 +; GFX950-SDAG-NEXT: s_or_b32 s7, s8, s7 +; GFX950-SDAG-NEXT: v_readfirstlane_b32 s9, v1 +; GFX950-SDAG-NEXT: s_or_b32 s8, s7, 0x1000 +; GFX950-SDAG-NEXT: s_lshr_b32 s11, s8, s9 +; GFX950-SDAG-NEXT: s_lshl_b32 s9, s11, s9 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s9, s8 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, 1, 0 +; GFX950-SDAG-NEXT: s_addk_i32 s10, 0xfc10 +; GFX950-SDAG-NEXT: s_lshl_b32 s9, s10, 12 +; GFX950-SDAG-NEXT: s_or_b32 s8, s11, s8 +; GFX950-SDAG-NEXT: s_or_b32 s9, s7, s9 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s10, 1 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, s8, s9 +; GFX950-SDAG-NEXT: s_and_b32 s9, s8, 7 +; GFX950-SDAG-NEXT: s_cmp_gt_i32 s9, 5 +; GFX950-SDAG-NEXT: s_cselect_b32 s11, 1, 0 +; GFX950-SDAG-NEXT: s_cmp_eq_u32 s9, 3 +; GFX950-SDAG-NEXT: s_cselect_b32 s9, 1, 0 +; GFX950-SDAG-NEXT: s_lshr_b32 s8, s8, 2 +; GFX950-SDAG-NEXT: s_or_b32 s9, s9, s11 +; GFX950-SDAG-NEXT: s_add_i32 s8, s8, s9 +; GFX950-SDAG-NEXT: s_cmp_lt_i32 s10, 31 +; GFX950-SDAG-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX950-SDAG-NEXT: s_cmp_lg_u32 s7, 0 +; GFX950-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00 +; GFX950-SDAG-NEXT: s_cmpk_eq_i32 s10, 0x40f +; GFX950-SDAG-NEXT: s_cselect_b32 s4, s4, s8 +; GFX950-SDAG-NEXT: s_lshr_b32 s6, s6, 16 +; GFX950-SDAG-NEXT: s_and_b32 s6, s6, 0x8000 +; GFX950-SDAG-NEXT: s_or_b32 s4, s6, s4 +; GFX950-SDAG-NEXT: s_pack_ll_b32_b16 s4, s4, s5 +; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, s4 +; GFX950-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX950-SDAG-NEXT: s_endpgm ; -; GFX950-GISEL-LABEL: fptrunc_v2f64_to_v2f16: +; GFX950-GISEL-LABEL: fptrunc_v2f64_to_v2f16_afn: ; GFX950-GISEL: ; %bb.0: ; %entry ; GFX950-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0) @@ -776,7 +3501,7 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; GFX950-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX950-GISEL-NEXT: s_endpgm ; -; GFX11-SDAG-TRUE16-LABEL: fptrunc_v2f64_to_v2f16: +; GFX11-SDAG-TRUE16-LABEL: fptrunc_v2f64_to_v2f16_afn: ; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry ; GFX11-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s6, -1 @@ -786,21 +3511,113 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; GFX11-SDAG-TRUE16-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s8, s2 ; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s9, s3 -; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, s0 ; GFX11-SDAG-TRUE16-NEXT: buffer_load_b128 v[0:3], off, s[8:11], 0 -; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s5, s1 ; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-SDAG-TRUE16-NEXT: v_cvt_f32_f64_e32 v2, v[2:3] -; GFX11-SDAG-TRUE16-NEXT: v_cvt_f32_f64_e32 v1, v[0:1] -; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v2 -; GFX11-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v1 -; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s2, v3 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s3, s2, 0x1ff +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s5, s2, 8 +; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, s3, v2 +; GFX11-SDAG-TRUE16-NEXT: s_bfe_u32 s3, s2, 0xb0014 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-SDAG-TRUE16-NEXT: s_sub_i32 s4, 0x3f1, s3 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v2 +; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v3, s4, 0, 13 +; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s8, v3 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s4, v2 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s4, s5, s4 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s5, s4, 0x1000 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s9, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s8, s9, s8 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s8, s5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_addk_i32 s3, 0xfc10 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s5, s9, s5 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s8, s3, 12 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s8, s4, s8 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s3, 1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s8, s5, 7 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s5, s5, 2 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s8, s8, s9 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_add_i32 s5, s5, s8 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s3, 31 +; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s8, 0x7e00 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s5, s5, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s4, v1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s9, s8, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s9, s5 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s5, s4, 0x1ff +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s10, s4, 8 +; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v0, s5, v0 +; GFX11-SDAG-TRUE16-NEXT: s_bfe_u32 s5, s4, 0xb0014 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s10, s10, 0xffe +; GFX11-SDAG-TRUE16-NEXT: s_sub_i32 s9, 0x3f1, s5 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s2, s2, 16 +; GFX11-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 +; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, s9, 0, 13 +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s2, s2, 0x8000 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s2, s2, s3 +; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s11, v1 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s9, v0 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s9, s10, s9 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s10, s9, 0x1000 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s12, s10, s11 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s11, s12, s11 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s11, s10 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_addk_i32 s5, 0xfc10 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s3, s12, s3 +; GFX11-SDAG-TRUE16-NEXT: s_lshl_b32 s10, s5, 12 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s10, s9, s10 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s5, 1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s3, s10 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s10, s3, 7 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_gt_i32 s10, 5 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s11, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_eq_u32 s10, 3 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s10, 1, 0 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s3, s3, 2 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s10, s10, s11 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_add_i32 s3, s3, s10 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lt_i32 s5, 31 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s3, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmp_lg_u32 s9, 0 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX11-SDAG-TRUE16-NEXT: s_cmpk_eq_i32 s5, 0x40f +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-TRUE16-NEXT: s_cselect_b32 s3, s8, s3 +; GFX11-SDAG-TRUE16-NEXT: s_lshr_b32 s4, s4, 16 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: s_and_b32 s4, s4, 0x8000 +; GFX11-SDAG-TRUE16-NEXT: s_or_b32 s3, s4, s3 +; GFX11-SDAG-TRUE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-TRUE16-NEXT: s_pack_ll_b32_b16 s2, s3, s2 +; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, s2 ; GFX11-SDAG-TRUE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0 ; GFX11-SDAG-TRUE16-NEXT: s_endpgm ; -; GFX11-SDAG-FAKE16-LABEL: fptrunc_v2f64_to_v2f16: +; GFX11-SDAG-FAKE16-LABEL: fptrunc_v2f64_to_v2f16_afn: ; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry ; GFX11-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s6, -1 @@ -810,21 +3627,113 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; GFX11-SDAG-FAKE16-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s8, s2 ; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s9, s3 -; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s4, s0 ; GFX11-SDAG-FAKE16-NEXT: buffer_load_b128 v[0:3], off, s[8:11], 0 -; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s5, s1 ; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-SDAG-FAKE16-NEXT: v_cvt_f32_f64_e32 v2, v[2:3] -; GFX11-SDAG-FAKE16-NEXT: v_cvt_f32_f64_e32 v0, v[0:1] -; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v2 -; GFX11-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0 -; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s2, v3 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s3, s2, 0x1ff +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s5, s2, 8 +; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, s3, v2 +; GFX11-SDAG-FAKE16-NEXT: s_bfe_u32 s3, s2, 0xb0014 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s5, s5, 0xffe +; GFX11-SDAG-FAKE16-NEXT: s_sub_i32 s4, 0x3f1, s3 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v2 +; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v3, s4, 0, 13 +; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s8, v3 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s4, v2 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s4, s5, s4 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s5, s4, 0x1000 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s9, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s8, s9, s8 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s8, s5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_addk_i32 s3, 0xfc10 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s5, s9, s5 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s8, s3, 12 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s8, s4, s8 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s3, 1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s8, s5, 7 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_gt_i32 s8, 5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s9, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_eq_u32 s8, 3 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s8, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s5, s5, 2 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s8, s8, s9 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_add_i32 s5, s5, s8 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s3, 31 +; GFX11-SDAG-FAKE16-NEXT: s_movk_i32 s8, 0x7e00 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s5, s5, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s4, 0 +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s4, v1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s9, s8, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmpk_eq_i32 s3, 0x40f +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s9, s5 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s5, s4, 0x1ff +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s10, s4, 8 +; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v0, s5, v0 +; GFX11-SDAG-FAKE16-NEXT: s_bfe_u32 s5, s4, 0xb0014 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s10, s10, 0xffe +; GFX11-SDAG-FAKE16-NEXT: s_sub_i32 s9, 0x3f1, s5 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s2, s2, 16 +; GFX11-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 +; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v1, s9, 0, 13 +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s2, s2, 0x8000 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s2, s2, s3 +; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s11, v1 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s9, v0 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s9, s10, s9 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s10, s9, 0x1000 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s12, s10, s11 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s11, s12, s11 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s11, s10 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_addk_i32 s5, 0xfc10 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s3, s12, s3 +; GFX11-SDAG-FAKE16-NEXT: s_lshl_b32 s10, s5, 12 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s10, s9, s10 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s5, 1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s3, s10 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s10, s3, 7 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_gt_i32 s10, 5 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s11, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_eq_u32 s10, 3 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s10, 1, 0 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s3, s3, 2 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s10, s10, s11 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_add_i32 s3, s3, s10 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lt_i32 s5, 31 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s3, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmp_lg_u32 s9, 0 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s8, s8, 0x7c00 +; GFX11-SDAG-FAKE16-NEXT: s_cmpk_eq_i32 s5, 0x40f +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s5, s1 +; GFX11-SDAG-FAKE16-NEXT: s_cselect_b32 s3, s8, s3 +; GFX11-SDAG-FAKE16-NEXT: s_lshr_b32 s4, s4, 16 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: s_and_b32 s4, s4, 0x8000 +; GFX11-SDAG-FAKE16-NEXT: s_or_b32 s3, s4, s3 +; GFX11-SDAG-FAKE16-NEXT: s_mov_b32 s4, s0 +; GFX11-SDAG-FAKE16-NEXT: s_pack_ll_b32_b16 s2, s3, s2 +; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, s2 ; GFX11-SDAG-FAKE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0 ; GFX11-SDAG-FAKE16-NEXT: s_endpgm ; -; GFX11-GISEL-TRUE16-LABEL: fptrunc_v2f64_to_v2f16: +; GFX11-GISEL-TRUE16-LABEL: fptrunc_v2f64_to_v2f16_afn: ; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry ; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0) @@ -842,7 +3751,7 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ; GFX11-GISEL-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0 ; GFX11-GISEL-TRUE16-NEXT: s_endpgm ; -; GFX11-GISEL-FAKE16-LABEL: fptrunc_v2f64_to_v2f16: +; GFX11-GISEL-FAKE16-LABEL: fptrunc_v2f64_to_v2f16_afn: ; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry ; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0) @@ -863,7 +3772,7 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16( ptr addrspace(1) %a) { entry: %a.val = load <2 x double>, ptr addrspace(1) %a - %r.val = fptrunc <2 x double> %a.val to <2 x half> + %r.val = fptrunc afn <2 x double> %a.val to <2 x half> store <2 x half> %r.val, ptr addrspace(1) %r ret void } |